Abstract: An extreme ultra violet (EUV) radiation source apparatus includes a collector mirror, a target droplet generator for generating a tin (Sn) droplet, a rotatable debris collection device, one or more coils for generating an inductively coupled plasma (ICP), a gas inlet for providing a source gas for the ICP, and a chamber enclosing at least the collector mirror and the rotatable debris collection device. The gas inlet and the one or more coils are configured such that the ICP is spaced apart from the collector mirror.

Abstract: Methods of cutting gate structures and fins, and structures formed thereby, are described. In an embodiment, a substrate includes first and second fins and an isolation region. The first and second fins extend longitudinally parallel, with the isolation region disposed therebetween. A gate structure includes a conformal gate dielectric over the first fin and a gate electrode over the conformal gate dielectric. A first insulating fill structure abuts the gate structure and extends vertically from a level of an upper surface of the gate structure to at least a surface of the isolation region. No portion of the conformal gate dielectric extends vertically between the first insulating fill structure and the gate electrode. A second insulating fill structure abuts the first insulating fill structure and an end sidewall of the second fin. The first insulating fill structure is disposed laterally between the gate structure and the second insulating fill structure.

Abstract: An example method of performing memory access operations comprises: receiving a request to perform a memory access operation with respect to a set of memory cells connected to a wordline of a memory device; identifying a block family associated with the set of memory cells; determining, for each logical programming level of a plurality of logical programming levels, a corresponding default block family error avoidance (BFEA) threshold voltage offset value associated with the block family; determining a value of a data state metric associated with the set of memory cells; responsive to determining that the value of the data state metric satisfies a threshold criterion, determining, for each logical programming level of a plurality of logical programming levels, a corresponding sub-BFEA threshold voltage offset value; and performing the memory access operation by applying, for each logical programming level of the plurality of logical programming levels, a combination of the default BFEA threshold voltage value

Abstract: Certain aspects of the present disclosure provide methods and apparatus for amplifying an input signal. One example apparatus is a differential amplifier that includes a positive input node, a negative input node, a positive output node, a negative output node, a positive input transistor having a gate coupled to the positive input node and having a drain coupled to the negative output node, a negative input transistor having a gate coupled to the negative input node and having a drain coupled to the positive output node, a first common-gate amplifier having an output coupled to the negative output node, a second common-gate amplifier having an output coupled to the positive output node, a first capacitive element coupled between the negative input node and an input of the first common-gate amplifier, and a second capacitive element coupled between the positive input node and an input of the second common-gate amplifier.

Abstract: Certain aspects of the present disclosure provide methods and apparatus for amplifying an input signal. One example apparatus is a differential amplifier that includes a positive input node, a negative input node, a positive output node, a negative output node, a positive input transistor having a gate coupled to the positive input node and having a drain coupled to the negative output node, a negative input transistor having a gate coupled to the negative input node and having a drain coupled to the positive output node, a first common-gate amplifier having an output coupled to the negative output node, a second common-gate amplifier having an output coupled to the positive output node, a first capacitive element coupled between the negative input node and an input of the first common-gate amplifier, and a second capacitive element coupled between the positive input node and an input of the second common-gate amplifier.

Abstract: An apparatus is disclosed for processing a signal with a divided amplifier. In example implementations, an apparatus includes a first portion of an amplifier, a first port interface, a second port interface, and a switch matrix. The first port interface includes a first transformer; a second portion of the amplifier, which is coupled to the first transformer; and a first switch component that is coupled to at least one of the first transformer or the second portion of the amplifier. The second port interface includes a second transformer and a second switch component that is coupled to the second transformer. The switch matrix is coupled between the first switch component and the first portion of the amplifier and between the second switch component and the first portion of the amplifier. The switch matrix is also coupled between the second portion of the amplifier and the first portion of the amplifier.

Abstract: A method for measuring strokes of CPR and a system using the method are disclosed. The system includes at least one permanent magnet and stroke detecting device which has a magnetic sensor, an accelerometer, a CPR detector, a controller, a power unit, and a housing. The system can measure strokes of CPR without a detector making patients uncomfortable. Meanwhile, the system is tiny and can be used to cooperate with AED.

Abstract: An apparatus is disclosed for processing a signal with a divided amplifier. In example implementations, an apparatus includes a first portion of an amplifier, a first port interface, a second port interface, and a switch matrix. The first port interface includes a first transformer; a second portion of the amplifier, which is coupled to the first transformer; and a first switch component that is coupled to at least one of the first transformer or the second portion of the amplifier. The second port interface includes a second transformer and a second switch component that is coupled to the second transformer. The switch matrix is coupled between the first switch component and the first portion of the amplifier and between the second switch component and the first portion of the amplifier. The switch matrix is also coupled between the second portion of the amplifier and the first portion of the amplifier.

Abstract: A filter circuit may include a first path having a first complex baseband filter. The circuit may further include a second path having a second complex baseband filter. The circuit may further include a combiner coupled to an output of the first complex baseband filter and an output of the second complex baseband filter.

Abstract: A method for measuring strokes of CPR and a system using the method are disclosed. The system includes at least one permanent magnet and stroke detecting device which has a magnetic sensor, an accelerometer, a CPR detector, a controller, a power unit, and a housing. The system can measure strokes of CPR without a detector making patients uncomfortable. Meanwhile, the system is tiny and can be used to cooperate with AED.

Abstract: A low noise amplifier may include a post distortion cancellation block coupled to the low noise amplifier. The post distortion cancellation block may include a diode, and phase-shift logic. The phase-shift logic may be coupled in series with the diode.

Abstract: An N-path filter with one or more branches selectively coupled to a shared circuit node includes a first branch having a first feedback path and a second feedback path. The first feedback path includes a Miller amplifier having an input coupled to an input voltage and a first capacitor coupled to both the input voltage and an output of the Miller amplifier. The second feedback path includes a node in common with the first feedback path. The second feedback path also includes a first high pass filter coupled to the output of the Miller amplifier and a second capacitor coupled to both the first capacitor and the first high pass filter.

Abstract: Amplification with post-distortion compensation is disclosed. In an example aspect, an apparatus includes a voltage rail and a cascode amplifier. The cascode amplifier includes an amplification node, a cascode node, and a common-source node. The cascode amplifier also includes at least one cascode transistor, an input transistor, and a compensation transistor. The cascode transistor is coupled between the amplification node and the cascode node. The input transistor is coupled between the cascode node and the common-source node. The compensation transistor is coupled between the voltage rail and the cascode node.

Abstract: Amplification with post-distortion compensation is disclosed. In an example aspect, an apparatus includes a voltage rail and a cascode amplifier. The cascode amplifier includes an amplification node, a cascode node, and a common-source node. The cascode amplifier also includes at least one cascode transistor, an input transistor, and a compensation transistor. The cascode transistor is coupled between the amplification node and the cascode node. The input transistor is coupled between the cascode node and the common-source node. The compensation transistor is coupled between the voltage rail and the cascode node.

Abstract: This disclosure provides systems and apparatuses for converting a single-ended analog signal into a differential analog signal. In some implementations, a single-ended to differential signal converter may include an N-path filter to generate a 180 degree phase-shifted version of a single-ended input signal. The single-ended input signal and the 180 degree phase-shifted version of the single-ended input signal together may form a differential signal. In some implementations, the N-path filter may delay the single-ended input through a series of switched capacitors.

Abstract: An N-path filter with one or more branches selectively coupled to a shared circuit node includes a first branch having a first feedback path and a second feedback path. The first feedback path includes a Miller amplifier having an input coupled to an input voltage and a first capacitor coupled to both the input voltage and an output of the Miller amplifier. The second feedback path includes a node in common with the first feedback path. The second feedback path also includes a first high pass filter coupled to the output of the Miller amplifier and a second capacitor coupled to both the first capacitor and the first high pass filter.

Abstract: An apparatus includes a first plurality of low noise amplifiers (LNAs) and a cascaded switch configured to route outputs of the first plurality of LNAs to a second plurality of LNAs.

Abstract: A filter circuit may include a first path having a first complex baseband filter. The circuit may further include a second path having a second complex baseband filter. The circuit may further include a combiner coupled to an output of the first complex baseband filter and an output of the second complex baseband filter.

Abstract: A low noise amplifier (LNA) reduces matching and switch noise. The LNA includes a main radio frequency signal path, an auxiliary radio frequency signal path and a phase shifter. The main path includes a first transistor and an inductor. The inductor is positioned between an input port of the LNA and the first transistor. The first transistor receives an input radio frequency signal via the inductor and provides a first amplified signal based on the input radio frequency signal. The auxiliary radio frequency signal path provides a second amplified signal for a noise cancellation mode based on the input radio frequency signal. The phase shifter applies a phase shift to an output signal of the LNA based on the first amplified signal and the second amplified signal.

Abstract: A low noise amplifier may include a post distortion cancellation block coupled to the low noise amplifier. The post distortion cancellation block may include a diode, and phase-shift logic. The phase-shift logic may be coupled in series with the diode.