Abstract: An apparatus includes a first plurality of low noise amplifiers (LNAs) and a cascaded switch configured to route outputs of the first plurality of LNAs to a second plurality of LNAs.

Abstract: A filter circuit may include a first path having a first complex baseband filter. The circuit may further include a second path having a second complex baseband filter. The circuit may further include a combiner coupled to an output of the first complex baseband filter and an output of the second complex baseband filter.

Abstract: A low noise amplifier (LNA) reduces matching and switch noise. The LNA includes a main radio frequency signal path, an auxiliary radio frequency signal path and a phase shifter. The main path includes a first transistor and an inductor. The inductor is positioned between an input port of the LNA and the first transistor. The first transistor receives an input radio frequency signal via the inductor and provides a first amplified signal based on the input radio frequency signal. The auxiliary radio frequency signal path provides a second amplified signal for a noise cancellation mode based on the input radio frequency signal. The phase shifter applies a phase shift to an output signal of the LNA based on the first amplified signal and the second amplified signal.

Abstract: A low noise amplifier may include a post distortion cancellation block coupled to the low noise amplifier. The post distortion cancellation block may include a diode, and phase-shift logic. The phase-shift logic may be coupled in series with the diode.

Abstract: A low noise amplifier (LNA) reduces matching and switch noise. The LNA includes a main radio frequency signal path, an auxiliary radio frequency signal path and a phase shifter. The main path includes a first transistor and an inductor. The inductor is positioned between an input port of the LNA and the first transistor. The first transistor receives an input radio frequency signal via the inductor and provides a first amplified signal based on the input radio frequency signal. The auxiliary radio frequency signal path provides a second amplified signal for a noise cancellation mode based on the input radio frequency signal. The phase shifter applies a phase shift to an output signal of the LNA based on the first amplified signal and the second amplified signal.

Abstract: An apparatus includes a first plurality of low noise amplifiers (LNAs) and a cascaded switch configured to route outputs of the first plurality of LNAs to a second plurality of LNAs.

Abstract: An apparatus includes a first plurality of low noise amplifiers (LNAs) and a cascaded switch configured to route outputs of the first plurality of LNAs to a second plurality of LNAs.

Abstract: Amplifiers with noise splitting to improve noise figure are disclosed. In an exemplary design, an apparatus (e.g., a wireless device, an integrated circuit, etc.) includes a plurality of amplifier circuits and at least one interconnection circuit. The amplifier circuits receive an input radio frequency (RF) signal. The interconnection circuit(s) are coupled between the plurality of amplifier circuits. Each interconnection circuit is closed to short the outputs or internal nodes of two amplifier circuits coupled to that interconnection circuit. The plurality of amplifier circuits may include a plurality of gain circuits coupled to a plurality of current buffers, one gain circuit and one current buffer for each amplifier circuit. Each amplifier circuit provides an output current, which may include a portion of the current from each of the plurality of gain circuits when the plurality of amplifier circuits are enabled.

Abstract: An apparatus includes a first amplifier stage configured to amplify a first carrier signal. The apparatus includes a second amplifier stage configured to amplify a second carrier signal. A resistive-capacitive (RC) network is coupled to the first amplifier stage and to the second amplifier stage. The RC network includes a resistive element coupled to a capacitive element.

Abstract: An apparatus includes a low noise amplifier (LNA) having an input configured to receive a radio frequency signal. The apparatus also includes a notch filter coupled to an input of the LNA. The notch filter is configured to attenuate the radio frequency signal at a notch frequency.

Abstract: An apparatus includes a first amplifier circuit and a second amplifier circuit. The first amplifier circuit has a first output coupled to a first load circuit in a multi-output mode, and the second amplifier circuit has a second output coupled to a second load circuit in the multi-output mode. The apparatus further includes a first divert circuit and a second divert circuit. The first divert circuit is configured to divert a first portion of a first amplified signal from the first amplifier circuit to the second load circuit in the multi-output mode. The second divert circuit is configured to divert a first portion of a second amplified signal from the second amplifier circuit to the first load circuit in the multi-output mode.

Abstract: Amplifiers with noise splitting to improve noise figure are disclosed. In an exemplary design, an apparatus (e.g., a wireless device, an integrated circuit, etc.) includes a plurality of amplifier circuits and at least one interconnection circuit. The amplifier circuits receive an input radio frequency (RF) signal. The interconnection circuit(s) are coupled between the plurality of amplifier circuits. Each interconnection circuit is closed to short the outputs or internal nodes of two amplifier circuits coupled to that interconnection circuit. The plurality of amplifier circuits may include a plurality of gain circuits coupled to a plurality of current buffers, one gain circuit and one current buffer for each amplifier circuit. Each amplifier circuit provides an output current, which may include a portion of the current from each of the plurality of gain circuits when the plurality of amplifier circuits are enabled.

Abstract: Techniques for improving electro-static discharge (ESD) performance in integrated circuits (IC's). In an aspect, one or more protective diodes are provided between various nodes of the IC. For example, protective diode(s) may be provided between the drain and gate of an amplifier input transistor, and/or between the drain and ground, etc. In certain exemplary embodiments, the amplifier may be a cascode amplifier. Further aspects for effectively dealing with ESD phenomena are described.

Abstract: An apparatus includes a low noise amplifier (LNA) having an input configured to receive a radio frequency signal. The apparatus also includes a notch filter coupled to an input of the LNA. The notch filter is configured to attenuate the radio frequency signal at a notch frequency.

Abstract: An apparatus includes a first plurality of low noise amplifiers (LNAs) and a cascaded switch configured to route outputs of the first plurality of LNAs to a second plurality of LNAs.

Abstract: A CMOS amplifier including electrostatic discharge (ESD) protection circuits is disclosed. In one embodiment, the CMOS amplifier may include a PMOS transistor, a NMOS transistor, primary protection diodes, and one or more auxiliary protection diodes to limit a voltage difference between terminals of the CMOS amplifier. In some embodiments, the auxiliary protection diodes may limit the voltage difference between an input terminal of the CMOS amplifier and a supply voltage, the input terminal of the CMOS amplifier and ground, and the input terminal and the output terminal of the CMOS amplifier.

Abstract: Amplifiers with noise splitting to improve noise figure are disclosed. In an exemplary design, an apparatus (e.g., a wireless device, an integrated circuit, etc.) includes a plurality of amplifier circuits and at least one interconnection circuit. The amplifier circuits receive an input radio frequency (RF) signal. The interconnection circuit(s) are coupled between the plurality of amplifier circuits. Each interconnection circuit is closed to short the outputs or internal nodes of two amplifier circuits coupled to that interconnection circuit. The plurality of amplifier circuits may include a plurality of gain circuits coupled to a plurality of current buffers, one gain circuit and one current buffer for each amplifier circuit. Each amplifier circuit provides an output current, which may include a portion of the current from each of the plurality of gain circuits when the plurality of amplifier circuits are enabled.

Abstract: A calibration method includes generating, by a digital-to-analog converter of a chip, a first predetermined voltage and a second predetermined voltage and outputting the same to an analog-to-digital-converter of the chip to generate a first digital code difference; determining a variation parameter according to the first digital code difference and one of a plurality of second digital code differences stored in a look up table of a memory unit of the chip; driving, by an external testing system, the digital-to-analog converter to generate the first predetermined voltage and the second predetermined voltage and output the same to the analog-to-digital-converter to generate a target code difference; and multiplying the second digital code differences with the variation parameter to calibrate a gain of the analog-to-digital converter according to the target code difference.

Abstract: An apparatus includes a first amplification stage configured to amplify a first carrier signal and a second amplification stage configured to amplify a second carrier signal. The first amplification stage is direct-current (DC) coupled to the second amplification stage. First circuitry is coupled to the first amplification stage and configured to control a first gain of the first amplification stage. The first circuitry includes a first gain control transistor configured to selectively divert a first bleed current from a first output of the first amplification stage. Second circuitry is coupled to the second amplification stage and configured to control a second gain of the second amplification stage independently of the first gain. The second circuitry includes a second gain control transistor configured to selectively divert a second bleed current from a second output of the second amplification stage.

Abstract: A device includes at least one first amplifier circuit configurable to receive and amplify an input radio frequency (RF) signal having a first carrier at a first input signal level and provide a first amplified RF signal, and at least one second amplifier circuit configurable to receive and amplify the input RF signal having a second carrier at a second input signal level and provide a second amplified RF signal, the at least one first amplifier circuit having a first input impedance, the at least one second amplifier circuit having a second input impedance.