Patents by Inventor Li Juin Yip

Li Juin Yip has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9105713
    Abstract: A semiconductor device includes a semiconductor substrate, a body region of a first conductivity type in the substrate, a source region of a second conductivity type opposite the first conductivity type adjacent the body region, and a trench extending into the substrate adjacent the source and body regions. The trench contains a polysilicon gate electrode insulated from the substrate. The device further includes a dielectric layer on the substrate, a gate metallization on the dielectric layer and covering part of the substrate and a source metallization on the dielectric layer and electrically connected to the source region. The source metallization is spaced apart from the gate metallization and covers a different part of the substrate than the gate metallization. A metal-filled groove in the polysilicon gate electrode is electrically connected to the gate metallization, and extends along a length of the trench underneath at least part of the source metallization.
    Type: Grant
    Filed: November 9, 2012
    Date of Patent: August 11, 2015
    Assignee: Infineon Technologies Austria AG
    Inventors: Ralf Siemieniec, Oliver Blank, Li Juin Yip
  • Publication number: 20150179752
    Abstract: A semiconductor body has a first surface, a second opposing surface, an edge, an active device region, and an edge termination region. A trench extends from the first surface into the semiconductor body in the edge termination region and includes sidewalls and an insulated electrode. A first conductivity type doped region extends from the first surface into the semiconductor body in the edge termination region and has a planar outer surface along the first surface that adjoins the trench at a corner of the trench sidewall and the first surface and has a side surface extending from the corner along the trench sidewall. A first interconnect contacts the trench electrode. A second interconnect contacts the outer surface and the side surface. A contact couples the first doped region to the trench electrode and has a bottom surface coplanar with the first surface from a contact edge to the corner.
    Type: Application
    Filed: December 20, 2013
    Publication date: June 25, 2015
    Inventors: Ralf Siemieniec, Li Juin Yip, Oliver Blank
  • Publication number: 20140131792
    Abstract: A semiconductor device includes a semiconductor substrate, a body region of a first conductivity type in the substrate, a source region of a second conductivity type opposite the first conductivity type adjacent the body region, and a trench extending into the substrate adjacent the source and body regions. The trench contains a polysilicon gate electrode insulated from the substrate. The device further includes a dielectric layer on the substrate, a gate metallization on the dielectric layer and covering part of the substrate and a source metallization on the dielectric layer and electrically connected to the source region. The source metallization is spaced apart from the gate metallization and covers a different part of the substrate than the gate metallization. A metal-filled groove in the polysilicon gate electrode is electrically connected to the gate metallization, and extends along a length of the trench underneath at least part of the source metallization.
    Type: Application
    Filed: November 9, 2012
    Publication date: May 15, 2014
    Applicant: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Ralf Siemieniec, Oliver Blank, Li Juin Yip