Patents by Inventor Li Lan

Li Lan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240371890
    Abstract: The present disclosure provides an electronic device, which includes a substrate, a first data line arranged on the substrate and extending along a first direction, a first electrode and a second electrode arranged on the substrate and arranged along the first direction, and a third electrode and a fourth electrode arranged on the substrate and arranged along the first direction, the first electrode, the second electrode, the third electrode and the fourth electrode are electrically connected with the first data line, and the first electrode and the second electrode are located on a first side of the first data line, and the third electrode and the fourth electrode are located on a second side of the first data line relative to the first side.
    Type: Application
    Filed: April 8, 2024
    Publication date: November 7, 2024
    Applicant: InnoLux Corporation
    Inventors: Meng-Chang TSAI, Li-Jin Wang, Chan-Feng Chiu, Hsiao-Lan Su
  • Publication number: 20240341093
    Abstract: A method of forming a semiconductor structure includes providing a substrate with an array region, a peripheral region, and a transition region between the array region and the peripheral region. A patterned floating gate layer is formed on the array region and the peripheral region, and a stacked layer is conformally formed on the substrate, wherein a recess is formed over the transition region. A photoresist layer is formed on the substrate, and the photoresist layer is patterned to form an array region pattern on the stacked layer of the array region, wherein a portion of the photoresist layer remains at the bottom of the recess, and a recess pattern is formed. The array region pattern and the recess pattern are sequentially transferred to the stacked layer, the patterned floating gate layer and the substrate to form a plurality of arrays and a pair of blocking structures.
    Type: Application
    Filed: June 8, 2023
    Publication date: October 10, 2024
    Applicant: Winbond Electronics Corp.
    Inventor: Shun-Li LAN
  • Patent number: 12087619
    Abstract: A method for manufacturing a semiconductor device, including the following steps. A plurality of first vias are formed in a first dielectric layer in a memory cell region and a peripheral region. A surface treatment is performed on the plurality of first vias to form a plurality of sacrificial layers. The plurality of sacrificial layers are removed to form a plurality of recesses. A plurality of protective layers are formed in the plurality of recesses. A memory device is formed on the first dielectric layer in the memory cell region. A second dielectric layer is formed on the memory device and on the first dielectric layer. A plurality of second vias is formed in the second dielectric layer in the memory cell region and the peripheral region to electrically connect the memory device in the memory cell region and the first vias in the peripheral region, respectively.
    Type: Grant
    Filed: December 22, 2022
    Date of Patent: September 10, 2024
    Assignee: Winbond Electronics Corp.
    Inventors: Chi-Ching Liu, Yu-Ting Chen, Chang-Tsung Pai, Shun-Li Lan, Yen-De Lee, Chih-Jung Ni
  • Patent number: 12073542
    Abstract: An image processing method includes: acquiring an input image of a teaching scenario; performing detection on the input image to determine a rectangular detection area that includes a blackboard-writing area; analyzing the rectangular detection area to determine a target area corresponding to the blackboard-writing area; determining four vertices of the target area; and according to the four vertices of the target area, performing coordinate transformation on the target area to obtain a corrected blackboard-writing area image.
    Type: Grant
    Filed: December 3, 2021
    Date of Patent: August 27, 2024
    Assignee: NEW ORIENTAL EDUCATION & TECHNOLOGY GROUP INC.
    Inventors: Haichun Yue, Jun Zhang, Yongliang Lan, Bochuan Wu, Li Li
  • Publication number: 20240279607
    Abstract: This disclosure provides method of manufacturing pharmaceutical composition for treating cancer, which provides great cell yield via not performing negative selection on CD3?CD19?CD14?. By administration of the pharmaceutical composition, cancer cells in a subject may be effectively inhibited via cell-mediated immunity.
    Type: Application
    Filed: February 17, 2023
    Publication date: August 22, 2024
    Applicants: FULLHOPE BIOMEDICAL CO., LTD., NATIONAL YANG MING CHIAO TUNG UNIVERSITY
    Inventors: Jan-Mou Lee, Keng-Li Lan, Chih-Hao Fang, Ya-Fang Cheng
  • Publication number: 20240066033
    Abstract: Disclosed herein are RNA methyltransferase inhibitors and methods of using and making the same. The inhibitors may be used in a method for the treatment of a subject in need of a treatment for a cancer by administering an effective amount of the RNA methyltransferase inhibitor and an effective amount of a DNA damaging agent to the subject.
    Type: Application
    Filed: August 9, 2021
    Publication date: February 29, 2024
    Inventors: Hong-yu Li, Wei Yan, Li Lan
  • Publication number: 20240000784
    Abstract: Disclosed herein are RNA methyltransferase inhibitors and methods of using the same. The inhibitors may be used in a method for the treatment of a subject in need of a treatment for a cancer by administering an effective amount of an RNA methyl-transferase inhibitor to the subject.
    Type: Application
    Filed: August 9, 2021
    Publication date: January 4, 2024
    Inventors: Hong-yu Li, Wei Yan, Li Lan
  • Patent number: 11684656
    Abstract: A new approach for the treatment of a malignant disease is provided. The new method comprises administering a traditional anti-cancer therapy in combination with a DNA or protein vaccine comprising CTLA-4 and PD-1, or a DNA or protein vaccine comprising CTLA-4 and PD-L1.
    Type: Grant
    Filed: November 4, 2016
    Date of Patent: June 27, 2023
    Assignee: TAIPEI VETERANS GENERAL HOSPITAL
    Inventors: Keng-Li Lan, Yi-Sheng Shih, Keng-Hsueh Lan, Sung-Hsin Kuo, Weng-Shiang Chen
  • Publication number: 20230136970
    Abstract: A modified naphthalene series water reducing agent for concrete with high slit content, and preparation method and application thereof, belonging to the field of concrete admixtures, and comprising the following components by weight: 20-30 wt % of naphthalene series water reducing agent, 10-20 wt % of high molecular weight polyethylene, 0.1-1 wt % of solid acid catalyst, and the balance of alkane solvent, and the sum of the components is 100 wt %. The present invention provides a simple preparation method for the water reducing agent, and the prepared solvent can be recycled, moreover, on the premises of not increasing costs, the prepared water reducing agent can not only effectively solve the fluidity decline of fresh concrete prepared by aggregate with high slit content, but improves the mechanical strength and other properties of concrete, in order to meet the construction requirements of concrete works.
    Type: Application
    Filed: October 31, 2022
    Publication date: May 4, 2023
    Inventors: Qiusheng Guo, Li Lan, Xuemei Zou
  • Publication number: 20230129196
    Abstract: A method for manufacturing a semiconductor device, including the following steps. A plurality of first vias are formed in a first dielectric layer in a memory cell region and a peripheral region. A surface treatment is performed on the plurality of first vias to form a plurality of sacrificial layers. The plurality of sacrificial layers are removed to form a plurality of recesses. A plurality of protective layers are formed in the plurality of recesses. A memory device is formed on the first dielectric layer in the memory cell region. A second dielectric layer is formed on the memory device and on the first dielectric layer. A plurality of second vias is formed in the second dielectric layer in the memory cell region and the peripheral region to electrically connect the memory device in the memory cell region and the first vias in the peripheral region, respectively.
    Type: Application
    Filed: December 22, 2022
    Publication date: April 27, 2023
    Applicant: Winbond Electronics Corp.
    Inventors: Chi-Ching Liu, Yu-Ting Chen, Chang-Tsung Pai, Shun-Li Lan, Yen-De Lee, Chih-Jung Ni
  • Publication number: 20220363603
    Abstract: A cerium-zirconium-aluminum-based composite material, a cGPF catalyst and a preparation method thereof are provided. The cerium-zirconium-aluminum-based composite material adopts a stepwise precipitation method, firstly preparing an aluminum-based pre-treated material, then coprecipitating the aluminum-based pre-treated material with zirconium and cerium sol, and finally roasting at high temperature to obtain the cerium-zirconium-aluminum-based composite material. The cerium-zirconium-aluminum-based composite material has better compactness and higher density, and when it is used in cGPF catalyst, it occupies a smaller volume of pores on the catalyst carrier, such that cGPF catalyst has lower back pressure and better ash accumulation resistance, which is beneficial to large-scale application of cGPF catalyst.
    Type: Application
    Filed: June 17, 2020
    Publication date: November 17, 2022
    Inventors: Dacheng LI, Jinfeng WANG, Li LAN, Hui YE, Lan YANG, Feng ZHANG, Yi YANG, Yongxiang CHENG, Tiantian LUO, Yinhua DONG, Yun WANG, Yun LI, Qizhang CHEN
  • Patent number: D990693
    Type: Grant
    Filed: October 8, 2021
    Date of Patent: June 27, 2023
    Assignee: AZUNI INTERNATIONAL CO., LTD.
    Inventor: Li-Lan Wu
  • Patent number: D990694
    Type: Grant
    Filed: October 14, 2021
    Date of Patent: June 27, 2023
    Assignee: AZUNI INTERNATIONAL CO., LTD.
    Inventor: Li-Lan Wu
  • Patent number: D1006012
    Type: Grant
    Filed: February 24, 2021
    Date of Patent: November 28, 2023
    Assignee: SIEMENS AKTIENGESELLSCHAFT
    Inventors: Zhan Bo Ren, Andreas Morlock, Xue Kang Li, Shi Kong Lin, Ting Li Lan
  • Patent number: D1025048
    Type: Grant
    Filed: November 26, 2021
    Date of Patent: April 30, 2024
    Assignee: SIEMENS AKTIENGESELLSCHAFT
    Inventors: Zhan Bo Ren, Andreas Morlock, Xue Kang Li, Shi Kong Lin, Ting Li Lan, Yong Jie Sun
  • Patent number: D1025049
    Type: Grant
    Filed: November 26, 2021
    Date of Patent: April 30, 2024
    Assignee: SIEMENS AKTIENGESELLSCHAFT
    Inventors: Zhan Bo Ren, Andreas Morlock, Xue Kang Li, Shi Kong Lin, Ting Li Lan, Yong Jie Sun
  • Patent number: D1027935
    Type: Grant
    Filed: July 19, 2021
    Date of Patent: May 21, 2024
    Assignee: SIEMENS AKTIENGESELLSCHAFT
    Inventors: Ting Lai, Ting Li Lan, Yu Xia Pan
  • Patent number: D1030758
    Type: Grant
    Filed: July 9, 2022
    Date of Patent: June 11, 2024
    Assignee: SIEMENS AKTIENGESELLSCHAFT
    Inventors: Meng Xi Chen, Chang Sen Chen, Ting Li Lan, Zhan Bo Ren
  • Patent number: D1033425
    Type: Grant
    Filed: July 9, 2022
    Date of Patent: July 2, 2024
    Assignee: SIEMENS AKTIENGESELLSCHAFT
    Inventors: Meng Xi Chen, Chang Sen Chen, Ting Li Lan, Zhan Bo Ren
  • Patent number: D1035641
    Type: Grant
    Filed: April 27, 2022
    Date of Patent: July 16, 2024
    Assignee: SIEMENS AKTIENGESELLSCHAFT
    Inventors: Yu Xia Pan, Ting Li Lan, Zhan Bo Ren, Chang Sen Chen, Hai Gang Xiong