Patents by Inventor Li-Ming Chang

Li-Ming Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200126865
    Abstract: A method of forming an integrated circuit structure includes forming a first source/drain contact plug over and electrically coupling to a source/drain region of a transistor, forming a first dielectric hard mask overlapping a gate stack, recessing the first source/drain contact plug to form a first recess, forming a second dielectric hard mask in the first recess, recessing an inter-layer dielectric layer to form a second recess, and forming a third dielectric hard mask in the second recess. The third dielectric hard mask contacts both the first dielectric hard mask and the second dielectric hard mask.
    Type: Application
    Filed: April 2, 2019
    Publication date: April 23, 2020
    Inventors: Lin-Yu Huang, Li-Zhen Yu, Sheng-Tsung Wang, Jia-Chuan You, Chia-Hao Chang, Tien-Lu Lin, Yu-Ming Lin, Chih-Hao Wang
  • Publication number: 20200105937
    Abstract: A method includes providing a semiconductor structure having metal gate structures (MGs), gate spacers disposed on sidewalls of the MGs, and source/drain (S/D) features disposed adjacent to the gate spacers; forming a first dielectric layer over the MGs and forming S/D contacts (MDs) over the S/D features; forming a second dielectric layer over the first dielectric layer, where portions of the second dielectric layer contact the MDs and the second dielectric layer is different from the first dielectric layer in composition; removing the portions of the second dielectric layer that contact the MDs; forming a conductive layer over the MDs and over the first dielectric layer; and removing portions of the conductive layer to form conductive features over the MDs.
    Type: Application
    Filed: July 17, 2019
    Publication date: April 2, 2020
    Inventors: Li-Zhen Yu, Jia-Chuan You, Chia-Hao Chang, Tien-Lu Lin, Yu-Ming Lin, Chih-Hao Wang
  • Publication number: 20200052155
    Abstract: Disclosed is a multi-quantum well structure including a stress relief layer, an electron-collecting layer disposed on the stress relief layer, and an active layer including a first active layer unit that is disposed on the electron-collecting layer. The first active layer unit includes potential barrier sub-layers and potential well sub-layers being alternately stacked, in which at least one of the potential barrier sub-layers has a GaN/Alx1Iny1Ga(1-x1-y1)N/GaN stack, where 0<x1?1 and 0?y1<1, and for the remainder of the potential barrier sub-layers, each of the potential barrier sub-layers is a GaN layer. An LED device including the multi-quantum well structure is also disclosed.
    Type: Application
    Filed: October 17, 2019
    Publication date: February 13, 2020
    Inventors: HAN JIANG, YUNG-LING LAN, WEN-PIN HUANG, CHANGWEI SONG, LI-CHENG HUANG, FEILIN XUN, CHAN-CHAN LING, CHI-MING TSAI, CHIA-HUNG CHANG
  • Publication number: 20200035863
    Abstract: An optoelectronic device includes a substrate; a semiconductor stack, formed on the substrate; a current blocking region, including a first pad portion formed above the semiconductor stack and wherein the current blocking region includes transparent insulated material; a transparent conductive layer, formed on the current blocking region and/or a surface of the semiconductor stack; a first opening, formed in the first pad portion, wherein in a top view, the first opening includes elongated shape; and a first electrode, including a first pad electrode formed above the first pad portion of the current blocking region and electrically connecting to the semiconductor stack through the first opening.
    Type: Application
    Filed: October 3, 2019
    Publication date: January 30, 2020
    Inventors: Tzung-Shiun YEH, Li-Ming CHANG, Chien-Fu SHEN
  • Publication number: 20200020839
    Abstract: A light-emitting device includes a first edge to a fourth edge; a semiconductor stack formed on a substrate, including a first semiconductor layer, a second semiconductor layer and an active layer; a first electrode formed on the first semiconductor layer, including a first pad electrode and a first finger electrode; and a second electrode formed on the second semiconductor layer, including a second pad electrode and a second finger electrode; wherein the first finger electrode is disposed at and along the first edge; and the first finger electrode includes a first overlapping portion overlapping the second finger electrode; the second finger electrode includes a second overlapping portion overlapping the first finger electrode and a non-overlapping portion that does not overlap the first finger electrode; and the second overlapping portion is not parallel with the first overlapping portion and the non-overlapping portion is not parallel with the first edge.
    Type: Application
    Filed: September 23, 2019
    Publication date: January 16, 2020
    Inventors: Li-Ming CHANG, Tzung-Shiun YEH, Chien-Fu SHEN, Yu-Rui LIN, Chen OU, Hsin-Ying WANG, Hui-Chun YEH
  • Patent number: 10508953
    Abstract: A method for processing a substrate is provided. The method includes supplying a first flow of a chemical solution into a processing chamber, configured to process the substrate, via a first dispensing nozzle. The method further includes producing a first thermal image of the first flow of the chemical solution. The method also includes performing an image analysis on the first thermal image. In addition, the method includes moving the substrate into the processing chamber when the result of the analysis of the first thermal image is within the allowable deviation from the baseline.
    Type: Grant
    Filed: April 18, 2017
    Date of Patent: December 17, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Min-An Yang, Hao-Ming Chang, Shao-Chi Wei, Kuo-Chin Lin, Sheng-Chang Hsu, Li-Chih Lu, Cheng-Ming Lin
  • Patent number: 10505092
    Abstract: A light-emitting element, includes a first edge, a second edge, a third edge and a fourth edge; a substrate; a semiconductor stack formed on the substrate, including a first semiconductor layer, a second semiconductor layer and an active layer formed therebetween; a transparent conductive layer, formed on the second semiconductor layer; a first electrode formed on the first semiconductor layer, including a first pad electrode and a first finger electrode extending from the first pad electrode; and a second electrode formed on the first second semiconductor layer, including a second pad electrode and a second finger electrode extending from the second pad electrode; wherein the first finger electrode is disposed at and along the first edge; and wherein in top view, an overlapping portions of the first finger electrode and the second finger electrode are non-parallel.
    Type: Grant
    Filed: January 18, 2018
    Date of Patent: December 10, 2019
    Assignee: EPISTAR CORPORATION
    Inventors: Li-Ming Chang, Tzung-Shiun Yeh, Chien-Fu Shen, Yu-Rui Lin, Chen Ou, Hsin-Ying Wang, Hui-Chun Yeh
  • Publication number: 20190373097
    Abstract: A communication signal transform device and a communication signal transform method are provided. The communication signal transform method includes: disposing the mobile device detachably in a case having an exposed portion, and exposing a display of the mobile device from the case through the exposed portion; and generating an output signal supported by the mobile device in response to a signal received from an external telephone line, and transmitting the output signal to the mobile device.
    Type: Application
    Filed: May 21, 2019
    Publication date: December 5, 2019
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: Li-Chuan Wang, Che-Wei Liang, Kun-Hsuan Chang, Sheng-Chieh Tang, Jung-Ming Hung
  • Patent number: 10475962
    Abstract: An optoelectronic device includes a substrate; a semiconductor stack, formed on the substrate; a current blocking region, formed above the semiconductor stack and comprising a first pad portion and a first finger portion; a first opening, formed in the first pad portion, wherein in a top view, the first opening comprises an elongated shape defined by the first pad portion; a transparent conductive layer formed on the current blocking region and/or a surface of the semiconductor stack; and a first electrode formed above the current blocking region; wherein the transparent conductive layer comprises a second opening to expose the first opening, and the first electrode electrically connects the semiconductor stack through the first opening and the second opening.
    Type: Grant
    Filed: February 6, 2018
    Date of Patent: November 12, 2019
    Assignee: EPISTAR CORPORATION
    Inventors: Tzung-Shiun Yeh, Li-Ming Chang, Chien-Fu Shen
  • Patent number: 10459332
    Abstract: A method of fabricating a photomask includes providing a mask blank; removing a portion of the resist layer to form a patterned resist layer exposing a portion of the cooling layer; patterning the cooling layer by using the patterned resist layer as an etching mask; patterning the opaque layer; and removing the patterned resist layer and the patterned cooling layer. The mask blank includes a light-transmitting substrate and an opaque layer, a cooling layer, and a resist layer sequentially stacked thereon, wherein the cooling layer has a thermal conductivity ranging between 160 and 5000 and an effective atomic number ranging between 5 and 14.
    Type: Grant
    Filed: March 28, 2017
    Date of Patent: October 29, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hao-Ming Chang, Chih-Ming Chen, Cheng-Ming Lin, Sheng-Chang Hsu, Shao-Chi Wei, Hsao Shih, Li-Chih Lu
  • Publication number: 20190318471
    Abstract: A hot spot defect detecting method and a hot spot defect detecting system are provided. In the method, hot spots are extracted from a design of a semiconductor product to define a hot spot map comprising hot spot groups, wherein local patterns in a same context of the design yielding a same image content are defined as a same hot spot group. During runtime, defect images obtained by an inspection tool performing hot scans on a wafer manufactured with the design are acquired and the hot spot map is aligned to each defect image to locate the hot spot groups. The hot spot defects in each defect image are detected by dynamically mapping the hot spot groups located in each defect image to a plurality of threshold regions and respectively performing automatic thresholding on pixel values of the hot spots of each hot spot group in the corresponding threshold region.
    Type: Application
    Filed: August 29, 2018
    Publication date: October 17, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chien-Huei Chen, Pei-Chao Su, Xiaomeng Chen, Chan-Ming Chang, Shih-Yung Chen, Hung-Yi Chung, Kuang-Shing Chen, Li-Jou Lee, Yung-Cheng Lin, Wei-Chen Wu, Shih-Chang Wang, Chien-An Lin
  • Publication number: 20190292429
    Abstract: A composition and a solution for temporary bonding are provided. The composition includes a dianhydride monomer, a light-absorbing monomer, and a light-absorbing material. The light-absorbing monomer includes at least one of N,N,N,N-(p-aminophenyl)-p-phenylenediamine (DPDA) and N,N-(p-aminophenyl)-p-phenylenediamine (TPDA). The light-absorbing material includes carbon black and silicon dioxide.
    Type: Application
    Filed: June 25, 2018
    Publication date: September 26, 2019
    Applicant: TAIFLEX Scientific Co., Ltd.
    Inventors: Hsiu-Ming Chang, Tsung-Tai Hung, Li-Jung Hsiao, Po-Wen Lin
  • Patent number: 10396196
    Abstract: A semiconductor device includes a substrate, a semiconductor layer, a doped region, a device region, a first isolation structure, a second isolation structure and a terminal. The semiconductor layer is disposed over the substrate. The doped region is disposed in the semiconductor layer. The device region is disposed on the doped region and includes a source, a drain and a gate. The first isolation structure is disposed in the semiconductor layer and surrounds the doped region. The second isolation structure surrounds the first isolation structure and is spaced apart from the first isolation structure. The terminal is disposed between the first isolation structure and the second isolation structure, and is equipotential with the source.
    Type: Grant
    Filed: January 30, 2019
    Date of Patent: August 27, 2019
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Jui-Chun Chang, Shih-Kai Wu, Cheng-Yu Wang, Li-Yang Hong, Chia-Ming Hsu
  • Publication number: 20190238503
    Abstract: The present invention provides a method for NAT traversal in VPN so that the VPN can detect the rule of port allocation for NAT outside the VPN to achieve NAT traversal. The communication structure according to the present invention includes a public network, a client network, a destination network, a first NAT, a second NAT. A DNAT-T proxy server is installed between the first NAT and the second NAT and has the function for the VPN to conduct a plurality of (N times) registrations before sending data out to detect the rule for NAT port allocation of the DNAT-T proxy server, and then inform the next NAT port allocation to the other side of the VPN so as to achieve NAT traversal for the data packets in VPN.
    Type: Application
    Filed: February 1, 2018
    Publication date: August 1, 2019
    Inventors: Hsueh Ming HANG, Shaw Hwa HWANG, Cheng Yu YEH, Bing Chih YAO, Kuan Lin CHEN, Yao Hsing CHUNG, Shun Chieh CHANG, Chi Jung HUANG, Li Te SHEN, Ning Yun KU, Tzu Hung LIN, Ming Che YEH
  • Patent number: 10357525
    Abstract: Disclosed herein is a novel use of a polysaccharide mixture for the treatment of hyperglycemia and/or disorders related thereto (e.g., diabetes mellitus). The polysaccharide mixture comprises about 30-50% (wt %) of ?(1?3) glucan and ?(1?6) glucan, and has a molecular weight of at least 500,000. The polysaccharide mixture may be administered to a subject suffering from hyperglycemia in a dose of about 1 to 1,000 mg/Kg to ameliorate or alleviate symptoms associated with hyperglycemia.
    Type: Grant
    Filed: May 31, 2017
    Date of Patent: July 23, 2019
    Assignee: TRINEO BIOTECHNOLOGY CO. LTD
    Inventors: Cheng-Po Huang, Cheng-Chiu Tsao, Chao-hsuan Chang, Teng-Hai Chen, Li-Ming Huang, Chieh-Hung Lin
  • Publication number: 20190189850
    Abstract: A light-emitting device, includes a first semiconductor stack formed on a substrate, including a first semiconductor layer, a second semiconductor layer and an active layer formed therebetween; a first electrode formed on the first semiconductor layer; a second electrode formed on the second semiconductor layer, including a second pad electrode and a second finger electrode extending from the second pad electrode; a second current blocking region formed under the second electrode, including a second core region under the second pad electrode and a extending region under the second finger electrode; and a transparent conductive layer, formed on the second semiconductor layer and covering the extending region; wherein a contour of the second core region has a shape different from that of the second pad electrode; wherein the transparent conductive layer includes a first opening having a width wider than a width of the second pad electrode, wherein the second finger electrode includes a portion extending from th
    Type: Application
    Filed: December 14, 2018
    Publication date: June 20, 2019
    Inventors: Hsin-Ying WANG, Hui-Chun YEH, Li-Ming CHANG, Chien-Fu SHEN, Chen OU
  • Patent number: 10323331
    Abstract: The present disclosure provides a valuable metal selectively adsorbing electrode, including: an electrode formed by a carbon-containing material; and a protein of a bacterium of genus Tepidimonas immobilized on the electrode formed by a carbon-containing material to form the valuable metal selectively adsorbing electrode, wherein the valuable metal includes gold, palladium, silver or indium.
    Type: Grant
    Filed: December 29, 2016
    Date of Patent: June 18, 2019
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Li-Ching Chung, Chia-Heng Yen, Teh-Ming Liang, Ren-Yang Horng, Min-Chao Chang, Hsin Shao, Po-I Liu, Chih-Hsiang Fang, Yin-Lung Han, Kai-Chun Fan
  • Patent number: 10301199
    Abstract: A method for electrochemically selectively removing ions using a composite electrode is provided. The composite electrode includes a composite having a carbon support and an inorganic material immobilized on the carbon support.
    Type: Grant
    Filed: June 17, 2016
    Date of Patent: May 28, 2019
    Assignee: Industrial Technology Research Institute
    Inventors: Li-Ching Chung, Teh-Ming Liang, Ren-Yang Horng, Hsin Shao, Po-I Liu, Min-Chao Chang, Chia-Heng Yen, Chih-Hsiang Fang
  • Publication number: 20180233629
    Abstract: An optoelectronic device includes a substrate; a semiconductor stack, formed on the substrate; a current blocking region, formed above the semiconductor stack and comprising a first pad portion and a first finger portion; a first opening, formed in the first pad portion and comprising an elongate shape; and a first electrode formed above the current blocking region and electrically connecting to the semiconductor stack through the first opening.
    Type: Application
    Filed: February 6, 2018
    Publication date: August 16, 2018
    Inventors: Tzung-Shiun YEH, Li-Ming CHANG, Chien-Fu SHEN
  • Publication number: 20180212123
    Abstract: A light-emitting element, includes a first edge, a second edge, a third edge and a fourth edge; a substrate; a semiconductor stack formed on the substrate, including a first semiconductor layer, a second semiconductor layer and an active layer formed therebetween; a transparent conductive layer, formed on the second semiconductor layer; a first electrode formed on the first semiconductor layer, including a first pad electrode and a first finger electrode extending from the first pad electrode; and a second electrode formed on the first second semiconductor layer, including a second pad electrode and a second finger electrode extending from the second pad electrode; wherein the first finger electrode is disposed at and along the first edge; and wherein in top view, an overlapping portions of the first finger electrode and the second finger electrode are non-parallel.
    Type: Application
    Filed: January 18, 2018
    Publication date: July 26, 2018
    Inventors: Li-Ming CHANG, Tzung-Shiun YEH, Chien-Fu SHEN, Yu-Rui LIN, Chen OU, Hsin-Ying WANG, Hui-Chun YEH