Patents by Inventor Li Wang

Li Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12154503
    Abstract: A parameter adjustment method of a display module includes: setting an initial value of a light-emitting delay time and specified gray levels; based on the initial value of the light-emitting delay time, adjusting the light-emitting delay time stepwise until a value of an adjusted light-emitting delay time exceeds a preset range of the light-emitting delay time, so that values of the light-emitting delay time within the preset range of the light-emitting delay time are obtained; obtaining flicker values of the display module at the specified gray levels for each value of the light-emitting delay time; and determining a preferred value of the light-emitting delay time from the values of the light-emitting delay time according to flicker values corresponding to the values of the light-emitting delay time.
    Type: Grant
    Filed: February 24, 2022
    Date of Patent: November 26, 2024
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Guangliang Shang, Li Wang, Baoyun Wu, Xiyu Zhao, Yu Feng, Libin Liu, Shiming Shi
  • Publication number: 20240388721
    Abstract: Decoding methods and encoding methods based on an adaptive intra refresh mechanism and related devices are provided. In one aspect, a decoding method includes: receiving a bit stream of a current frame; and determining whether the current frame supports an adaptive intra refresh technology. The determining comprises one of: if there is extension data in the bit stream of the current frame and the extension data carries an adaptive intra refresh video extension identifier (ID), obtaining virtual boundary position information carried in the extension data, and determining whether the current frame supports an adaptive intra refresh technology based on the virtual boundary position information; or if there is no adaptive intra refresh video extension ID in the extension data in the bit stream of the current frame, determining that the current frame does not support the adaptive intra refresh technology.
    Type: Application
    Filed: July 30, 2024
    Publication date: November 21, 2024
    Inventors: Liang WEI, Fangdong CHEN, Li WANG
  • Publication number: 20240385674
    Abstract: A computing system performs balanced power management based on requirements of graphics scenes in a video game. Based on the requirements of the graphics scenes, the system selects one or more performance metrics to reduce in real-time, where the performance metrics are indicators of video game quality. The system compares estimated power consumption with a power budget after reducing the one or more performance metrics. Based on the requirements of the graphics scenes, the system further selects one or more quality enhancers to activate in real-time while keeping the estimated power consumption within the power budget. Each quality enhancer enhances the video game with respect to a performance metric. The system then displays the video game enhanced by the one or more quality enhancers.
    Type: Application
    Filed: February 10, 2023
    Publication date: November 21, 2024
    Inventors: Chien-Nan Lin, You-Ming Tsao, Yung-Hsin Chu, An-Li Wang, Yu-Ting Kuo
  • Publication number: 20240382763
    Abstract: Disclosed are a pulse stimulation control method and apparatus, a medical system, an electronic device, and a medium. The method comprises: acquiring a first sensing time of an R wave in a preset electrocardiogram; determining a sensing event and a second sensing time thereof in a local myocardial electrocardiogram corresponding to a set myocardial position; and when the second sensing time does not meet a first preset condition, determining that the sensing event is not an R wave signal corresponding to the R wave in the preset electrocardiogram, and then not delivering corresponding pulse simulation. The present invention enables the pulse stimulation to be delivered only when the R wave is determined, and the pulse stimulation is delivered during a deliverable period of the R wave in the preset electrocardiogram, so that the reliability, safety, and timeliness of the pulse stimulation on the heart of a patient are ensured.
    Type: Application
    Filed: July 29, 2024
    Publication date: November 21, 2024
    Inventor: Li Wang
  • Publication number: 20240387675
    Abstract: Low-resistance contacts improve performance of integrated circuit devices that feature epitaxial source/drain regions. The low resistance contacts can be used with transistors of various types, including planar field effect transistors (FETs), FinFETs, and gate-all-around (GAA) FETs. Low-resistance junctions are formed by removing an upper portion of the source/drain region and replacing it with an epitaxially-grown boron-doped silicon germanium (SiGe) material. Material resistivity can be tuned by varying the temperature during the epitaxy process. Electrical contact is then made at the low-resistance junctions.
    Type: Application
    Filed: July 30, 2024
    Publication date: November 21, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURNING COMPANY, LTD.
    Inventors: Tsungyu HUNG, Pang-Yen TSAI, Ding-Kang SHIH, Sung-Li WANG, Chia-Hung CHU
  • Patent number: 12145251
    Abstract: The power tool comprises a first power tool portion having a rotatable collar and a first locking member arranged to be actuated by the rotatable collar and a second power tool portion having a second locking member. The rotatable collar is rotatable about an axis for actuating the first locking member to removably engage the first locking member with the second locking member, thereby releasably locking the first power tool portion with the second power tool portion along the axis.
    Type: Grant
    Filed: December 11, 2018
    Date of Patent: November 19, 2024
    Assignee: Techtronic Cordless GP
    Inventors: Li Wang Yuan, Jing Yao Chen, Yi Mai, Song Long
  • Patent number: 12149101
    Abstract: Power transmission associated with wireless charging of a battery of an electronic device or powering of the electronic device comprises determining a power loss associated with transmitting a power signal having a transmitted power from the wireless power transmitter to a wireless power receiver. A closed loop power loss control based on the power loss is performed which comprises outputting a target transmit power to meet a power loss limit. The power signal having the target transmit power is wirelessly transmitted to the wireless power receiver to charge the battery of the electronic device or power the electronic device and balance charging performance and safety.
    Type: Grant
    Filed: August 1, 2022
    Date of Patent: November 19, 2024
    Assignee: NXP USA, Inc.
    Inventors: Huan Mao, Dechang Wang, Li Wang
  • Patent number: 12150353
    Abstract: A display substrate has sub-pixels. Each column of sub-pixels includes first and second sub-pixels alternately arranged. The display substrate includes a base, a second source-drain metal layer including first and second connection portions, and a first source-drain metal layer including first and second data lines alternately arranged. A pixel driving circuit of each first sub-pixel is connected to a second end of a first connection portion, and a first end there is connected to a corresponding first data line. A pixel driving circuit of each second sub-pixel is connected to a second end of a second connection portion, and a first end thereof is connected to a corresponding second data line. In a same column of sub-pixels, an extension direction of a first line connecting a second end of a first connection portion and a second end of a second connection portion is substantially parallel to a second direction.
    Type: Grant
    Filed: February 8, 2021
    Date of Patent: November 19, 2024
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Long Han, Tian Dong, Li Wang
  • Patent number: 12148807
    Abstract: The present disclosure describes a method to form a semiconductor device with backside contact structures. The method includes forming a semiconductor device on a first side of a substrate. The semiconductor device includes a source/drain (S/D) region. The method further includes etching a portion of the S/D region on a second side of the substrate to form an opening and forming an epitaxial contact structure on the S/D region in the opening. The second side is opposite to the first side. The epitaxial contact structure includes a first portion in contact with the S/D region in the opening and a second portion on the first portion. A width of the second portion is larger than the first portion.
    Type: Grant
    Filed: July 9, 2021
    Date of Patent: November 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Hung Chu, Ding-Kang Shih, Keng-Chu Lin, Pang-Yen Tsai, Sung-Li Wang, Shuen-Shin Liang, Tsungyu Hung, Hsu-Kai Chang
  • Patent number: 12148346
    Abstract: The present disclosure provides a pixel circuit, a display panel and a display apparatus. A gate of a data writing transistor is electrically connected with a first scan line, a first electrode of the data writing transistor is electrically connected with a data line, and a second electrode of the data writing transistor is electrically connected with a first electrode of a drive transistor; a compensation circuit is electrically connected with the gate of the drive transistor; and a light emitting control circuit is electrically connected with a first power signal line, the first electrode and the second electrode of the drive transistor, and a first electrode of a light emitting device, respectively; an orthographic projection of the compensation circuit on a base substrate partially overlaps with an orthographic projection of the first power signal line on the base substrate.
    Type: Grant
    Filed: August 21, 2023
    Date of Patent: November 19, 2024
    Assignee: Beijing BOE Technology Development Co., Ltd.
    Inventors: Li Wang, Xinshe Yin
  • Publication number: 20240379758
    Abstract: A semiconductor device structure and methods of forming the same are described. In some embodiments, the structure includes an N-type source/drain epitaxial feature disposed over a substrate, a P-type source/drain epitaxial feature disposed over the substrate, a first silicide layer disposed directly on the N-type source/drain epitaxial feature, and a second silicide layer disposed directly on the P-type source/drain epitaxial feature. The first and second silicide layers include a first metal, and the second silicide layer is substantially thicker than the first silicide layer. The structure further includes a third silicide layer disposed directly on the first silicide layer and a fourth silicide layer disposed directly on the second silicide layer. The third and fourth silicide layer include a second metal different from the first metal, and the third silicide layer is substantially thicker than the fourth silicide layer.
    Type: Application
    Filed: May 11, 2023
    Publication date: November 14, 2024
    Inventors: Wei-Yip LOH, Hong-Mao LEE, Harry CHIEN, Po-Chin CHANG, Sung-Li WANG, Jhih-Rong HUANG, Tzer-Min SHEN, Chih-Wei CHANG
  • Publication number: 20240379422
    Abstract: A device includes a substrate, a gate structure wrapping around a vertical stack of nanostructure semiconductor channels, and a source/drain abutting the vertical stack and in contact with the nanostructure semiconductor channels. The device includes a gate via in contact with the first gate structure. The gate via includes a metal liner layer having a first flowability, and a metal fill layer having a second flowability higher than the first flowability.
    Type: Application
    Filed: July 24, 2024
    Publication date: November 14, 2024
    Inventors: Sheng-Tsung WANG, Lin-Yu HUANG, Cheng-Chi CHUANG, Sung-Li WANG, Chih-Hao WANG
  • Publication number: 20240379425
    Abstract: A method includes forming a device region over a substrate; forming a first dielectric layer over the device region; forming an opening in the first dielectric layer; conformally depositing a first conductive material along sidewalls and bottom surfaces of the opening; depositing a second conductive material on the first conductive material to fill the opening, wherein the second conductive material is different from the first conductive material; and performing a first thermal process to form an interface region extending from a first region of the first conductive material to a second region of the second conductive material, wherein the interface region includes a homogeneous mixture of the first conductive material and the second conductive material.
    Type: Application
    Filed: July 23, 2024
    Publication date: November 14, 2024
    Inventors: Bo-Yu Lai, Chin-Szu Lee, Szu-Hua Wu, Shuen-Shin Liang, Chia-Hung Chu, Keng-Chu Lin, Sung-Li Wang
  • Publication number: 20240374722
    Abstract: A T cell product for administration to a subject and a use thereof are provided. The product includes at least one allogeneic T cell, which expresses at least one MHC molecule identified as an exogenous source by at least one T cell of the subject. The T cell product can widen the range of a donor and activate an immune response of the subject. The T cell product is used in the preparation of a drug for treating tumors.
    Type: Application
    Filed: August 24, 2022
    Publication date: November 14, 2024
    Inventors: Linhong LI, Xiangyang ZHU, Wuqing LIU, Shijun YU, Pengcheng XIN, Li WANG, Xingxing YANG, Yifan ZHAN, Xiaoyue WEI
  • Publication number: 20240379797
    Abstract: In an embodiment, a device includes: a first insulating fin; a second insulating fin; a nanostructure between the first insulating fin and the second insulating fin; and a gate structure wrapping around the nanostructure, a top surface of the gate structure disposed above a top surface of the first insulating fin, the top surface of the gate structure disposed below a top surface of the second insulating fin.
    Type: Application
    Filed: July 23, 2024
    Publication date: November 14, 2024
    Inventors: Cheng-Wei Chang, Shahaji B. More, Yi-Ying Liu, Shuen-Shin Liang, Sung-Li Wang
  • Publication number: 20240379457
    Abstract: A semiconductor structure includes a substrate, a first silicide, and a second silicide. The substrate has a first epitaxy region in a first transistor of a first conductive type and a second epitaxy region in a second transistor of a second conductive type. The first silicide is on the first epitaxy region, the first silicide comprising a first metal and a second metal, and the second silicide is on the second epitaxy region. A work function of the first silicide is greater than a work function of the second silicide.
    Type: Application
    Filed: July 25, 2024
    Publication date: November 14, 2024
    Inventors: SUNG-LI WANG, PENG-WEI CHU, YASUTOSHI OKUNO
  • Publication number: 20240377338
    Abstract: An inspection method for electronic devices includes the steps of: providing an object under test; inspecting the object under test through an inspection system having an optical apparatus, including the steps of: using the optical apparatus to provide a first inspection light to inspect a first position of the object under test, and then receiving a first reflection light for being recorded in a controller; moving the optical apparatus; and using the optical apparatus to provide a second inspection light to inspect the first position of the object under test, and then receiving a second reflection light for being recorded in the controller; and determining whether there is an abnormality through the first reflection light and the second reflection light.
    Type: Application
    Filed: April 9, 2024
    Publication date: November 14, 2024
    Inventors: Kuang-Ming FAN, Ju-Li WANG
  • Publication number: 20240371565
    Abstract: A wireless charging receiver that includes a first coil, a second coil, and a nanocrystalline sheet is disclosed. The first coil is configured to be located within a recess in the nanocrystalline sheet and is positioned between the second coil and the nanocrystalline sheet. The first coil includes first and second terminals and the second coil includes third and fourth terminals. The first terminal is connected to the third terminal and the second terminal is connected to the fourth terminal to electrically connect the first coil to the second coil. The first coil may be formed of a flexible printed circuit board having a continuous trace or may be formed of litz wire. The first coil may be a hybrid coil with a first portion formed of a flexible printed circuit board having a continuous trace and with a second portion formed of litz wire.
    Type: Application
    Filed: June 13, 2024
    Publication date: November 7, 2024
    Applicant: Google LLC
    Inventors: Li Wang, Liyu Yang, Stefano Saggini, Liang Jia, Yanchao Li, Zhenxue Xu, Haoquan Zhang, Mauricio Antonio Alvarado Ortega, Giulia Segatti, Pingsheng Wu, Srikanth Lakshmikanthan, Qi Tian, Veera Venkata Siva Nagesh Polu, Yung-Chih Chen, Yi Lin Chen, Wei Chen Tu
  • Publication number: 20240371952
    Abstract: The present disclosure describes a method to form a semiconductor device with backside contact structures. The method includes forming a semiconductor device on a first side of a substrate. The semiconductor device includes a source/drain (S/D) region. The method further includes etching a portion of the S/D region on a second side of the substrate to form an opening and forming an epitaxial contact structure on the S/D region in the opening. The second side is opposite to the first side. The epitaxial contact structure includes a first portion in contact with the S/D region in the opening and a second portion on the first portion. A width of the second portion is larger than the first portion.
    Type: Application
    Filed: July 11, 2024
    Publication date: November 7, 2024
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chia-Hung CHU, Tsungyu Hung, Hsu-Kai Chang, Ding-Kang Shih, Keng-Chu Lin, Pang-Yen Tsai, Sung-Li Wang, Shuen-Shin Liang
  • Publication number: 20240367823
    Abstract: A variable-stroke self-adaptive adjustment quasi-zero stiffness device includes an integrating sphere, a target, a collimator, a pointing measuring instrument, a disturbance source, an inertia simulation tooling, a quasi-zero stiffness suspension adjustment device and an optical air-bearing platform. The integrating sphere, the target and the collimator are coaxially mounted on the optical air-bearing platform in sequence. The pointing measuring instrument is connected and fixed with the inertia simulation tooling through a screw; three disturbance sources are mounted on the inertia simulation tooling to provide small disturbance and inertia for the pointing measuring instrument; the quasi-zero stiffness suspension adjustment device suspends the inertia simulation tooling to provide a free boundary environment; and the quasi-zero stiffness suspension adjustment device, the pointing measuring instrument, the disturbance source and the inertia simulation tooling form a set of two-pendulum system as a whole.
    Type: Application
    Filed: August 16, 2022
    Publication date: November 7, 2024
    Inventors: Li Yuan, Li Wang, Lin Li, Yanpeng Wu, Jun Zhong, Qin Zhao, Ran Zheng, Jingya Qi, Chengyu Zhang