Abstract: A device includes a fin extending from a semiconductor substrate; a gate stack over the fin; a first spacer on a sidewall of the gate stack; a source/drain region in the fin adjacent the first spacer; an inter-layer dielectric layer (ILD) extending over the gate stack, the first spacer, and the source/drain region, the ILD having a first portion and a second portion, wherein the second portion of the ILD is closer to the gate stack than the first portion of the ILD; a contact plug extending through the ILD and contacting the source/drain region; a second spacer on a sidewall of the contact plug; and an air gap between the first spacer and the second spacer, wherein the first portion of the ILD extends across the air gap and physically contacts the second spacer, wherein the first portion of the ILD seals the air gap.

Abstract: A carrier structure is provided, in which at least one positioning area is defined on a chip-placement area of a package substrate, and at least one alignment portion is disposed on the positioning area. Therefore, the precision of manufacturing the alignment portion is improved by disposing the positioning area on the chip-placement area, such that the carrier structure can provide a better alignment mechanism for the chip placement operation.

Abstract: The present invention discloses an organic polymer film and a manufacturing method thereof. The organic polymer film is mainly manufactured by the following steps. Firstly, the step (A) provides a xylene precursor and a substrate, and the step (B) places the substrate inside of a plasma equipment. After that, the step (C) evacuates the plasma equipment while introducing a carrier gas which carries vapor of the xylene precursor, and the step (D) turns on a pulse power supply system of the plasma equipment, generating a short pulse for plasma ignition. Finally, the step (E) forms the organic polymer film on the substrate. In the aforementioned steps, the frequency of the short pulse plasma is between 1 Hz˜10,000 Hz, and the pulse period of the short pulse plasma is between 1 ?s˜60 ?s.

Abstract: Various embodiments of the present disclosure are directed towards an integrated chip. The integrated chip includes an interconnect structure overlying a semiconductor substrate and comprising a conductive wire. A passivation structure overlies the interconnect structure. An upper conductive structure overlies the passivation structure and comprises a first conductive layer, a dielectric layer, and a second conductive layer. The first conductive layer is disposed between the dielectric layer and the passivation structure. The second conductive layer extends along a top surface of the dielectric layer and penetrates through the first conductive layer and the passivation structure to the conductive wire.

Abstract: A semiconductor structure includes a substrate and a first capacitor. The substrate includes an active region. The first capacitor is over the substrate and free from overlapping the active region from a top view perspective.

Abstract: A laser apparatus includes at least one electro-optic (EO) medium through which a polarized laser beam passes for N times, forming a plurality of first-pass to Nth-pass beams, by reflecting the polarized laser beam from at least one reflection mirror, and a power supplier configured to alternately provide a 1/N of a half-wave (?/2) or quarter-wave (?/4) voltage and remove the voltage to the EO medium, ? being a wavelength of the polarized laser beam. The at least one EO medium is tilted at angle ? and/or angle ? with respect to one of the plurality of first-pass to Nth-pass beams. The at least one EO medium comprises a M number of EO mediums, and the power supplier is configured to alternately provide a 1/M*N of a half-wave (?/2) or quarter-wave (?/4) voltage and remove the voltage to each of the M number of EO mediums.

Abstract: A semiconductor device and a method of forming the same are provided. The semiconductor device includes a substrate, a gate structure, a dielectric structure and a contact structure. The substrate has source/drain (S/D) regions. The gate structure is on the substrate and between the S/D regions. The dielectric structure covers the gate structure. The contact structure penetrates through the dielectric structure to connect to the S/D region. A lower portion of a sidewall of the contact structure is spaced apart from the dielectric structure by an air gap therebetween, while an upper portion of the sidewall of the contact structure is in contact with the dielectric structure.

Abstract: This disclosure discloses an optical sensing device. The device includes a carrier body; a first light-emitting device disposed on the carrier body; and a light-receiving device including a group III-V semiconductor material disposed on the carrier body, including a light-receiving surface having an area, wherein the light-receiving device is capable of receiving a first received wavelength having a largest external quantum efficiency so the ratio of the largest external quantum efficiency to the area is ?13.

Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a first hard mask on the first barrier layer; removing the first hard mask and the first barrier layer to form a recess; forming a second barrier layer in the recess; and forming a p-type semiconductor layer on the second barrier layer.

Abstract: A method of forming a semiconductor device includes forming a photoresist layer over a mask layer, patterning the photoresist layer, and forming an oxide layer on exposed surfaces of the patterned photoresist layer. The mask layer is patterned using the patterned photoresist layer as a mask.

Abstract: This patent presents a multidimensional space vector modulation (MDSVM) circuit formed by coupling a half-bridge logic control circuit not directly coupled to electronic components with at least three half-bridge logic control circuits coupled to electronic components. The half-bridge logic control circuit not directly coupled with any electronic components can form a full-bridge circuit with any other half-bridge logic control circuit coupled with electronic components. Therefore, users can further control the voltage difference between both ends of each electronic component separately and then individually control the strength and direction of current flowing through each electronic component and solving the problem of control attributed to the complexity of prior art.

Abstract: In a method for obtaining the equivalent oxide thickness of a dielectric layer, a first semiconductor capacitor including a first silicon dioxide layer and a second semiconductor capacitor including a second silicon dioxide layer are provided and a modulation voltage is applied to the semiconductor capacitors to measure a first scanning capacitance microscopic signal and a second scanning capacitance microscopic signal. According to the equivalent oxide thicknesses of the silicon dioxide layers and the scanning capacitance microscopic signals, an impedance ratio is calculated. The modulation voltage is applied to a third semiconductor capacitor including a dielectric layer to measure a third scanning capacitance microscopic signal. Finally, the equivalent oxide thickness of the dielectric layer is obtained according to the equivalent oxide thickness of the first silicon dioxide layer, the first scanning capacitance microscopic signal, third scanning capacitance microscopic signal, and the impedance ratio.

Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a first hard mask on the first barrier layer; removing the first hard mask and the first barrier layer to form a recess; forming a second barrier layer in the recess; and forming a p-type semiconductor layer on the second barrier layer.

Abstract: The present disclosure provides a method for preparing a composition including mesenchymal stem cells, extracellular vesicles produced by the mesenchymal stem cells, and growth factors, the composition prepared by the method, and use of the composition for treating arthritis. The composition of the present disclosure achieves the effect of treating arthritis through various efficacy experiments.

Abstract: A system and a method for parameter optimization with adaptive search space and a user interface using the same are provided. The system includes a data acquisition unit, an adaptive adjustment unit and an optimization search unit. The data acquisition unit obtains a set of executed values of several operating parameters and a target parameter. The adaptive adjustment unit includes a parameter space transformer and a search range definer. The parameter space transformer performs a space transformation on a parameter space of the operating parameters according to the executed values. The search range definer defines a parameter search range in a transformed parameter space based on the sets of the executed values. The optimization search unit takes the parameter search range as a limiting condition and takes optimizing the target parameter as a target to search for a set of recommended values of the operating parameters.

Abstract: A vibration module is provided, having a main axis passing through the center of the vibration module. The vibration module includes a fixed part and a first vibration part. The first vibration part is disposed within the fixed part. The first vibration part includes a first moving member and a first driving assembly. The first driving assembly drives the first moving member to move along the main axis relative to the fixed part.

Abstract: The present disclosure provides a method for treating liver cirrhosis by using a composition including mesenchymal stem cells, extracellular vesicles produced by the mesenchymal stem cells, and growth factors. The composition of the present disclosure achieves the effect of treating liver cirrhosis through various efficacy experiments.

Abstract: An electronic device and a manufacturing method thereof are provided. The electronic device includes a circuit substrate, a plurality of electronic components, a plurality of carriers, and a bonding layer. The circuit substrate includes a circuit layer. The plurality of electronic components are disposed on the circuit substrate. The circuit layer is electrically connected to at least one of the plurality of electronic components. The plurality of carriers are disposed on the circuit substrate. The bonding layer bonds the plurality of carriers to the circuit substrate. At least one gap is between the plurality of carriers. A width of the gap is Wg. An average width of the plurality of carriers is Wa. A width of the circuit substrate is Wc. The electronic device satisfies: Wa*2*10?4<Wg<(Wc?Wa*2).

Abstract: A method includes providing a substrate having a surface such that a first hard mask layer is formed over the surface and a second hard mask layer is formed over the first hard mask layer, forming a first pattern in the second hard mask layer, where the first pattern includes a first mandrel oriented lengthwise in a first direction and a second mandrel oriented lengthwise in a second direction different from the first direction, and where the first mandrel has a top surface, a first sidewall, and a second sidewall opposite to the first sidewall, and depositing a material towards the first mandrel and the second mandrel such that a layer of the material is formed on the top surface and the first sidewall but not the second sidewall of the first mandrel.

Abstract: A plunger pump base and a plunger pump device. The plunger pump base includes a support assembly and an extension assembly. The support assembly includes a top plate, a bottom plate and a support frame, the top plate and the bottom plate are oppositely arranged at an interval, and the support frame is respectively fixed with the top plate and the bottom plate. The extension assembly includes an extension block, a first telescopic mechanism and a second telescopic mechanism. One end of the first telescopic mechanism is rotatably connected to the extension block, the other end of the first telescopic mechanism is rotatably connected to the top plate. One end of the second telescopic mechanism is rotatably connected to the extension block, and the other end of the second telescopic mechanism is rotatably connected to the bottom plate.