Abstract: A system and a method for parameter optimization with adaptive search space and a user interface using the same are provided. The system includes a data acquisition unit, an adaptive adjustment unit and an optimization search unit. The data acquisition unit obtains a set of executed values of several operating parameters and a target parameter. The adaptive adjustment unit includes a parameter space transformer and a search range definer. The parameter space transformer performs a space transformation on a parameter space of the operating parameters according to the executed values. The search range definer defines a parameter search range in a transformed parameter space based on the sets of the executed values. The optimization search unit takes the parameter search range as a limiting condition and takes optimizing the target parameter as a target to search for a set of recommended values of the operating parameters.

Abstract: The present disclosure provides a method for treating liver cirrhosis by using a composition including mesenchymal stem cells, extracellular vesicles produced by the mesenchymal stem cells, and growth factors. The composition of the present disclosure achieves the effect of treating liver cirrhosis through various efficacy experiments.

Abstract: An electronic device and a manufacturing method thereof are provided. The electronic device includes a circuit substrate, a plurality of electronic components, a plurality of carriers, and a bonding layer. The circuit substrate includes a circuit layer. The plurality of electronic components are disposed on the circuit substrate. The circuit layer is electrically connected to at least one of the plurality of electronic components. The plurality of carriers are disposed on the circuit substrate. The bonding layer bonds the plurality of carriers to the circuit substrate. At least one gap is between the plurality of carriers. A width of the gap is Wg. An average width of the plurality of carriers is Wa. A width of the circuit substrate is Wc. The electronic device satisfies: Wa*2*10?4<Wg<(Wc?Wa*2).

Abstract: A method includes providing a substrate having a surface such that a first hard mask layer is formed over the surface and a second hard mask layer is formed over the first hard mask layer, forming a first pattern in the second hard mask layer, where the first pattern includes a first mandrel oriented lengthwise in a first direction and a second mandrel oriented lengthwise in a second direction different from the first direction, and where the first mandrel has a top surface, a first sidewall, and a second sidewall opposite to the first sidewall, and depositing a material towards the first mandrel and the second mandrel such that a layer of the material is formed on the top surface and the first sidewall but not the second sidewall of the first mandrel.

Abstract: A plunger pump base and a plunger pump device. The plunger pump base includes a support assembly and an extension assembly. The support assembly includes a top plate, a bottom plate and a support frame, the top plate and the bottom plate are oppositely arranged at an interval, and the support frame is respectively fixed with the top plate and the bottom plate. The extension assembly includes an extension block, a first telescopic mechanism and a second telescopic mechanism. One end of the first telescopic mechanism is rotatably connected to the extension block, the other end of the first telescopic mechanism is rotatably connected to the top plate. One end of the second telescopic mechanism is rotatably connected to the extension block, and the other end of the second telescopic mechanism is rotatably connected to the bottom plate.

Abstract: Embodiments disclosed herein relate to using an implantation process and a melting anneal process performed on a nanosecond scale to achieve a high surface concentration (surface pile up) dopant profile and a retrograde dopant profile simultaneously. In an embodiment, a method includes forming a source/drain structure in an active area on a substrate, the source/drain structure including a first region comprising germanium, implanting a first dopant into the first region of the source/drain structure to form an amorphous region in at least the first region of the source/drain structure, implanting a second dopant into the amorphous region containing the first dopant, and heating the source/drain structure to liquidize and convert at least the amorphous region into a crystalline region, the crystalline region containing the first dopant and the second dopant.

Abstract: A method of forming a semiconductor device includes forming a mask layer over a substrate and forming an opening in the mask layer. A gap-filling material is deposited in the opening. A plasma treatment is performed on the gap-filling material. The height of the gap-filling material is reduced. The mask layer is removed. The substrate is patterned using the gap-filling material as a mask.

Abstract: A detection device for detecting an eyeball includes a frame element, a transceiver, and a contact lens element. The transceiver is disposed on the frame element. The transceiver transmits a first RF (Radio Frequency) signal. The contact lens element includes a resonator. The resonator converts the first RF signal into a first ultrasonic signal. The first ultrasonic signal is transmitted to the eyeball. The resonator converts a second ultrasonic signal from the eyeball into a second RF signal. The transceiver receives the second RF signal.

Abstract: A ghost key preventing circuit includes plural driving lines, plural sensing lines, plural key switches, plural bias resistors and a controller. The plural driving lines and the plural sensing lines are collaboratively formed as a matrix circuit. The plural key switches are included in the matrix circuit. The plural bias resistors are connected with the corresponding sensing lines. When the key switch of a specified switch circuit is turned on, a divided voltage is generated and outputted from the specified switch circuit. The controller judges whether the key switch of the specified switch circuit is normally turned on or the key switch is a ghost key according to the divided voltage.

Abstract: A method for manufacturing an integrated circuit includes patterning a plurality of photomask layers over a substrate, partially backfilling the patterned plurality of photomask layers with a first material using atomic layer deposition, completely backfilling the patterned plurality of photomask layers with a second material using atomic layer deposition, removing the plurality of photomask layers to form a masking structure comprising at least one of the first and second materials, and transferring a pattern formed by the masking structure to the substrate and removing the masking structure. The first material includes a silicon dioxide, silicon carbide, or carbon material, and the second material includes a metal oxide or metal nitride material.

Abstract: A vinyl-containing copolymer is copolymerized from (a) first compound, (b) second compound, and (c) third compound. (a) First compound is an aromatic compound having a single vinyl group. (b) Second compound is polybutadiene or polybutadiene-styrene having side vinyl groups. (c) Third compound is an acrylate compound. The vinyl-containing copolymer includes 0.003 mol/g to 0.010 mol/g of benzene ring, 0.0005 mol/g to 0.008 mol/g of vinyl group, and 1.2*10?5 mol/g to 2.4*10?4 mol/g of ester group.

Abstract: The present disclosure relates to a method of operating an OSD function for a public-place-device. The method includes: detecting a touch input through the touch screen while the OSD function is in the locked state; causing the OSD function to operate in the unlocked state in response to detecting a predetermined touch secret code, so as to output an OSD image on the display and conduct an OSD configuration of the display according to an OSD operation from an external entity; and causing the OSD function to operate in the locked state in response to receiving an OSD locking request while the OSD function is in the unlocked state, so as not to output the OSD image on the display and not to respond to an OSD operation from an external entity. The present disclosure also relates to an OSD system and a self-service device for the public-place-device.

Abstract: A method and a system for consolidating a subterranean formation are provided. An exemplary method includes injecting a water-in-oil emulsion into an unconsolidated subterranean formation, wherein the water-in-oil emulsion includes comonomers in an oil phase to form a polyurethane resin, and a catalyst in an aqueous phase. The method also includes allowing the polyurethane resin to cure to form a porous polymeric network.

Abstract: A semiconductor device includes a first gate structure extending along a first lateral direction. The semiconductor device includes a first interconnect structure, disposed above the first gate structure, that extends along a second lateral direction perpendicular to the first lateral direction. The first interconnect structure includes a first portion and a second portion electrically isolated from each other by a first dielectric structure. The semiconductor device includes a second interconnect structure, disposed between the first gate structure and the first interconnect structure, that electrically couples the first gate structure to the first portion of the first interconnect structure. The second interconnect structure includes a recessed portion that is substantially aligned with the first gate structure and the dielectric structure along a vertical direction.

Abstract: An electronic device display may have pixels formed from crystalline semiconductor light-emitting diode dies, organic light-emitting diodes, or other pixel structures. The pixels may be formed on a display panel substrate. A display panel may extend continuously across the display or multiple display panels may be tiled in two dimensions to cover a larger display area. Interconnect substrates may have outwardly facing contacts that are electrically shorted to corresponding inwardly facing contacts such as inwardly facing metal pillars associated with the display panels. The interconnect substrates may be supported by glass layers. Integrated circuits may be embedded in the display panels and/or in the interconnect substrates. A display may have an active area with pixels that includes non-spline pixels in a non-spline display portion located above a straight edge of the display and spline pixel in a spline display portion located above a curved edge of the display.

Abstract: A semiconductor device includes a through-silicon via (TSV) in a TSV zone in a substrate and the TSV extends through the substrate; an ESD cell proximal to a first end of the TSV and in contact with the TSV zone, the ESD cell including a set of diodes electrically connected in parallel to each other; an antenna pad electrically connected to a second end of the TSV; and an antenna electrically connected to the antenna pad and extending in a first direction, the first direction is parallel to a major axis of the TSV. The semiconductor device includes a conductive pillar extending parallel to the TSV at a same side of the substrate as the antenna pad, wherein a first end of the conductive pillar electrically connects to the antenna pad, and a second end of the conductive pillar electrically connects to the set of diodes of the ESD cell.

Abstract: A semiconductor device includes first and second active regions extending in parallel in a substrate, a plurality of conductive patterns, each conductive pattern of the plurality of conductive patterns extending on the substrate across each of the first and second active regions, and a plurality of metal lines, each metal line of the plurality of metal lines overlying and extending across each of the first and second active regions. Each conductive pattern of the plurality of conductive patterns is electrically connected in parallel with each metal line of the plurality of metal lines.

Abstract: A method of correcting a misalignment of a wafer on a wafer holder and an apparatus for performing the same are disclosed. In an embodiment, a semiconductor alignment apparatus includes a wafer stage; a wafer holder over the wafer stage; a first position detector configured to detect an alignment of a wafer over the wafer holder in a first direction; a second position detector configured to detect an alignment of the wafer over the wafer holder in a second direction; and a rotational detector configured to detect a rotational alignment of the wafer over the wafer holder.

Abstract: An optimization method for a mask pattern optical transfer includes steps as follows: First, a projection optical simulation is performed to obtain an optimal pupil configuration scheme corresponding to a virtual mask pattern. Next, a position scanning is performed to change the optimal pupil configuration scheme, so as to generate a plurality of adjusted pupil configuration schemes. A mask pattern transfer simulation is performed to obtain a plurality of pupil configuration schemes-critical dimension relationship data corresponding to the virtual mask pattern. Subsequently, an actual pupil configuration scheme suitable for an actual mask pattern is selected according to the plurality of pupil configuration schemes-critical dimension relationship data, and upon which an actual mask pattern transfer is performed.

Abstract: A semiconductor device includes a substrate. The semiconductor device includes a fin that is formed over the substrate and extends along a first direction. The semiconductor device includes a gate structure that straddles the fin and extends along a second direction perpendicular to the first direction. The semiconductor device includes a first source/drain structure coupled to a first end of the fin along the first direction. The gate structure includes a first portion protruding toward the first source/drain structure along the first direction. A tip edge of the first protruded portion is vertically above a bottom surface of the gate structure.