Patents by Inventor Liang Lin

Liang Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11973086
    Abstract: The invention discloses a display panel, comprising: a first substrate including a display region and a peripheral region adjacent to each other; a plurality of pixel units disposed on the first substrate and located in the display region; a control circuit disposed on the first substrate, located in the peripheral region and electrically connected to the pixel units; a planarization layer disposed on the first substrate, extending from the display region to the peripheral region and covering the pixel units and the control circuit; and a bonding pad disposed on the first substrate and located above the planarization layer; wherein a projection area of the bonding pad on the first substrate and a projection area of the control circuit on the first substrate have an overlapped region.
    Type: Grant
    Filed: October 21, 2019
    Date of Patent: April 30, 2024
    Assignees: AU OPTRONICS (KUNSHAN) CO., LTD., AU OPTRONICS CORPORATION
    Inventors: Chin-Chuan Liu, Fu Liang Lin
  • Patent number: 11973050
    Abstract: Various embodiments of the present disclosure are directed towards an integrated chip. The integrated chip includes an interconnect structure overlying a semiconductor substrate and comprising a conductive wire. A passivation structure overlies the interconnect structure. An upper conductive structure overlies the passivation structure and comprises a first conductive layer, a dielectric layer, and a second conductive layer. The first conductive layer is disposed between the dielectric layer and the passivation structure. The second conductive layer extends along a top surface of the dielectric layer and penetrates through the first conductive layer and the passivation structure to the conductive wire.
    Type: Grant
    Filed: June 2, 2021
    Date of Patent: April 30, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu-Yu Lin, Yao-Wen Chang, Chia-Wen Zhong, Yen-Liang Lin
  • Patent number: 11972956
    Abstract: A lid attach process includes dipping a periphery of a lid in a dipping tank of adhesive material such that the adhesive material attaches to the periphery of the lid. The lid attach process further includes positioning the lid over a die attached to a substrate using a lid carrier, wherein the periphery of the lid is aligned with a periphery of the lid carrier. The lid attach process further includes attaching the lid to the substrate with the adhesive material forming an interface with the substrate. The lid attach process further includes contacting a thermal interface material (TIM) on the die with the lid.
    Type: Grant
    Filed: May 22, 2020
    Date of Patent: April 30, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chin-Liang Chen, Wei-Ting Lin, Yu-Chih Liu, Kuan-Lin Ho, Jason Shen
  • Patent number: 11972984
    Abstract: A semiconductor device includes a fin-shaped structure on a substrate, a gate structure on the fin-shaped structure and an interlayer dielectric (ILD) layer around the gate structure, and a single diffusion break (SDB) structure in the ILD layer and the fin-shaped structure. Preferably, the SDB structure includes a bottom portion and a top portion on the bottom portion, in which the top portion and the bottom portion include different widths.
    Type: Grant
    Filed: December 26, 2022
    Date of Patent: April 30, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Ching-Ling Lin, Wen-An Liang, Chen-Ming Huang
  • Publication number: 20240134931
    Abstract: A matrix computing device and an operation method for the matrix computing device are provided. The matrix computing device includes a storage unit, a control circuit, and a computing circuit. The storage unit includes a weight matrix. The control circuit re-orders an arrangement order of weights in the weight matrix according to a shape of an output matrix to determine a weight readout order of the weights. The computing circuit receives the weights based on the weight readout order, and performs a matrix computation on the weights and an input matrix to generate a computing matrix. The control circuit performs a reshape transformation on the computing matrix to generate the output matrix, and writes the output matrix to the storage unit.
    Type: Application
    Filed: December 7, 2022
    Publication date: April 25, 2024
    Applicant: NEUCHIPS CORPORATION
    Inventors: Chiung-Liang Lin, YuShan Ruan, Huan Jan Chou
  • Publication number: 20240133918
    Abstract: In a method for obtaining the equivalent oxide thickness of a dielectric layer, a first semiconductor capacitor including a first silicon dioxide layer and a second semiconductor capacitor including a second silicon dioxide layer are provided and a modulation voltage is applied to the semiconductor capacitors to measure a first scanning capacitance microscopic signal and a second scanning capacitance microscopic signal. According to the equivalent oxide thicknesses of the silicon dioxide layers and the scanning capacitance microscopic signals, an impedance ratio is calculated. The modulation voltage is applied to a third semiconductor capacitor including a dielectric layer to measure a third scanning capacitance microscopic signal. Finally, the equivalent oxide thickness of the dielectric layer is obtained according to the equivalent oxide thickness of the first silicon dioxide layer, the first scanning capacitance microscopic signal, third scanning capacitance microscopic signal, and the impedance ratio.
    Type: Application
    Filed: April 12, 2023
    Publication date: April 25, 2024
    Inventors: MAO-NAN CHANG, CHI-LUN LIU, HSUEH-LIANG CHOU, YI-SHAN WU, CHIAO-JUNG LIN, YU-HSUN HSUEH
  • Publication number: 20240136463
    Abstract: This disclosure discloses an optical sensing device. The device includes a carrier body; a first light-emitting device disposed on the carrier body; and a light-receiving device including a group III-V semiconductor material disposed on the carrier body, including a light-receiving surface having an area, wherein the light-receiving device is capable of receiving a first received wavelength having a largest external quantum efficiency so the ratio of the largest external quantum efficiency to the area is ?13.
    Type: Application
    Filed: December 20, 2023
    Publication date: April 25, 2024
    Applicant: EPISTAR CORPORATION
    Inventors: Yi-Chieh LIN, Shiuan-Leh LIN, Yung-Fu CHANG, Shih-Chang LEE, Chia-Liang HSU, Yi HSIAO, Wen-Luh LIAO, Hong-Chi SHIH, Mei-Chun LIU
  • Patent number: 11967596
    Abstract: An integrated circuit includes a first-voltage power rail and a second-voltage power rail in a first connection layer, and includes a first-voltage underlayer power rail and a second-voltage underlayer power rail below the first connection layer. Each of the first-voltage and second-voltage power rails extends in a second direction that is perpendicular to a first direction. Each of the first-voltage and second-voltage underlayer power rails extends in the first direction. The integrated circuit includes a first via-connector connecting the first-voltage power rail with the first-voltage underlayer power rail, and a second via-connector connecting the second-voltage power rail with the second-voltage underlayer power rail.
    Type: Grant
    Filed: August 5, 2021
    Date of Patent: April 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Guo-Huei Wu, Shih-Wei Peng, Wei-Cheng Lin, Hui-Zhong Zhuang, Chih-Liang Chen, Li-Chun Tien, Lee-Chung Lu
  • Publication number: 20240124844
    Abstract: The present disclosure provides a method for preparing a composition including mesenchymal stem cells, extracellular vesicles produced by the mesenchymal stem cells, and growth factors, the composition prepared by the method, and use of the composition for treating arthritis. The composition of the present disclosure achieves the effect of treating arthritis through various efficacy experiments.
    Type: Application
    Filed: October 4, 2023
    Publication date: April 18, 2024
    Inventors: Chia-Hsin Lee, Po-Cheng Lin, Yong-Cheng Kao, Ming-Hsi Chuang, Chun-Hung Chen, Chao-Liang Chang, Kai-Ling Zhang
  • Publication number: 20240118222
    Abstract: A defect detection and removal apparatus including a removing unit, an image capturing unit, and a determining unit is provided. The removing unit is configured to remove at least one defective micro-element on a substrate. The image capturing unit is configured to capture a detection image of at least one defective micro-element correspondingly on the substrate. The determining unit is coupled to the image capturing unit and the removing unit. The image capturing unit executes capturing a first detection image before the removing unit executes removing a defective micro-element, and executes capturing a second detection image after the removing unit executes removing the defective micro-element. The determining unit confirms whether the defective micro-element has been removed according to the first and second detection image obtained from the image capturing unit. A defect detection and removal method is also provided.
    Type: Application
    Filed: November 21, 2022
    Publication date: April 11, 2024
    Applicant: PlayNitride Display Co., Ltd.
    Inventors: Chang-Rong Lin, Ching-Liang Lin
  • Publication number: 20240115616
    Abstract: The present disclosure provides a method for treating liver cirrhosis by using a composition including mesenchymal stem cells, extracellular vesicles produced by the mesenchymal stem cells, and growth factors. The composition of the present disclosure achieves the effect of treating liver cirrhosis through various efficacy experiments.
    Type: Application
    Filed: October 4, 2023
    Publication date: April 11, 2024
    Inventors: Po-Cheng Lin, Pi-Chun Huang, Zih-Han Hong, Ming-Hsi Chuang, Yi-Chun Lin, Chia-Hsin Lee, Chun-Hung Chen, Chao-Liang Chang, Kai-Ling Zhang
  • Publication number: 20240120236
    Abstract: A method includes etching a gate stack in a wafer to form a trench, depositing a silicon nitride liner extending into the trench, and depositing a silicon oxide layer. The process of depositing the silicon oxide layer includes performing a treatment process on the wafer using a process gas including nitrogen and hydrogen, and performing a soaking process on the wafer using a silicon precursor.
    Type: Application
    Filed: April 25, 2023
    Publication date: April 11, 2024
    Inventors: Tai-Jung Kuo, Po-Cheng Shih, Wan Chen Hsieh, Zhen-Cheng Wu, Chia-Hui Lin, Tze-Liang Lee
  • Publication number: 20240118605
    Abstract: A method for forming a photomask includes the following steps. A first target pattern is provided, wherein the first target pattern includes a first pattern area and a second pattern area. The first pattern area includes a block pattern. The second pattern area includes multiple stripe patterns. A first sidewall reset area is defined in the second pattern area. A retarget procedure is executed on the first target pattern to obtain a second target pattern. The photomask is formed based on the second target pattern.
    Type: Application
    Filed: November 3, 2022
    Publication date: April 11, 2024
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventor: Chun-Liang Lin
  • Patent number: 11952368
    Abstract: Provided are a fibroblast activation protein inhibitor (FAPI) dimer compound, an FAPI dimer-based positron emission tomography (PET) imaging agent for tumor diagnosis, and a preparation method and use thereof. An amphiphilic polyethylene glycol (PEG) chain and a dimerized structure of FAPI in the FAPI dimer compound with a structure shown in formula I can improve the in vivo kinetic properties of the compound and prolong a residence time of the compound in a tumor, thereby improving the uptake and imaging effects in the tumor. The accurate tumor diagnosis can be achieved by labeling the FAPI dimer compound with a diagnostic nuclide (68Ga), which has promising application prospects in PET imaging for diagnosis and in the preparation of a therapeutic nuclide (such as 177Lu or 90Y)-labeled drug for treating a FAP-?-expressing tumor.
    Type: Grant
    Filed: September 29, 2022
    Date of Patent: April 9, 2024
    Assignee: Xiamen University
    Inventors: Haojun Chen, Liang Zhao, Qin Lin, Kaili Fu, Yizhen Pang, Zhide Guo, Jianyang Fang, Long Sun, Hua Wu
  • Patent number: 11955338
    Abstract: A method includes providing a substrate having a surface such that a first hard mask layer is formed over the surface and a second hard mask layer is formed over the first hard mask layer, forming a first pattern in the second hard mask layer, where the first pattern includes a first mandrel oriented lengthwise in a first direction and a second mandrel oriented lengthwise in a second direction different from the first direction, and where the first mandrel has a top surface, a first sidewall, and a second sidewall opposite to the first sidewall, and depositing a material towards the first mandrel and the second mandrel such that a layer of the material is formed on the top surface and the first sidewall but not the second sidewall of the first mandrel.
    Type: Grant
    Filed: January 30, 2023
    Date of Patent: April 9, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shih-Chun Huang, Ya-Wen Yeh, Chien-Wen Lai, Wei-Liang Lin, Ya Hui Chang, Yung-Sung Yen, Ru-Gun Liu, Chin-Hsiang Lin, Yu-Tien Shen
  • Patent number: 11950771
    Abstract: The present invention provides a supporting hook structure, comprising a sleeve, a fixing rod, a first limit unit, a hook and a fixing device. The fixing rod is connected to the side surface of the sleeve. The hook body is connected to one end of the sleeve. The first limit unit is arranged on the side surface of the sleeve and adjacent to the hook body. The first limit unit makes the hook body rotates with the axis direction of the sleeve as a rotation axis. The fixing device is connected to the other end of the sleeve to fix the rotating position of the hook body. Through the above, the hook part enters the proximal thigh from a surgical entrance and the hook part rotates to make the hook part abut against the proximal femur to complete the positioning and fixation of the femur hook structure to the femur.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: April 9, 2024
    Assignee: UNITED ORTHOPEDIC CORPORATION
    Inventors: Yan-Shen Lin, Jiann-Jong Liau, Yu-Liang Liu, Teh-Yang Lin, Wen-Chuan Chen
  • Publication number: 20240110968
    Abstract: An inspection system includes an excitation light source, a voltage-sensing film, an illumination light source, an image capture device. The excitation light source provides an excitation beam to light-emitting diodes to generate open-circuit voltages. The voltage-sensing film is at a top side of the light-emitting diodes and includes a voltage-sensing medium layer and a first electrode layer. The first electrode layer is in the voltage-sensing medium layer to provide a gain effect of the open-circuit voltages, so that the voltage-sensing medium layer senses the open-circuit voltages, and a display of the voltage-sensing medium layer is changed with a portion or all of the open-circuit voltages. The illumination light source provides an illumination beam to the voltage-sensing film to generate a sensing image according to a display change. The image capture device is on a transmission path of the sensing image and receives the sensing image to generate an inspection result.
    Type: Application
    Filed: June 14, 2023
    Publication date: April 4, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Yan-Rung Lin, Chung-Lun Kuo, Chia-Liang Yeh
  • Publication number: 20240114591
    Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may be a UE. The UE sends a request message to a core network. The request message requests joining one or more requested multicast broadcast service (MBS) sessions. The UE receives a response message from the core network. The response message contains received MBS information indicating one or more admitted MBS sessions. The received MBS information includes a respective IP address type (IPAT) field. The IPAT field indicates a type of an IP address corresponding to each of the one or more admitted MBS sessions. The UE decodes the IP address corresponding to each of the one or more admitted MBS sessions according to the type indicated by the respective IPAT field.
    Type: Application
    Filed: September 22, 2023
    Publication date: April 4, 2024
    Inventors: Yu-Hsin Lin, Shao-Liang Yeh, Yuan-Chieh Lin
  • Publication number: 20240113166
    Abstract: A method for fabricating semiconductor devices includes forming channel regions over a substrate. The channel regions, in parallel with one another, extend along a first lateral direction. Each channel region includes at least a respective pair of epitaxial structures. The method includes forming a gate structure over the channel regions, wherein the gate structure extends along a second lateral direction. The method includes removing, through a first etching process, a portion of the gate structure that was disposed over a first one of the channel regions. The method includes removing, through a second etching process, a portion of the first channel region. The second etching process includes one silicon etching process and one silicon oxide deposition process. The method includes removing, through a third etching process controlled based on a pulse signal, a portion of the substrate that was disposed below the removed portion of the first channel region.
    Type: Application
    Filed: February 15, 2023
    Publication date: April 4, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu-Ging Lin, Chun-Liang Lai, Yun-Chen Wu, Ya-Yi Tsai, Shu-Yuan Ku, Shun-Hui Yang
  • Patent number: 11947217
    Abstract: A backlight module including a light guide plate, a light source, a diffuse reflector and a light-splitting film is provided. The light guide plate has a light incident surface, and a light-emitting surface and a bottom surface which are respectively connected to the light incident surface and opposite to each other. The light source is disposed on one side of the light incident surface of the light guide plate. The diffuse reflector is disposed on one side of the bottom surface of the light guide plate. The light-splitting film is disposed between the light guide plate and the diffuse reflector. The light-splitting film has a substrate and a plurality of first optical microstructures disposed on one side of the substrate. An extending direction of the first optical microstructures intersects with the light incident surface of the light guide plate. A display apparatus using the backlight module is also provided.
    Type: Grant
    Filed: October 23, 2022
    Date of Patent: April 2, 2024
    Assignee: Coretronic Corporation
    Inventors: Tzeng-Ke Shiau, Yi-Cheng Lin, Chia-Liang Kang