Abstract: A thermosensitive hydrogel for coating radioisotopes and chemotherapeutic agents to treat cancer and a method for preparing the same are revealed. The anticancer drugs such as radiopharmaceuticals or chemotherapeutic agents are coated with the hydrogel formed by PCL-PEG-PCL. By the feature of the hydrogel body that changes from liquid phase at low storage temperature to gel form at body temperature, not only the anticancer drugs can be injected into the human body and reaching the treatment site smoothly but the treatment time of brachytherapy is also extended. Thus the side effects of cancer therapy are significantly reduced.

Abstract: A method and device for displaying a window of security class software are disclosed. The method includes processing a window based on a selected window style according to a detection result of a security status of a processing equipment detected by the security class software, and displaying the window corresponding to the detection result. Based on characteristics of the security class software, a solution that can display different windows under one window style according to the detection result of the processing equipment is provided, so that a user can intuitively know the current security status of the processing equipment through an intelligently displayed window. Using skin change technology of the security class software, a user can be informed intuitively and vividly that whether the processing equipment used by the user is safe or not.

Abstract: A tire changer is provided for mounting/dismounting a tire to/from a wheel rim. The tire changer includes a tire fixing device mounted to a support arm and including a transmission cylinder that is rotatably mounted to the support arm and driven by a power device, a first retention member, a second retention member, and a fastening member. The transmission cylinder receives therein a transmission shaft having an end projecting outside the cylinder and forming a fastening section. The first and second retention members are mounted to the transmission shaft and both form a slope that is set in abutting engagement with an inside surface of a fixing bore formed in the rim. The fastening member is coupled to the fastening section to be positioned against the second retention member to thereby secure the rim between the first and second retention members.

Abstract: A cache-coherence protocol distributes atomic operations among multiple processors (or processor cores) that share a memory space. When an atomic operation that includes an instruction to modify data stored in the shared memory space is directed to a first processor that does not have control over the address(es) associated with the data, the first processor sends a request, including the instruction to modify the data, to a second processor. Then, the second processor, which already has control of the address(es), modifies the data. Moreover, the first processor can immediately proceed to another instruction rather than waiting for the address(es) to become available.

Abstract: In an integrated-circuit memory device having a memory core, a first data value is retrieved from an address-specified location within the memory core in response to a memory access command. The first data value is output from the memory device in response to the memory access command, and a second data value is stored in the address-specified location within the memory core in response to the memory access command.

Abstract: In a method for providing location-based information over a network, a plurality of GPS reference data sets, corresponding to a plurality of respective local areas, are acquired at intervals such that each GPS reference data set is updated on a continuous basis. A plurality of aiding data sets are generated at intervals based on the respective GPS data sets, whereby each aiding data set is updated on a continuous basis. The generated aiding data sets are stored at intervals on a data-storing network server, whereby updated aiding data sets are available on a continuous basis for access by a requesting entity via communication with the data-storing network server.

Abstract: A shared memory architecture for a GPS receiver, wherein a processing memory is shared among the different processing functions, such as the correlator signal processing, tracking processing, and other applications processing. The shared memory architecture within the GPS receiver provides the memory necessary for signal processing operations, such as the massively parallel processing, while conserving memory cost by re-using that same memory for other GPS and non-GPS applications. The shared memory architecture for a GPS receiver provided in accordance with the principles of this invention thereby significantly minimize the costly memory requirement often required of extremely fast signal acquisition of a GPS receiver.

Abstract: A cache-coherence protocol distributes atomic operations among multiple processors (or processor cores) that share a memory space. When an atomic operation that includes an instruction to modify data stored in the shared memory space is directed to a first processor that does not have control over the address(es) associated with the data, the first processor sends a request, including the instruction to modify the data, to a second processor. Then, the second processor, which already has control of the address(es), modifies the data. Moreover, the first processor can immediately proceed to another instruction rather than waiting for the address(es) to become available.

Abstract: An Aided Location Communication System (“ALCS”) is described that may include a geolocation server and a wireless communication device having a GPS section where the GPS receiver section is capable of being selectively switched between a standalone mode and at least one other mode for determining a geolocation of the wireless communications device. An Aided Location Communication Device (“ALCD”) is also described. The ALCD includes a position-determination section having a GPS receiver and a communication section where the position-determination section is selectively switchable between a GPS-standalone mode and at least one other mode for determining a geolocation of the ALCD.

Abstract: An Aided Location Communication System (“ALCS”) is described that may include a geolocation server and a wireless communication device having a GPS section where the GPS receiver section is capable of being selectively switched between a standalone mode and at least one other mode for determining a geolocation of the wireless communications device. An Aided Location Communication Device (“ALCD”) is also described. The ALCD includes a position-determination section having a GPS receiver and a communication section where the position-determination section is selectively switchable between a GPS-standalone mode and at least one other mode for determining a geolocation of the ALCD.

Abstract: A frequency phase correction system and method are described that provides a receiver with a greater ability to lock onto relatively weak radio frequency signals by determining and estimating an amount of frequency error in a local frequency reference of the receiver, and using the error estimate to maintain frequency coherence with a received signal, thereby allowing tracking over a longer period of time, enabling longer integration times to capture weaker signals without losing frequency coherence.

Abstract: The present embodiments provide a system for graphically rendering an object. This system operates first by pre-processing a geometry mesh for the object offline, wherein the geometry mesh is partitioned into a set of patches, and wherein each patch is bounded by a bounding box. The system then builds a multi-resolution representation for each of the set of patches. Next, during real time rendering, the system deforms the bounding boxes associated with the set of patches through superposition of object motions in each frame weighted by a set of predetermined mesh-skinning parameters. For each deformed bounding box, the system computes a geometry level-of-detail (LOD) value based on a projected area of the deformed bounding box in screen space. The system next deforms the object through a set of mesh skinning operations. The system then renders the deformed object based on the computed geometry LOD values for the set of patches and the multi-resolution representation for the geometry mesh.

Abstract: An apparatus for mitigating condensation formation on a device interface board during low-temperature semiconductor device testing includes a nozzle. The nozzle includes an input orifice for receiving gas from a gas source and at least one output orifice for discharging gas from the nozzle against a surface of the device interface board. The area of the at least one output orifice is substantially greater than the area of input orifice.

Abstract: The invention relates to an aided Global Positioning System (GPS) subsystem within a wireless device. The wireless device includes a wireless processing section capable of receiving signals from a wireless network and a GPS subsystem having a radio frequency (RF) front-end capable of receiving a GPS satellite signal. The wireless processing section of the wireless device receives an external clock and determines the offset between the clock in the wireless processing section and that of the external clock. The GPS subsystem then receives the offset information from the wireless processing section, information related to the nominal frequency of the wireless processing section clock and the wireless processing section clock. Using this information and the GPS clock in the GPS subsystem, the GPS subsystem determines an acquiring signal, which is related to a frequency offset between the GPS clock and the network clock.

Abstract: A system, method and article of manufacture are provided for shadow mapping while rendering a primitive in a graphics pipeline. Initially, an offset operation is performed in order to generate a depth value while rendering a primitive. Further, a value of a slope associated with an edge of the primitive is identified. Thereafter, the depth value is conditionally clamped based on the value of the slope.

Abstract: A tracker architecture for Global Positioning System (GPS) receivers is disclosed. A typical tracker comprises an RF front end and GPS architecture. The architecture comprises a bus structure, a Central Processing Unit (CPU) core, cache, RAM, and ROM memories, and a GPS engine that comprises a receiving, tracking, and demodulating engine for GPS and Wide Area Augmentation Service (WAAS) signals. The GPS architecture can couple to at least two different protocol interfaces via the bus structure, where the protocol interfaces are commonly used in different applications.

Abstract: In one embodiment, a DSP structure includes four main sections: DEQ, IDCT for row, IDCT for column, and motion compensation. The data input sequence is organized in such a way to facilitate the data loading into hardware structures for row IDCT and column IDCT. Two types of decoding flows are enabled by the DSP structure: H.264 decoding flows (e.g., dequantization, inverse discrete Hadamard transform, intra prediction, and motion decompensation), and non-H.264 decoding flows (e.g., dequantization, row inverse discrete cosine transformation, column inverse discrete cosine transformation, and motion decompensation). The non-H.264 decoding flow can be used for standards such as MPEG1/2/4, H.263, Microsoft WMV9, and Sony Digital Video.

Abstract: An architecture capable of stream parsing of the H.264 Content Based Adaptive Binary Arithmetic Coding (CABAC) format is disclosed. The architecture employs a two pass dataflow approach to implement the functions of CABAC bit parsing and decoding processes (based on the H.264 CABAC algorithm). The architecture can be implemented, for example, as a system-on-chip (SOC) for a video/audio decoder for use high definition television broadcasting (HDTV) applications. Other such video/audio decoder applications are enabled as well.

Abstract: A shared memory architecture for a GPS receiver, wherein a processing memory is shared among the different processing functions, such as the correlator signal processing, tracking processing, and other applications processing. The shared memory architecture within the GPS receiver provides the memory necessary for signal processing operations, such as the massively parallel processing, while conserving memory cost by re-using that same memory for other GPS and non-GPS applications. The shared memory architecture for a GPS receiver provided in accordance with the principles of this invention thereby significantly minimize the costly memory requirement often required of extremely fast signal acquisition of a GPS receiver.

Abstract: A tracker architecture for Global Positioning System (GPS) receivers is disclosed. A typical tracker comprises an RF front end and GPS architecture. The architecture comprises a bus structure, a Central Processing Unit (CPU) core, cache, RAM, and ROM memories, and a GPS engine that comprises a receiving, tracking, and demodulating engine for GPS and Wide Area Augmentation Service (WAAS) signals. The GPS architecture can couple to at least two different protocol interfaces via the bus structure, where the protocol interfaces are commonly used in different applications.