Patents by Inventor Liang Tung

Liang Tung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090058281
    Abstract: There is disclosed herein phosphorescent compounds, uses thereof, and devices including organic light emitting diode (OLEDs) including such compounds. Compounds of interest include: wherein A is Os or Ru The anionic chelating chromophores N?N, which are formed by connecting one pentagonal ring structure containing at least two nitrogen atoms to a hexagonal pyridine type of fragment via a direct carbon-carbon linkage. L is a neutral donor ligand; the typical example includes carbonyl, pyridine, phosphine, arsine and isocyanide; two neutral L's can also combine to produce the so-called chelating ligand such as 2,2?-bipyridine, 1,10-phenanthroline and N-heterocyclic carbene (NHC) ligand, or bidentate phosphorous ligands such as 1,2-bis(diphenylphosphino)ethane, 1,2-bis(diphenylphosphino)benzene. L can occupy either cis or trans orientation.
    Type: Application
    Filed: July 11, 2008
    Publication date: March 5, 2009
    Inventors: Ye Tao, Yun Chi, Yung-Liang Tung, Arthur Carty, Pi-Tai Chou
  • Publication number: 20070001166
    Abstract: There is disclosed herein phosphorescent compounds, uses thereof, and devices including organic light emitting diode (OLEDs) including such compounds. Compounds of interest include: wherein A is Os or Ru The anionic chelating chromophores NˆN, which are formed by connecting one pentagonal ring structure containing at least two nitrogen atoms to a hexagonal pyridine type of fragment via a direct carbon-carbon linkage. L is a neutral donor ligand; the typical example includes carbonyl, pyridine, phosphine, arsine and isocyanide; two neutral L's can also combine to produce the so-called chelating ligand such as 2,2?-bipyridine, 1,10-phenanthroline and N-heterocyclic carbene (NHC) ligand, or bidentate phosphorous ligands such as 1,2-bis(diphenylphosphino)ethane, 1,2-bis(diphenylphosphino)benzene. L can occupy either cis or trans orientation.
    Type: Application
    Filed: May 22, 2006
    Publication date: January 4, 2007
    Inventors: Ye Tao, Yun Chi, Yung-Liang Tung, Arthur Carty
  • Publication number: 20050137400
    Abstract: There is disclosed herein phosphorescent compounds, uses thereof, and devices including organic light emitting diode (OLEDs) including such compounds. Compounds of interest include: wherein A is Os or Ru The anionic chelating chromophores N{circumflex over (?)}N, which are formed by connecting one pentagonal ring structure containing at least two nitrogen atoms to a hexagonal pyridine type of fragment via a direct carbon-carbon linkage. L is a neutral donor ligand; the typical example includes carbonyl, pyridine, phosphine, arsine and isocyanide; two neutral L's can also combine to produce the so-called chelating ligand such as 2,2?-bipyridine, 1,10-phenanthroline and N-heterocyclic carbene (NHC) ligand, or bidentate phosphorous ligands such as 1,2-bis(diphenylphosphino)ethane, 1,2-bis(diphenylphosphino)benzene. L can occupy either cis or trans orientation.
    Type: Application
    Filed: November 5, 2004
    Publication date: June 23, 2005
    Inventors: Ye Tao, Yun Chi, Yung-Liang Tung, Arthur Carty
  • Publication number: 20020168858
    Abstract: The present invention relates to an etching gas assistant epitaxial method, which is accomplished by introducing etching gas into the processing chamber during epitaxial deposition process. Because the etching gas has different etching rates with respect to grains of different orientations, grains with different sizes and orientations are going to be removed by the etching gas and a fine epitaxial deposited layer can thus be obtained. Furthermore, the method of the present invention can be used for depositing epitaxy on mismatched or amorphous substrates or films, such as oxide, nitride, and even metal substrates, to extend the applications of epitaxy.
    Type: Application
    Filed: September 17, 2001
    Publication date: November 14, 2002
    Inventor: Liang-Tung Chang
  • Publication number: 20020117672
    Abstract: A high-brightness blue-light emitting crystalline structure is provided for enhancing illuminating intensity of a blue-light emitting diode by taking advantage of a sapphire substrate, which is provided with a multi-layer distributed Bragg reflector (DBR) or a plated mirror layer on its surface for reflecting a part of the light created from a P-GaN surface so as to supplement the other part of light, which penetrates a transparent conductive layer directly. And, indium tin oxide is adopted for serving as a transparent conductive layer of blue-light emitting diode, or an extraordinarily thin nickel/aurum layer is plated on the P-GaN surface precedently before forming the ITO conductive layer to thereby care both the light-permeability and the ohmic contact resistance. A plurality of anti-reflection coatings (ARC) is formed on the ITO conductive layer for the enhancement of blue-light emissivity.
    Type: Application
    Filed: February 23, 2001
    Publication date: August 29, 2002
    Inventors: Ming-Sung Chu, Shi-Kun Chen, Chun-Yung Sung, Liang-Tung Chang
  • Patent number: 6239034
    Abstract: A method of manufacturing an inter-metal level dielectric layer for a semiconductor device. The method includes forming spaced conductive lines. Next, a first conformal silicon oxide film (barrier layer) is formed over the spaced conductive lines. Gaps or valleys are between the metal lines covered by the barrier layer. A novel first “gap filling” spin-on-glass layer is formed over the first silicon oxide layer. In a critical step, the first SOG layer is heated to reflow thereby flowing all the first spin-on-glass layer from over the metal lines and leaving all of the first SOG layer in the gaps. Subsequently, a second silicon oxide layer is deposited over the first silicon oxide layer and over the first spin-on-glass layer only in the gaps. A second spin-on-glass layer is then formed over the second silicon oxide layer. An etchback is performed by etching back and removing the entire second spin on glass layer and portions the second silicon oxide layer.
    Type: Grant
    Filed: November 2, 1998
    Date of Patent: May 29, 2001
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Fu-Liang Yang, Liang-Tung Chang
  • Patent number: 6169298
    Abstract: A semiconductor light emitting device, such as the light emitting diode (LED) or the laser diode (LD), having a structure in which a light emitting area is a double heterostructure or a multi-layer quantum well structure. The light emitting area is formed on a substrate. Subsequently, an electrically conductive oxide layer as a transparent window layer to eliminate the crowding effect is formed on the light emitting area. The substrate layer consists of a GaAs substrate and a GaAsP layer to increasing the band gap energy of the substrate. The electrically conductive oxide layer is formed of AlZnO(x) material, having a lower electrical resistivity and a high transparency in the visible wavelength region. The window layer is formed using a physical vapor deposition or a metalorganic chemical vapor deposition.
    Type: Grant
    Filed: August 10, 1998
    Date of Patent: January 2, 2001
    Assignee: Kingmax Technology Inc.
    Inventors: Ying-Fu Lin, Liang-Tung Chang, Shiang-Peng Cheng, Kuan-Chu Kuo, Chiao-Yun Lin, Fu-Chou Liu
  • Patent number: 6097041
    Abstract: A light emitting diode includes a semiconductor substrate of a first conductivity type. A first electrode is formed on a part of the substrate. A reflection stack of the first conductivity type is formed on the substrate. An active layer is then formed on the reflection stack. An anti-reflection stack of a second conductivity type is grown on the active layer, and the anti-reflection stack consists of a plurality of layers, wherein each layer has a thickness of (m+1).lambda./2, where m is zero or a positive integer and .lambda. is a wavelength of radiation generated by the active layer. A window layer of the second conductivity type is formed on the anti-reflection stack. A second electrode is then formed on a part of the window layer.
    Type: Grant
    Filed: August 24, 1998
    Date of Patent: August 1, 2000
    Assignee: Kingmax Technology Inc.
    Inventors: Ying-Fu Lin, Liang-Tung Chang, Shiang-Peng Cheng, Kuan-Chu Kuo, Chiao-Yun Lin, Fu-Chou Liu
  • Patent number: 6037263
    Abstract: A method for plasma assisted CVD deposition of tungsten and of tungsten compounds is described wherein a plasma containing a high density of active hydrogen species is maintained to scavenge fluorine and fluoride species formed by the decomposition of the tungsten precursor WF.sub.6. The activated hydrogen species also assist in the breaking of W--F bonds, thereby facilitating the decompoition process and forming high density, high conductivity, fluoride free conductive films of tungsten and of tungsten compounds. The ability to form such fluoride free tungsten films with the assistance of activated hydrogen species, permits the deposition of tungsten directly onto gate oxides thereby enabling the formation of tungsten gate electrodes without underlying polysilicon. Low conductivity tungsten contacts including in-situ formed tungsten compound barrier layers may also be formed by this process.
    Type: Grant
    Filed: November 5, 1998
    Date of Patent: March 14, 2000
    Assignee: Vanguard International Semiconductor Corporation
    Inventor: Liang-Tung Chang
  • Patent number: 6008507
    Abstract: A structure of a semiconductor light emitting device includes a GaAs substrate, a GaAsP interface substrate, a first cladding layer, an active layer, and a second cladding layer. The GaAsP interface substrate layer is formed on the GaAs substrate, in addition, the GaAsP interface substrate layer formed on the substrate is of a thickness such that the upper surface of the GaAsP interface substrate layer adjacent to the substrate is composed of single crystal. The first cladding layer of a first conductivity is formed on the GaAsP interface substrate layer. The active layer is formed on the first cladding layer, from which the light is generated in the active layer. The second cladding layer of a second conductivity is formed on the active layer.
    Type: Grant
    Filed: September 1, 1998
    Date of Patent: December 28, 1999
    Assignee: Kingmax Technology Inc.
    Inventors: Ying-Fu Lin, Liang-Tung Chang, Shiang-Peng Cheng, Kuan-Chu Kuo, Chiao-Yun Lin, Fu-Chou Liu
  • Patent number: 6004877
    Abstract: A titanium layer is formed on a dielectric layer. A TiN layer is formed on the titanium layer to act as a barrier layer. A rapid thermal annealing is performed. A tungsten layer is deposited by useing chemical vapor deposition with N.sub.2 plasma treatment. In a preferred embodiment, the temperature of the deposition ranges from 300 to 500 degrees centigrade. The gas pressure of the process is about 2 to 4 torr. The power of the plasma is about 300 to 800 Further, the treatment time of the N.sub.2 plasma ranges from 50 to 150 seconds. An etching back step is carried to etch a portion of the tuugsten layer.
    Type: Grant
    Filed: February 26, 1998
    Date of Patent: December 21, 1999
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Tony Liang-Tung Chang, Shiang-Peng Cheng
  • Patent number: 5858882
    Abstract: A method of forming an interlevel dielectric layer without peeling or cracking in the fabrication of an integrated circuit device is described. Semiconductor device structures are provided in and on a semiconductor substrate. An insulating layer is provided overlying the semiconductor device structures and a first conducting layer is provided overlying the insulating layer and extending down through the insulating layer to contact one of the semiconductor device structures. A first dielectric layer is deposited overlying the first conducting layer. A spin-on-glass layer is coated over the first dielectric layer and then etched back wherein a polymer builds up on the spin-on-glass surface. The spin-on-glass layer is treated with an oxygen plasma treatment wherein the treatment neutralizes the polymer buildup and prevents cracking and peeling of the spin-on-glass layer. A TEOS layer is deposited overlying the spin-on-glass layer to complete the interlevel dielectric layer.
    Type: Grant
    Filed: March 24, 1997
    Date of Patent: January 12, 1999
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Liang-Tung Chang, Chih-Cherng Liao
  • Patent number: 5801097
    Abstract: A thermal annealing method for forming a nitride layer within an integrated circuit. There is first provided a substrate. There is then formed over the substrate a nitride forming material layer. The nitride forming material layer is then annealed through a thermal annealing method in the presence of an atmosphere of activated nitrogen to yield a nitride layer. The method is particularly useful for forming titanium nitride barrier layers and titanium nitride adhesion promoter layers within integrated circuits.
    Type: Grant
    Filed: March 10, 1997
    Date of Patent: September 1, 1998
    Assignee: Vanguard International Semiconductor Corporation
    Inventor: Tony Liang-Tung Chang
  • Patent number: 5788767
    Abstract: The present invention is a method for using a single SiN layer as a passivation film. The single layer SiN can be strengthened to withstand stress by adjusting the process parameters during formation of the SiN layer. In general, the process can be changed by increasing the low frequency power 5% during the deposition. Alternatively, the pressure of the SiN deposition may be decreased about 20% in pressure.
    Type: Grant
    Filed: December 31, 1996
    Date of Patent: August 4, 1998
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Jun-Cheng Ko, Liang-Tung Tony Chang
  • Patent number: 4685654
    Abstract: A flow regulator for drip infusion, comprising a rigid main body in which a rigid flow path is integrally formed. The flow path is substantially omega-shaped, and has a V-shaped cross section in its middle section, of which the upper side is open and closed by a flexible disc which has a ridge extending perpendicular to the flow path and can be pressed to change the effective size of an orifice formed between the ridge and the V-shaped flow path, thereby allowing for a stable control of the flow rate.
    Type: Grant
    Filed: January 8, 1987
    Date of Patent: August 11, 1987
    Inventor: Liang-Tung Hu
  • Patent number: 4575041
    Abstract: This invention relates to a controller and in particular to a liquid flow controller for intravenous injection comprising a first cylindrical member provided at one end surface with a pair of threaded tongues which extend outwardly therefrom and form a recess thereof, a flange being properly disposed on said end surface, a second cylindrical member being hollowed and threadedly engaged with said first cylindrical member, an annular member provided at a first end surface with a hole being received within and secured to said second cylindrical member, a controlling rod being inserted into and located within said annular member, a rubber hose partially surrounded by a rubber ring being positioned in said recess and clamped between said flange and said controlling rod, a solid rubber rod being inserted into and received within said rubber hose, and a pair of connectors being disposed on the both terminals of said rubber hose of a better connection.
    Type: Grant
    Filed: January 17, 1985
    Date of Patent: March 11, 1986
    Inventor: Liang-Tung Hu