Abstract: An electronic package and a substrate structure thereof are provided, in which an electronic element and a flow stopper surrounding the electronic element are disposed on a substrate body of the substrate structure, and a heat dissipation structure is bonded on the electronic element via a heat dissipation material, so that the flow stopper limits an overflow range of the heat dissipation material to prevent the heat dissipation material from contaminating a circuit layer on the substrate body.

Abstract: An electronic package and a manufacturing method thereof are provided, in which an electronic structure and a wall structure surrounding the electronic structure are disposed on a carrier structure, a heat conducting layer is formed on the electronic structure, and the wall structure and the heat conducting layer are covered by a heat dissipation element. Therefore, a thermal stress can be effectively dispersed by the arrangement of the wall structure, such that a warpage of the electronic structure and a heat dissipation body can be effectively controlled.

Abstract: A method of manufacturing an electronic package is provided, in which an electronic element is disposed on a carrier structure; a heat dissipation body of a heat dissipation structure is disposed on the electronic element via a heat dissipation material; the heat dissipation material is cured; supporting legs of the heat dissipation structure are fixed on the carrier structure via a bonding layer; and the bonding layer is cured. Therefore, the heat dissipation structure can be effectively fixed to the heat dissipation material and the bonding layer by completing the arrangements of the heat dissipation material and the bonding layer in stages.

Abstract: Disclosed herein is novel double-stranded short interfering ribonucleic acid (siRNA) capable of suppressing the translation of Aurora-A mRNA. Also disclosed are use of the novel siRNA as disclosed herein for manufacturing a medicament suitable for treating a cancer, which is mediated through epidermal growth factor receptor (EGFR) signaling. Accordingly, a pharmaceutical composition comprising the disclosed novel siRNA molecules is provided; as well as a method of treating a subject suffering from EGFR-mediated cancer via administering to the subject the disclosed novel siRNA molecule.

Abstract: A method of fabricating a packaging substrate is provided, including: providing a carrier having two carrying portions, each of the carrying portions having a first side and a second side opposite to the first side and the carrying portions are bonded through the second sides thereof; forming a circuit layer on the first side of each of the carrying portions; and separating the two carrying portions from each other to form two packaging substrates. The carrying portions facilitate the thinning of the circuit layers and provide sufficient strength for the packaging substrates to undergo subsequent packaging processes. The carrying portions can be removed after the packaging processes to reduce the thickness of packages and thereby meet the miniaturization requirement.

Abstract: Disclosed herein is novel double-stranded short interfering ribonucleic acid (siRNA) capable of suppressing the translation of Aurora-A mRNA. Also disclosed are use of the novel siRNA as disclosed herein for manufacturing a medicament suitable for treating a cancer, which is mediated through epidermal growth factor receptor (EGFR) signaling. Accordingly, a pharmaceutical composition comprising the disclosed novel siRNA molecules is provided; as well as a method of treating a subject suffering from EGFR-mediated cancer via administering to the subject the disclosed novel siRNA molecule.

Abstract: An electronic device is provided, which includes an electronic element and a heat dissipating element disposed on the electronic element through a thermal conductor, wherein a width of the thermal conductor is smaller than a width of the electronic element. The thermal conductor includes silver to thereby greatly increase the thermal conductivity of the thermal conductor and hence improve the thermal conduction efficiency of the electronic device.

Abstract: A method for fabricating a package structure is provided, including the steps of: disposing and electrically connecting a sensing chip to a substrate; forming an encapsulant on the substrate to encapsulate the sensing chip; and forming a bright layer on the encapsulant to increase the gloss of the package structure. The encapsulant includes an additive to increase the Mohs hardness of the encapsulant. Further, the encapsulant with different additives presents different colors. Therefore, the invention obtains a high-gloss, high-hardness and colorful sensor package structure.

Abstract: An electronic device is provided, which includes an electronic element and a heat dissipating element disposed on the electronic element through a thermal conductor, wherein a width of the thermal conductor is smaller than a width of the electronic element. The thermal conductor includes silver to thereby greatly increase the thermal conductivity of the thermal conductor and hence improve the thermal conduction efficiency of the electronic device.

Abstract: A method for fabricating a package structure is provided, including the steps of: disposing and electrically connecting a sensing chip to a substrate; forming an encapsulant on the substrate to encapsulate the sensing chip; and forming a bright layer on the encapsulant to increase the gloss of the package structure. The encapsulant includes an additive to increase the Mohs hardness of the encapsulant. Further, the encapsulant with different additives presents different colors. Therefore, the invention obtains a high-gloss, high-hardness and colorful sensor package structure.

Abstract: A method of fabricating a packaging substrate is provided, including: providing a carrier having two carrying portions, each of the carrying portions having a first side and a second side opposite to the first side and the carrying portions are bonded through the second sides thereof; forming a circuit layer on the first side of each of the carrying portions; and separating the two carrying portions from each other to form two packaging substrates. The carrying portions facilitate the thinning of the circuit layers and provide sufficient strength for the packaging substrates to undergo subsequent packaging processes. The carrying portions can be removed after the packaging processes to reduce the thickness of packages and thereby meet the miniaturization requirement.

Abstract: A fabrication method of a semiconductor package is provided, which includes the steps of: forming a packaging substrate on a first carrier; bonding a second carrier to the packaging substrate; removing the first carrier; disposing a chip on the packaging substrate; forming an encapsulant on the packaging substrate for encapsulating the chip; and removing the second carrier. The first and second carriers provide the thin-type packaging substrate with sufficient rigidity for undergoing the fabrication processes without cracking or warpage, thereby meeting the miniaturization requirement and improving the product yield.

Abstract: A flip-chip packaging structure is provided, which includes: a packaging substrate having a substrate body and a circuit layer formed on the substrate body, wherein the circuit layer has a plurality of conductive pads embedded in the substrate body and exposed from a surface of the substrate body; and a chip disposed on and electrically connected to the packaging substrate through a plurality of conductive elements, wherein the conductive elements and the exposed portions of the conductive pads have a width ratio in a range of 0.7 to 1.3, thereby improving the product yield and reliability.

Abstract: A package structure is disclosed, which includes: a first substrate; a build-up layer formed on and electrically connected to the first substrate and having a cavity; at least an electronic element disposed in the cavity and electrically connected to the first substrate; a stack member disposed on the build-up layer so as to be stacked on the first substrate; and an encapsulant formed between the build-up layer and the stack member. The build-up layer facilitates to achieve a stand-off effect and prevent solder bridging.

Abstract: A substrate structure is provided. The substrate structure includes a substrate body; a metal layer formed on a surface of the substrate body; an insulating layer formed on the surface of the substrate body and having at least an opening for exposing the metal layer; and at least a die attach area defined on the surface of the substrate body corresponding in position to the opening for a semiconductor chip to be disposed thereon. The die attach area covers the entire opening or the metal layer is formed within the die attach area, thereby effectively preventing package delamination and improving the product yield.

Abstract: A fabrication method of a semiconductor package is provided, which includes the steps of: forming a packaging substrate on a first carrier; bonding a second carrier to the packaging substrate; removing the first carrier; disposing a chip on the packaging substrate; forming an encapsulant on the packaging substrate for encapsulating the chip; and removing the second carrier. The first and second carriers provide the thin-type packaging substrate with sufficient rigidity for undergoing the fabrication processes without cracking or warpage, thereby meeting the miniaturization requirement and improving the product yield.

Abstract: A fabrication method of a semiconductor package is provided, which includes the steps of: forming a packaging substrate on a first carrier; bonding a second carrier to the packaging substrate; removing the first carrier; disposing a chip on the packaging substrate; forming an encapsulant on the packaging substrate for encapsulating the chip; and removing the second carrier. The first and second carriers provide the thin-type packaging substrate with sufficient rigidity for undergoing the fabrication processes without cracking or warpage, thereby meeting the miniaturization requirement and improving the product yield.

Abstract: A method of fabricating a packaging substrate is provided, including: providing a carrier having two carrying portions, each of the carrying portions having a first side and a second side opposite to the first side and the carrying portions are bonded through the second sides thereof; forming a circuit layer on the first side of each of the carrying portions; and separating the two carrying portions from each other to form two packaging substrates. The carrying portions facilitate the thinning of the circuit layers and provide sufficient strength for the packaging substrates to undergo subsequent packaging processes. The carrying portions can be removed after the packaging processes to reduce the thickness of packages and thereby meet the miniaturization requirement.

Abstract: A fabrication method of a semiconductor package is provided, which includes the steps of: forming a packaging substrate on a first carrier; bonding a second carrier to the packaging substrate; removing the first carrier; disposing a chip on the packaging substrate; forming an encapsulant on the packaging substrate for encapsulating the chip; and removing the second carrier. The first and second carriers provide the thin-type packaging substrate with sufficient rigidity for undergoing the fabrication processes without cracking or warpage, thereby meeting the miniaturization requirement and improving the product yield.

Abstract: A substrate structure includes a substrate body and a plurality of conductive pads formed on the substrate body and each having a first copper layer, a nickel layer, a second copper layer and a gold layer sequentially stacked. The thickness of the second copper layer is less than the thickness of the first copper layer. As such, the invention effectively enhances the bonding strength between the conductive pads and solder balls to be mounted later on the conductive pads, and prolongs the duration period of the substrate structure.