Patents by Inventor Liangchen Yan

Liangchen Yan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11559592
    Abstract: A sterilization structure, a sterilization board, and a display device are disclosed. The sterilization structure includes an active layer, wherein, one surface of the active layer has an exposed region, and a material of the active layer includes a laser-induced graphene material.
    Type: Grant
    Filed: June 17, 2019
    Date of Patent: January 24, 2023
    Assignees: Hefei Xinsheng Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Guangyao Li, Luke Ding, Leilei Cheng, Yingbin Hu, Jingang Fang, Ning Liu, Qinghe Wang, Dongfang Wang, Liangchen Yan
  • Publication number: 20220392987
    Abstract: A display substrate, a preparation method therefor, and a display apparatus. The display substrate includes a first metal layer, a metal oxide layer and a second metal layer, which are stacked on a base. The metal oxide layer includes a first active layer, the first active layer including a channel region, a source transition region, and a drain transition region, wherein both the source transition region and the drain transition region comprise a first region and a second region.
    Type: Application
    Filed: July 20, 2021
    Publication date: December 8, 2022
    Inventors: Ning LIU, Dacheng ZHANG, Jun GENG, Feng ZHANG, Yang PAN, Bin ZHOU, Liangchen YAN
  • Patent number: 11462602
    Abstract: An array substrate, a manufacturing method thereof, and a display device are provided. The array substrate includes: a base substrate; a first signal line on the base substrate; a first buffer layer provided on the base substrate and covering the first signal line; a second signal line on a side of the first buffer layer facing away from the base substrate; a first insulating layer provided on the base substrate and covering the second signal line; and a thin film transistor on a side of the first insulating layer facing away from the base substrate, the thin film transistor including a gate electrode, a source electrode and a drain electrode. A thickness of the first signal line is greater than that of the gate electrode, and a thickness of the second signal line is greater than that of the source electrode or the drain electrode.
    Type: Grant
    Filed: June 18, 2020
    Date of Patent: October 4, 2022
    Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD.
    Inventors: Yongchao Huang, Jun Cheng, Dongfang Wang, Jun Liu, Leilei Cheng, Liangchen Yan
  • Publication number: 20220293709
    Abstract: The present disclosure provides an array substrate, a manufacturing method thereof, and a display device including the array substrate. The array substrate includes a substrate, a first electrode on the substrate, a light-emitting layer on a side of the first electrode away from the substrate, a second electrode on a side of the light-emitting layer away from the first electrode, and an auxiliary electrode on the side of the light-emitting layer away from the first electrode and electrically connected with the second electrode.
    Type: Application
    Filed: April 8, 2021
    Publication date: September 15, 2022
    Inventors: Tongshang SU, Jun CHENG, Qinghe WANG, Yongchao HUANG, Chao WANG, Zhiwen LUO, Liangchen YAN
  • Publication number: 20220255038
    Abstract: Provided are a display substrate and a display apparatus. The display substrate includes a base substrate, and an auxiliary cathode structure located on a side of the base substrate, the auxiliary cathode structure including a first conductive layer, an intermediate support layer, and a second conductive layer. In an implementation, a side of the intermediate support layer close to the first conductive layer includes any one or more of first protrusions and first grooves, and a side of the first conductive layer close to the intermediate support layer includes any one or more of second grooves engaged with the first protrusions and second protrusions engaged with the first grooves which are correspondingly disposed.
    Type: Application
    Filed: September 22, 2021
    Publication date: August 11, 2022
    Inventors: Qinghe WANG, Jun CHENG, Tongshang SU, Ning LIU, Haitao WANG, Yongchao HUANG, Jingang FANG, Liusong NI, Liangchen YAN
  • Patent number: 11393886
    Abstract: Provided are a display panel and a manufacturing method thereof and a display device. The display panel includes a substrate and pixel units formed on the substrate, wherein, along a thickness direction of the display panel, at least one of the pixel units includes a driving and light filtering structure and a light emitting element formed at a side of the driving and light filtering structure facing away from the substrate, and wherein the driving and light filtering structure includes a driving part and a light filtering part, and the light filtering part is disposed in an accommodating hole penetrating through an insulating layer in the driving part along the thickness direction.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: July 19, 2022
    Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jun Liu, Liangchen Yan, Bin Zhou, Yongchao Huang, Luke Ding, Wei Li, Biao Luo, Xuehai Gui
  • Patent number: 11367792
    Abstract: The present disclosure is related to a thin film transistor. The thin film transistor may include an active layer; a gate insulating layer on the active layer; and a gate and a plurality of metal films on the gate insulating layer. The plurality of metal films may be spaced apart from the gate, and insulated from the gate and the active layer.
    Type: Grant
    Filed: November 1, 2019
    Date of Patent: June 21, 2022
    Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD, BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Wei Song, Liangchen Yan, Ce Zhao, Heekyu Kim, Yuankui Ding, Leilei Cheng, Yingbin Hu, Wei Li, Guangyao Li, Qinghe Wang
  • Patent number: 11342459
    Abstract: The disclosure relates to a thin film transistor structure, an array substrate, and a method for manufacturing a thin film transistor structure. The thin-film transistor structure includes a base substrate, a thin film transistor on the base substrate. Wherein the thin film transistor includes an active layer and a source/drain electrode on a side, facing towards the base substrate, of the active layer. Wherein the source/drain electrode has a protrusion protruding from an edge portion of the active layer in a direction parallel to a surface of the base substrate.
    Type: Grant
    Filed: June 4, 2019
    Date of Patent: May 24, 2022
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Luke Ding, Zhanfeng Cao, Jingang Fang, Liangchen Yan, Ce Zhao, Dongfang Wang
  • Patent number: 11342431
    Abstract: A thin film transistor and a manufacturing method thereof, an array substrate and a display device are provided. The thin film transistor is formed on a substrate and includes: an active layer on the substrate, the active layer including a source region, a drain region, and a channel region between the source region and the drain region; a first gate electrode on a side of the active layer away from the substrate; and a second gate electrode on a side of the first gate electrode away from the substrate, wherein a thickness of the first gate electrode is smaller than a thickness of the second gate electrode.
    Type: Grant
    Filed: December 18, 2019
    Date of Patent: May 24, 2022
    Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Tongshang Su, Dongfang Wang, Qinghe Wang, Ning Liu, Yongchao Huang, Yu Ji, Zheng Wang, Liangchen Yan
  • Patent number: 11335710
    Abstract: A thin film transistor, a display panel and a preparation method thereof and a display apparatus are provided. The thin film transistor includes: a substrate; a gate metal located on a side of the substrate; a gate insulating layer located on a side of the gate metal away from the substrate; an active layer located on a side of the gate insulating layer away from the substrate; a first metal oxide and a second metal oxide which are located on a side of the active layer away from the substrate and are arranged on a same layer; and a source metal and a drain metal which are located on sides of the first metal oxide and the second metal oxide away from the substrate and are arranged in a same layer.
    Type: Grant
    Filed: July 23, 2020
    Date of Patent: May 17, 2022
    Assignees: Hefei Xinsheng Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Qinghe Wang, Tongshang Su, Yongchao Huang, Yingbin Hu, Yang Zhang, Haitao Wang, Ning Liu, Guangyao Li, Zheng Wang, Yu Ji, Jinliang Hu, Wei Song, Jun Cheng, Liangchen Yan
  • Patent number: 11329115
    Abstract: The present disclosure relates to a pixel structure. The pixel structure may include a base substrate; a first insulating island on a side of the base substrate; a first electrode on a side of the first insulating island opposite front the base substrate; a second electrode on the base substrate and at a peripheral area of the first insulating island; an active layer electrically connected to the first electrode and the second electrode; a second insulating layer on a side of the active layer opposite from the base substrate; a gate electrode on a side of the second insulating layer opposite from the base substrate; and a third insulating layer on a side of the gate electrode opposite from the base substrate.
    Type: Grant
    Filed: March 22, 2019
    Date of Patent: May 10, 2022
    Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD, BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Wei Song, Liangchen Yan, Ce Zhao, Heekyu Kim, Yuankui Ding, Leilei Cheng, Yingbin Hu, Wei Li, Yang Zhang
  • Patent number: 11315783
    Abstract: A method of fabricating a display substrate is provided. The method includes forming a conductive layer on a base substrate; and performing a chemical vapor deposition process to form an oxide layer on a side of an exposed surface of the conductive layer away from the base substrate, the exposed surface of the conductive layer including copper, the oxide layer formed to include an oxide of a target element M. The chemical vapor deposition process is performed using a mixture of a first reaction gas including oxygen and a second reaction gas including the target element M, at a reaction temperature in a range of 200 Celsius degrees to 280 Celsius degrees. A mole ratio of oxygen element to the target element M in the mixture of the first reaction gas and the second reaction gas is in a range of 40:1 to 60:1.
    Type: Grant
    Filed: February 20, 2019
    Date of Patent: April 26, 2022
    Assignees: Hefei Xinsheng Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Yuankui Ding, Heekyu Kim, Liangchen Yan, Ce Zhao, Bin Zhou, Yingbin Hu, Wei Song, Dongfang Wang
  • Publication number: 20220093893
    Abstract: A method for manufacturing a display panel includes: sequentially forming a conductive pattern, a light-emitting layer and a cathode layer on a substrate. The conductive pattern is formed by a one-time patterning process, and includes an auxiliary electrode layer. In a direction parallel to the substrate, both the first protective electrode and the second protective electrode in the auxiliary electrode layer extend over the metal electrode, a second orthographic projection of the second protective electrode on the substrate is within a first orthographic projection of the first protective electrode on the substrate, and an outer boundary of the second orthographic projection is staggered from an outer boundary of the first orthographic projection. The cathode layer is in contact with the first protective electrode and a sidewall of the metal electrode.
    Type: Application
    Filed: June 2, 2021
    Publication date: March 24, 2022
    Inventors: Yang Zhang, Ning Liu, Bin Zhou, Leilei Cheng, Liangchen Yan, Jun Liu, Qinghe Wang, Tao Sun, Zhiwen Luo
  • Publication number: 20220093723
    Abstract: A display backplane, a manufacturing method thereof, and a display device are provided. The display backplane includes a base substrate. A thin film transistor array layer, a protective layer, a planarization layer, and a light-emitting element are arranged on the base substrate. A first through hole is formed in the protective layer, and a second through hole is formed in the planarization layer. The first through hole and the second through hole are connected. A source electrode or a drain electrode is electrically connected to an anode via the first through hole and the second through hole. Each of the first through hole and the second through hole has a sidewall inclined relative to the base substrate.
    Type: Application
    Filed: September 23, 2021
    Publication date: March 24, 2022
    Inventors: Liangchen YAN, Jun GENG, Tongshang SU, Wei HE, Bin ZHOU
  • Publication number: 20220077255
    Abstract: The present disclosure provides an array substrate, a method for manufacturing the array substrate, a display panel and a display device. The array substrate includes: a substrate; a planarization layer on a side of the substrate; a pixel defining layer configured to define a pixel opening region and located on a side of the planarization layer away from the substrate; an anode in the pixel opening region and on a side of the planarization layer away from the substrate. The array substrate further includes an intermediate insulation layer between the planarization layer and the pixel defining layer. The intermediate insulation layer has a chemical polarity between a chemical polarity of the planarization layer and a chemical polarity of the pixel defining layer.
    Type: Application
    Filed: November 5, 2020
    Publication date: March 10, 2022
    Inventors: Wei Li, Jingjing XIA, Bin Zhou, Yang Zhang, Guangyao Li, Wei Song, Xuanang Wang, Qinghe Wang, Liusong Ni, Jun Liu, Liangchen Yan, Ming Wang, Jingang Fang
  • Publication number: 20220064783
    Abstract: A sputtering system and a deposition method are provided. The sputtering system includes at least two sputtering chambers. Each of the at least two sputtering chambers includes a plurality of targets separated from each other and a plurality of target pedestals. Each of the plurality of targets is mounted on a corresponding target pedestal of the plurality of target pedestals, and a gap between two adjacent targets of the plurality of targets has a width sufficient to accommodate at least one of the plurality of targets.
    Type: Application
    Filed: October 14, 2021
    Publication date: March 3, 2022
    Applicants: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Tongshang SU, Dongfang WANG, Leilei CHENG, Jun LIU, Ning LIU, Qinghe WANG, Liangchen YAN
  • Patent number: 11251309
    Abstract: Embodiments of the present disclosure relate to a thin film transistor, a method for manufacturing the same, a display panel, and a display device. The thin film transistor includes a substrate, an active layer located on the substrate, and a light shielding layer, a first dielectric layer, and a second dielectric layer located between the substrate and the active layer, wherein the first dielectric layer is located between the second dielectric layer and the substrate, and wherein a refractive index of the first dielectric layer is greater than a refractive index of the second dielectric layer.
    Type: Grant
    Filed: December 14, 2017
    Date of Patent: February 15, 2022
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jiangbo Chen, Young Suk Song, Wei Li, Liangchen Yan
  • Patent number: 11239264
    Abstract: The present disclosure provides a thin film transistor, a display substrate, a method for preparing the same, and a display device including the display substrate. The method for preparing the thin film transistor includes: forming an inorganic insulating film layer in contact with an electrode of the thin film transistor by a plasma enhanced chemical vapor deposition process at power of 9 kW to 25 kW, at a temperature of 190° C. to 380° C. and by using a mixture of gases N2, NH3 and SiH4 in a volume ratio of N2:NH3:SiH4=(10˜20):(5˜10):(1˜2), such that a stress value of the inorganic insulating film layer is reduced to be less than or equal to a threshold, and the inorganic insulating layer comprises silicon nitride.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: February 1, 2022
    Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Tongshang Su, Dongfang Wang, Qinghe Wang, Liangchen Yan
  • Publication number: 20210408183
    Abstract: A display panel includes a substrate, and a pixel defining layer and a cathode layer that are laminated on the substrate. The pixel defining layer includes a plurality of strip-shaped first pixel defining structures and a plurality of strip-shaped second pixel defining structures. A slope angle of the second pixel defining structure is greater than a slope angle of the first pixel defining structure, and the second pixel defining structure is configured to separate portions of the cathode layer on two sides of the second pixel defining structure.
    Type: Application
    Filed: June 9, 2021
    Publication date: December 30, 2021
    Inventors: Wei Li, Bin Zhou, Shengping Du, Qinghua Guo, Tao Sun, Wei Song, Liangchen Yan
  • Publication number: 20210367017
    Abstract: An array substrate, a method for manufacturing the array substrate and a display device are provided. The array substrate includes: a base substrate, and a thin film transistor, a storage capacitor, and a lapping pattern for connecting the thin film transistor to the storage capacitor arranged on the base substrate; wherein the thin film transistor includes a semiconductor layer, a gate insulation layer, a gate electrode, an interlayer insulation layer, a source electrode and a drain electrode arranged sequentially in that order; the interlayer insulation layer includes at least two inorganic insulation layers and at least one organic insulation layer laminated one on another, and both a layer proximate to the base substrate and a layer distal to the base substrate in the interlayer insulation layer are the inorganic insulation layers.
    Type: Application
    Filed: April 27, 2021
    Publication date: November 25, 2021
    Applicants: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Ning LIU, Jun LIU, Wei SONG, Qinghe WANG, Bin ZHOU, Liangchen YAN