Patents by Inventor Liangchen Yan

Liangchen Yan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200251545
    Abstract: Provided are a display panel and a manufacturing method thereof and a display device. The display panel includes a substrate and pixel units formed on the substrate, wherein, along a thickness direction of the display panel, at least one of the pixel units includes a driving and light filtering structure and a light emitting element formed at a side of the driving and light filtering structure facing away from the substrate, and wherein the driving and light filtering structure includes a driving part and a light filtering part, and the light filtering part is disposed in an accommodating hole penetrating through an insulating layer in the driving part along the thickness direction.
    Type: Application
    Filed: December 5, 2019
    Publication date: August 6, 2020
    Inventors: Jun LIU, Liangchen YAN, Bin ZHOU, Yongchao HUANG, Luke DING, Wei LI, Biao LUO, Xuehai GUI
  • Patent number: 10707286
    Abstract: An OLED device and a method of preparing the same are provided, the OLED device including: a substrate; a first source electrode on the substrate, the first source electrode having a first side surface; a first insulating layer on the first source electrode, the first insulating layer having a second side surface intersecting with an upper surface of the first source electrode and the first side surface of the first source electrode, with at least one of an angle between the first side surface and the upper surface of the substrate and an angle between the second side surface and the upper surface of the substrate being an acute angle; an active layer on the substrate, the active layer covering the first side surface and the second side surface; a gate insulating layer on the active layer; an anode on the gate insulating layer; a light emitting functional layer on the anode; and a cathode on the light emitting functional layer, the cathode including a first drain region covering the first insulating layer and
    Type: Grant
    Filed: May 20, 2019
    Date of Patent: July 7, 2020
    Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Qinghe Wang, Dongfang Wang, Tongshang Su, Rui Peng, Leilei Cheng, Yang Zhang, Jun Wang, Guangyao Li, Liangchen Yan, Guangcai Yuan
  • Publication number: 20200199740
    Abstract: A sputtering system and a deposition method are provided. The sputtering system includes at least two sputtering chambers. Each of the at least two sputtering chambers includes a plurality of targets separated from each other and a plurality of target pedestals. Each of the plurality of targets is mounted on a corresponding target pedestal of the plurality of target pedestals, and a gap between two adjacent targets of the plurality of targets has a width sufficient to accommodate at least one of the plurality of targets.
    Type: Application
    Filed: August 1, 2019
    Publication date: June 25, 2020
    Applicants: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Tongshang SU, Dongfang WANG, Leilei CHENG, Jun LIU, Ning LIU, Qinghe WANG, Liangchen YAN
  • Publication number: 20200194470
    Abstract: A display substrate, a method for manufacturing the display substrate, and a display device are provided. The display substrate includes a display area and a fanout area at the periphery of the display area. The fanout area includes a data line layer, a first power line layer, and at least two insulation layers between the data line layer and the first power line layer. In a direction perpendicular to a base substrate of the display substrate, the first power line layer overlaps the data line layer. At least one of the at least two insulation layers includes a portion which insulates the first power line layer and the data line layer from each other.
    Type: Application
    Filed: August 30, 2019
    Publication date: June 18, 2020
    Applicants: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jun WANG, Dongfang WANG, Haitao WANG, Guangyao LI, Yingbin HU, Yang ZHANG, Qinghe WANG, Liangchen YAN
  • Publication number: 20200184874
    Abstract: A pixel structure includes at least three sub-pixels and there is a gap between two adjacent sub-pixels. The gap includes at least a first gap and a second gap, where the first gap extends along a linear trajectory and the second gap extends along a curved trajectory. The wire includes at least a first wire and a second wire, wherein the first wire passes through the first gap along the linear trajectory and is spaced apart from the sub-pixels on both sides of the first gap, and the second wire passes through the second gap along the curved trajectory and is spaced apart from the sub-pixels on both sides of the second gap. The second wire has a line width larger than a line width of the first wire.
    Type: Application
    Filed: April 30, 2019
    Publication date: June 11, 2020
    Inventors: Qinghe WANG, Xueguang HAO, Dacheng ZHANG, Yongda MA, Dongfang WANG, Liangchen YAN
  • Patent number: 10680053
    Abstract: A fabrication method for fabricating a thin-film transistor includes: forming a light shielding layer on a substrate; forming a buffer layer covering the light shielding layer, and forming a semiconductor material layer stacked on a surface of the buffer layer away from the substrate; forming a through hole penetrating through the buffer layer and the semiconductor material layer; patterning the semiconductor material layer to form an active layer covering a partial region of the buffer layer; forming a gate insulator layer on a surface of the active layer away from the substrate and a gate stacked on a surface of the gate insulator layer away from the substrate; forming a source and a drain on the surface of the buffer layer away from the substrate; and forming a dielectric layer covering the gate, the source, the drain, and the buffer layer, and being recessed into the through hole to form a groove.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: June 9, 2020
    Assignees: Hefei Xinsheng Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yingbin Hu, Liangchen Yan, Ce Zhao, Yuankui Ding, Yang Zhang, Yongchao Huang, Luke Ding, Jun Liu
  • Publication number: 20200168744
    Abstract: A method for manufacturing a thin film transistor includes forming a light shielding layer and a buffer layer covering the light shielding layer on a substrate. The method includes forming an active layer including a peripheral region and a channel region. The method includes forming a gate insulating layer covering the channel region and forming a contact hole exposing the light shielding layer. The method includes forming a source region and a drain region disposed on both sides of the channel region. The method includes forming an electrode layer including a gate electrode, a source electrode and a drain electrode spaced apart one another. The method includes forming a dielectric layer covering the gate electrode, the source electrode, the drain electrode and the buffer layer.
    Type: Application
    Filed: May 13, 2019
    Publication date: May 28, 2020
    Inventors: Yingbin Hu, Ce Zhao, Yuankui Ding, Jun Wang, Jun Liu, Guangyao Li, Yongchao Huang, Wei Li, Liangchen Yan
  • Publication number: 20200168687
    Abstract: A fabrication method for fabricating a thin-film transistor includes: forming a light shielding layer on a substrate; forming a buffer layer covering the light shielding layer, and forming a semiconductor material layer stacked on a surface of the buffer layer away from the substrate; forming a through hole penetrating through the buffer layer and the semiconductor material layer; patterning the semiconductor material layer to form an active layer covering a partial region of the buffer layer; forming a gate insulator layer on a surface of the active layer away from the substrate and a gate stacked on a surface of the gate insulator layer away from the substrate; forming a source and a drain on the surface of the buffer layer away from the substrate; and forming a dielectric layer covering the gate, the source, the drain, and the buffer layer, and being recessed into the through hole to form a groove.
    Type: Application
    Filed: June 14, 2019
    Publication date: May 28, 2020
    Inventors: Yingbin HU, Liangchen YAN, Ce ZHAO, Yuankui DING, Yang ZHANG, Yongchao HUANG, Luke DING, Jun LIU
  • Publication number: 20200155717
    Abstract: A sterilization structure, a sterilization board, and a display device are disclosed. The sterilization structure includes an active layer, wherein, one surface of the active layer has an exposed region, and a material of the active layer includes a laser-induced graphene material.
    Type: Application
    Filed: June 17, 2019
    Publication date: May 21, 2020
    Applicants: Hefei Xinsheng Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Guangyao Li, Luke Ding, Leilei Cheng, Yingbin Hu, Jingang Fang, Ning Liu, Qinghe Wang, Dongfang Wang, Liangchen Yan
  • Publication number: 20200161196
    Abstract: The present disclosure provides a method for determining a width-to-length ratio of a channel region of a thin film transistor (TFT). The method includes: S1, setting an initial width-to-length ratio of the channel region; S2, manufacturing a TFT by using a mask plate according to the initial width-to-length ratio; S3, testing the TFT manufactured according to the initial width-to-length ratio; S4, determining whether or not the test result satisfies a predetermined condition, performing S5 if the test result satisfies the predetermined condition, and performing S6 if the test result does not satisfy the predetermined condition; S5, determining the initial width-to-length ratio as the width-to-length ratio of the channel region of the TFT; S6, changing the value of the initial width-to-length ratio, adjusting a position of the mask plate according to the changed initial width-to-length ratio, and performing S2 to S4 again.
    Type: Application
    Filed: June 26, 2019
    Publication date: May 21, 2020
    Inventors: Yingbin HU, Ce ZHAO, Yuankui DING, Wei SONG, Jun WANG, Yang ZHANG, Wei LI, Liangchen YAN
  • Publication number: 20200152799
    Abstract: The present disclosure provides a thin film transistor, a thin film transistor array, and a method for detecting an object to be detected, wherein the thin film transistor is configured to detect a parameter of an object to be detected bound with a metal ion and includes an active layer, wherein: a carrier of the active layer without a metal element contained in the metal ion bound is of a first mobility, and a carrier of the active layer with the metal element bound is of a second mobility different from the first mobility.
    Type: Application
    Filed: July 9, 2019
    Publication date: May 14, 2020
    Inventors: Guangyao LI, Lei HUANG, Haitao WANG, Jun WANG, Qinghe WANG, Wei LI, Dongfang WANG, Liangchen YAN
  • Patent number: 10622483
    Abstract: The present disclosure provides a Thin Film Transistor and a method for manufacturing the same, an array substrate and a display device, so as to increase on-state currents of the Thin Film Transistor and improve current characteristics of the Thin Film Transistor. The Thin Film Transistor includes a base substrate, a gate insulating layer and a gate disposed above the base substrate; wherein a conductive layer is also disposed between the gate insulating layer and the gate; wherein the projection of the conductive layer on the base substrate is larger than the projection of the gate on the base substrate.
    Type: Grant
    Filed: May 19, 2016
    Date of Patent: April 14, 2020
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Meili Wang, Liangchen Yan
  • Publication number: 20200098797
    Abstract: A display substrate and a method of preparing the same, and a display device are provided, the method including: providing a substrate; forming a switching thin film transistor precursor and a driving thin film transistor precursor on the substrate, each including a semiconductor layer, a gate insulating material layer and a gate metallic layer stacked sequentially above the substrate; forming a photoresist layer above the switching thin film transistor precursor and the driving thin film transistor precursor, and forming an etching mask from the photoresist layer, a first portion of the etching mask at the switching thin film transistor precursor and a second portion of the etching mask at the driving thin film transistor precursor having different shapes; and forming a switching thin film transistor and a driving thin film transistor, by etching processing the switching thin film transistor precursor and the driving thin film transistor precursor with the etching mask.
    Type: Application
    Filed: April 30, 2019
    Publication date: March 26, 2020
    Inventors: Jun Liu, Luke Ding, Ning Liu, Wei Li, Bin Zhou, Liangchen Yan
  • Publication number: 20200075773
    Abstract: A thin film transistor, a method of manufacturing the same, an array substrate and a display panel are disclosed. The thin film transistor includes a light blocking layer, an electrode layer, and a combination layer, which are sequentially stacked. The electrode layer includes a gate electrode, a source electrode and a drain electrode which are separated from one another, and the gate electrode is located between the source electrode and the drain electrode. The light blocking layer includes a first portion of which an orthogonal projection is located between an orthogonal projection of the gate electrode and an orthogonal projection of the source electrode; and a second portion of which an orthogonal projection is located between the orthogonal projection of the gate and an orthogonal projection of the drain. The combination layer includes an active layer.
    Type: Application
    Filed: May 6, 2019
    Publication date: March 5, 2020
    Applicants: Hefei Xinsheng Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Yang Zhang, Luke Ding, Bin Zhou, Haitao Wang, Ning Liu, Jingang Fang, Yongchao Huang, Liangchen Yan
  • Publication number: 20200075704
    Abstract: An array substrate includes a base substrate, a transistor on the base substrate, a planarization layer on a side of the transistor away from the base substrate, a recessed portion on the planarization layer, and a light blocking portion in the recessed portion. The light blocking portion is configured to prevent a light from being incident upon an active layer.
    Type: Application
    Filed: June 28, 2019
    Publication date: March 5, 2020
    Inventors: Jun LIU, Liangchen YAN, Bin ZHOU, Jun WANG, Tongshang SU, Biao LUO, Yang ZHANG
  • Publication number: 20200064734
    Abstract: Disclosed are a photoresist composition, a pixel definition structure and a manufacturing method thereof, and a display panel. The photoresist composition includes an organic film-forming resin, a superhydrophobic polymerizable monomer, a polyfunctional crosslinkable polymerizable monomer, a photoinitiator, an additive and a solvent.
    Type: Application
    Filed: July 1, 2019
    Publication date: February 27, 2020
    Inventors: Wei LI, Jingjing XIA, Bin ZHOU, Jun LIU, Tongshang SU, Yang ZHANG, Liangchen YAN
  • Publication number: 20200066195
    Abstract: An inspection device includes: a driving circuit, configured to input display data of an image to a pixel electrode of the array substrate; a light-emitting device comprising a first electrode, a second electrode, and a plurality of light-emitting units arranged between the first electrode and the second electrode, and the plurality of light-emitting units is capable of emitting light under the effect of an electric field between the first electrode and the second electrode; a test circuit, configured to electrically connect the first electrode of the light-emitting device to the pixel electrode of the array substrate, and input a first electrical signal to the second electrode of the light-emitting device, to generate the electric field; and a processing circuit, configured to acquire optical information of the light emitted by the light-emitting device, and determine whether there is an electrical defect in the array substrate according to the optical information.
    Type: Application
    Filed: April 30, 2019
    Publication date: February 27, 2020
    Applicants: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Guangyao LI, Bo MAO, Xuehai GUI, Qinghe WANG, Jun WANG, Dongfang WANG, Liangchen YAN
  • Publication number: 20200067012
    Abstract: A display back plate, a fabricating method for the same, and a display device are provided. The display back plate includes a substrate, a transparent heat conduction layer disposed on the substrate, and an array structure layer disposed on the heat conduction layer. The array structure layer includes a light shielding layer, a first thin film transistor, and a second thin film transistor, where the light shielding layer is disposed between the transparent heat conduction layer and the first thin film transistor.
    Type: Application
    Filed: May 10, 2019
    Publication date: February 27, 2020
    Inventors: Tongshang SU, Dongfang WANG, Qinghe WANG, Ce ZHAO, Bin ZHOU, Liangchen YAN
  • Publication number: 20200066901
    Abstract: The disclosure relates to a thin film transistor structure, an array substrate, and a method for manufacturing a thin film transistor structure. The thin-film transistor structure includes a base substrate, a thin film transistor on the base substrate. Wherein the thin film transistor includes an active layer and a source/drain electrode on a side, facing towards the base substrate, of the active layer. Wherein the source/drain electrode has a protrusion protruding from an edge portion of the active layer in a direction parallel to a surface of the base substrate.
    Type: Application
    Filed: June 4, 2019
    Publication date: February 27, 2020
    Inventors: Luke DING, Zhanfeng CAO, Jingang FANG, Liangchen YAN, Ce ZHAO, Dongfang WANG
  • Publication number: 20200058724
    Abstract: An OLED device and a method of preparing the same are provided, the OLED device including: a substrate; a first source electrode on the substrate, the first source electrode having a first side surface; a first insulating layer on the first source electrode, the first insulating layer having a second side surface intersecting with an upper surface of the first source electrode and the first side surface of the first source electrode, with at least one of an angle between the first side surface and the upper surface of the substrate and an angle between the second side surface and the upper surface of the substrate being an acute angle; an active layer on the substrate, the active layer covering the first side surface and the second side surface; a gate insulating layer on the active layer; an anode on the gate insulating layer; a light emitting functional layer on the anode; and a cathode on the light emitting functional layer, the cathode including a first drain region covering the first insulating layer and
    Type: Application
    Filed: May 20, 2019
    Publication date: February 20, 2020
    Inventors: Qinghe Wang, Dongfang Wang, Tongshang Su, Rui Peng, Leilei Cheng, Yang Zhang, Jun Wang, Guangyao Li, Liangchen Yan, Guangcai Yuan