Abstract: A display panel includes a first display portion, a second display portion and a bonding portion connected to the second display portion. The first display portion extends in an arc shape in a flatten state and surrounds the second display portion in an enclosed state. The first display portion has a first display area and first peripheral area(s) each located at an end of an arc presented by the first display portion. The first display portion includes a plurality of first sub-pixels, first scanning signal lines extending substantially in a second direction and each connected to at least one column of first sub-pixels, first data signal lines extending substantially in a first direction and each connected to at least one row of first sub-pixels, and first gate driver circuit(s) disposed in the first peripheral area(s) and connected to the first scanning signal lines.

Abstract: An array substrate includes sub-pixel regions, each sub-pixel region is provided with a pixel driving circuit therein; the pixel driving circuit includes first-type transistors and second-type transistors, and the second-type transistors include at least a writing transistor. The array substrate includes a base substrate, a first active film layer disposed on the base substrate, a second active film layer disposed on a side of the first active film away from the base substrate, and a third source-drain metal layer disposed on a side of the second active film layer away from the base substrate. The first active film layer includes active later patterns of the first-type transistors. The second active film layer includes an active layer pattern of the writing transistor; the third source-drain metal layer includes data signal line, and the active layer pattern of the writing transistor is electrically connected to a data signal line.

Abstract: A display substrate and a display device are provided. In the display substrate, the shift register unit includes a charge pump circuit, the charge pump circuit includes a first capacitor and a first transistor, and the charge pump circuit is electrically connected with a first input node and a first node, respectively; a first electrode plate of the first capacitor is connected with the first clock signal line, a second electrode plate of the first capacitor is connected with the first input node, a gate electrode of the first transistor is connected with a first electrode of the first transistor, a second electrode plate of the first capacitor is provided with a first portion, and the first portion of the second electrode plate of the first capacitor and the gate electrode of the first transistor have an integral structure.

Abstract: A light-emitting device includes a substrate, an induction coil and at least one light-emitting unit. The induction coil is located on a side of the substrate, and the induction coil includes turns of conductive wiring disposed helically around a central region. The at least one light-emitting unit is located on a side of the induction coil away from the substrate. The light-emitting unit includes a first electrode and a second electrode, one of which is connected to an innermost turn of conductive wiring in the induction coil, and another one of which is connected to an outermost turn of conductive wiring in the induction coil. An area of a portion the central region covered by the at least one light-emitting unit in a direction perpendicular to the substrate is less than or equal to 50% of an area of the central region.

Abstract: A display substrate, a preparation method thereof, a display panel, and a display device are provided. The display substrate includes a base substrate and a repeating unit, the repeating unit includes a plurality of sub-pixels including a first sub-pixel and a second sub-pixel, a color of light emitted by a light-emitting element of the first sub-pixel is identical to a color of light emitted by a light-emitting element of the second sub-pixel, a shape of a first light-emitting voltage application electrode of the light-emitting element of the first sub-pixel is different from a shape of a first light-emitting voltage application electrode of the light-emitting element of the second sub-pixel.

Abstract: Provided is a pixel arrangement structure which includes a plurality of first sub-pixels, a plurality of second sub-pixels, and a plurality of third sub-pixels arranged in a plane. Connecting lines between centers of the plurality of first sub-pixels and the plurality of second sub-pixels form a plurality of trapezoids. The longer base and the shorter base extend along a first direction and are arranged along a second direction perpendicular to the first direction; one of the third sub-pixels is disposed within each of the trapezoids, and the third sub-pixel is closer to the longer base than to the shorter base. The plurality of trapezoids includes a plurality of first trapezoids and a plurality of second trapezoids, and an arrangement direction of the longer base and the shorter base of each first trapezoid along the second direction is opposite to that of the second trapezoid.

Abstract: Provided is a display substrate, a drive method thereof and a display apparatus, the display substrate includes: a first drive mode and a second drive mode, the first drive mode has a refresh rate less than that of the second drive mode, wherein the contents displayed on the display substrate include a plurality of display frames, in the first drive mode, the display frames include: a refresh frame and at least one maintain frame; the display substrate includes pixel circuits arranged in an array, the pixel circuits include a data signal line and a first initial signal line; the data signal line provides a first data signal in the maintain frame, the voltage value of the first data signal is constant, and/or the first initial signal line provides a first initial signal in the refresh frame and the maintain frame, the first initial signal is an AC signal.

Abstract: Provided is a display panel. The display panel includes a base substrate, provided with a curved display region and a planar display region, wherein the curved display region is configured for curved display; and a plurality of first sub-pixels disposed in the curved display region and a plurality of second sub-pixels disposed in the planar display region, wherein each of the first sub-pixels and the second sub-pixels includes: a planarization layer, an electrode pattern, a light-emitting pattern, and an electrode layer which are sequentially laminated in a direction going away from the base substrate.

Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may obtain information associated with a scaling factor to be applied to a parameter for updating a model. The UE may selectively apply the scaling factor to the parameter, based at least in part on a number of training samples associated with the UE, to obtain a scaled parameter. The UE may transmit the scaled parameter to a network node. Numerous other aspects are described.

Abstract: This disclosure provides systems, methods, and devices for wireless communication that support a channel state information (CSI) configuration. In a first aspect, a method of wireless communication includes generating, based on sensing information, an indicator that indicates a CSI recommendation. The CSI recommendation includes a recommended channel state information reference signal (CSI-RS) configuration, a recommended CSI reporting scheme, or a combination thereof. The method also includes transmitting the indicator. Other aspects and features are also claimed and described.

Abstract: A pixel circuit includes a pixel driving circuit, a first light-emitting element, a second light-emitting element, a switching circuit including a first terminal, a second terminal and a control terminal, and a reset circuit. The pixel driving circuit is electrically connected to the first light-emitting element the first terminal is electrically connected to the pixel driving circuit, the second terminal is electrically connected to the second light-emitting element, the switching circuit is configured to: electrically connect the second light-emitting element to the pixel driving circuit in response to the control terminal receiving a first level signal, and disconnect an electrical connection between the second light-emitting element and the pixel driving circuit in response to the control terminal receiving a second level signal.

Abstract: A display substrate including a first display area including a plurality of first sub-pixels, a plurality of second sub-pixels and a plurality of third sub-pixels, wherein the display substrate includes a plurality of first pixel groups each of which includes two third sub-pixels, one first sub-pixel and one second sub-pixel, the two third sub-pixels are arranged adjacent to each other along a first direction, the one first sub-pixel and the one second sub-pixel are adjacent to at least one of the two third sub-pixels, located on both sides of a straight line passing centers of the two third sub-pixels, and arranged along a second direction different from the first direction; a size of the first sub-pixel and the second sub-pixel in the second direction is smaller than a size of the first sub-pixel and the second sub-pixel in the first direction, respectively.

Abstract: The present disclosure provides a touch display panel. The touch display panel includes a display substrate and a touch layer, wherein the touch layer includes a plurality of touch units and a plurality of touch lines which are disposed on the display substrate; wherein the touch lines are connected to at least one touch unit and are configured to electrically connect the touch unit connected thereto to a touch integrated circuit; the plurality of touch lines at least include a first trace and a second trace which are disposed in a non-display region; and the display substrate includes a conductive layer disposed in the non-display region; wherein a plurality of first through hole and a plurality of second through hole are defined in the conductive layer.

Abstract: Provided are a wiring structure of a pixel driving circuit, a display panel, and a display device. The wire layout includes: a first switching element, a second switching element and a driving transistor. A source electrode of the driving transistor is connected to a power signal line. The power signal line includes a first power signal line that is in a same direction as a data signal line, and the data signal line is arranged at a position of the first power signal line away from a gate electrode of the driving transistor.

Abstract: A display panel includes pixel circuits, first shift register(s), second shift register(s), third shift register(s), and fourth shift register(s). A pixel circuit includes a driving transistor, a bias sub-circuit, a data writing sub-circuit, a compensation sub-circuit, a leakage prevention sub-circuit, a reset sub-circuit, and a light-emission control sub-circuit. The bias sub-circuit is electrically connected to a first shift register, which transmits a first scanning signal to the bias sub-circuit. The data writing and compensation sub-circuits are electrically connected to a second shift register, which transmits a second scanning signal to the data writing and compensation sub-circuits. The leakage prevention sub-circuit is electrically connected to a third shift register, which transmits a third scanning signal to the leakage prevention sub-circuit.

Abstract: Provided is a drive backplane. The drive backplane includes: a base substrate and a circuit structure. The circuit structure includes a plurality of first thin film transistors and a plurality of second thin film transistors; wherein a first active layer of the first thin film transistor includes a first oxide layer and a second oxide layer, wherein the second oxide layer is disposed on a side of the first oxide layer away from the base substrate, a mobility of the second oxide layer is lower than a mobility of the first oxide layer, and a source and a drain of the first thin film transistor are connected to the second oxide layer; and a second active layer of the second thin film transistor includes a third oxide layer, wherein a mobility of the third oxide layer is lower than the mobility of the first oxide layer.

Abstract: A display substrate including a first display area including a plurality of first sub-pixels, a plurality of second sub-pixels and a plurality of third sub-pixels, wherein the display substrate includes a plurality of first pixel groups each of which includes two third sub-pixels, one first sub-pixel and one second sub-pixel, the two third sub-pixels are arranged adjacent to each other along a first direction, the one first sub-pixel and the one second sub-pixel are adjacent to at least one of the two third sub-pixels, located on both sides of a straight line passing centers of the two third sub-pixels, and arranged along a second direction different from the first direction; a size of the first sub-pixel and the second sub-pixel in the second direction is smaller than a size of the first sub-pixel and the second sub-pixel in the first direction, respectively.

Abstract: A display panel and a display device are provided. The display panel includes a pixel driving circuit on a side of a substrate. The pixel driving circuit includes a drivier transistor; a ninth transistor with a first electrode being connected to a third initial signal line, and a second electrode being connected to a first electrode of the driver transistor; an eighth transistor with a first electrode being connected to a gate of the driver transistor; a first transistor with a first electrode being connected to a first initial signal line, and a second electrode being connected to a second electrode of the eighth transistor; and a second transistor with a first electrode being connected to the second electrode of the eighth transistor, and a second electrode being connected to a second electrode of the driver transistor.

Abstract: A gate driving unit includes a charge pump circuit and an output circuit; the charge pump circuit is connected to a first input node, an input clock signal terminal and a first node; the charge pump circuit is configured to control a voltage signal of the first input node under the control of an input clock signal provided by the input clock signal terminal, the voltage signal of the first input node is written into the first node when the voltage signal of the first input node is a first voltage signal; the output circuit comprises a first output transistor, a control electrode of the first output transistor is connected to the first node, a first electrode of the first output transistor is connected to an output voltage terminal, and a second electrode of the first output transistor is connected to a gate driving signal output terminal.

Abstract: A display substrate and a display device are provided, the display substrate includes: a substrate, and a power source layer, a conductive layer, and a cathode layer sequentially stacked on the substrate in a direction away from the substrate; the conductive layer includes first conductive patterns and second conductive patterns insulated from each other, the first conductive patterns are coupled to the power source layer, and the second conductive patterns are coupled to the cathode layer.