Abstract: The present disclosure provides a touch display panel. The touch display panel includes a display substrate and a touch layer, wherein the touch layer includes a plurality of touch units and a plurality of touch lines which are disposed on the display substrate; wherein the touch lines are connected to at least one touch unit and are configured to electrically connect the touch unit connected thereto to a touch integrated circuit; the plurality of touch lines at least include a first trace and a second trace which are disposed in a non-display region, a length of the first trace being greater than a length of the second trace, and a cross-sectional area of the first trace being larger than a cross-sectional area of the second trace.

Abstract: The present disclosure provides a display panel and a method of manufacturing the same and a display device. In a sub-pixel driving circuit of the display panel, a gate electrode of a driving transistor is coupled to a second electrode of a second transistor through a fourth conductive connection portion, and a second electrode plate of a storage capacitor is coupled to a second electrode of a first transistor through a third conductive connection portion, a gate electrode of the first transistor and a gate electrode of the second transistor are respectively coupled to a gate line pattern in the corresponding sub-pixel area; orthographic projection of the gate line pattern on the substrate does not overlap orthographic projection of the third conductive connecting portion on the substrate, and/or does not overlap orthographic projection of the fourth conductive connection portion on the substrate.

Abstract: Disclosed are a display substrate and a preparation method thereof, and a display apparatus. The display substrate includes a substrate and a plurality of sub-pixels, at least one sub-pixel includes a pixel drive circuit and a light emitting device connected to the pixel drive circuit, the pixel drive circuit includes a plurality of transistors, wherein at least one transistor includes an active layer and two gate electrodes. The substrate is provided with a semiconductor layer and a plurality of conductive layers disposed on one side of the semiconductor layer away from the substrate, at least one conductive layer is provided with at least one electrode plate, and there is an overlapping region between an orthographic projection of the electrode plate on the substrate and an orthographic projection of the active layer between the two gate electrodes on the substrate.

Abstract: The display substrate includes a shift register arranged on a base substrate, the shift register includes multiple stages of driving circuits, the driving circuit includes a first/second input circuit, a first/second output circuit and a control circuit; the first output circuit is configured to provide a first scanning driving signal to the first driving signal output terminal under the control of a potential of a first node and a potential of a second node; the first input circuit is configured to input a signal to the third node under the control of the clock signal; the second input circuit is configured to input a signal provided by the power line to the second node under the control of the potential of the third node; the control circuit is configured to control the potential of the third node and the potential of the first node.

Abstract: A display panel includes pixel circuits, first shift register(s), second shift register(s), third shift register(s), and fourth shift register(s). A pixel circuit includes a driving transistor, a bias sub-circuit, a data writing sub-circuit, a compensation sub-circuit, a leakage prevention sub-circuit, a reset sub-circuit, and a light-emission control sub-circuit. The bias sub-circuit is electrically connected to a first shift register, which transmits a first scanning signal to the bias sub-circuit. The data writing and compensation sub-circuits are electrically connected to a second shift register, which transmits a second scanning signal to the data writing and compensation sub-circuits. The leakage prevention sub-circuit is electrically connected to a third shift register, which transmits a third scanning signal to the leakage prevention sub-circuit.

Abstract: A display substrate has a screen area, the screen area includes at least one sensing area and a display area surrounding each sensing area, the sensing area includes a light-transmitting area and a routing area. The display substrate includes: a plurality of first gate lines, each of which includes a gate line main body part in the display area and a gate line connecting part; and a plurality of first data lines, each of which includes a data line main body part in the display area and a data line connecting part. For any one of the routing areas, the plurality of data line connecting parts are respectively in at least two metal layers insulated and spaced from each other, and/or, the plurality of gate line connecting parts are respectively arranged in at least two metal layers insulated and spaced from each other.

Abstract: Provided is a display substrate including a display region and a non-display region. The non-display region is provided with a gate drive circuit, and the gate drive circuit includes a plurality of cascaded shift register units; a shift register unit includes an input sub-circuit and a denoising output sub-circuit. The denoising output sub-circuit is connected with the input sub-circuit, a first group of clock signal lines, and a second group of clock signal lines, and the input sub-circuit is connected with a third group of clock signal lines. The third group of clock signal lines, the input sub-circuit, the first group of clock signal lines, the denoising output sub-circuit, and the second group of clock signal lines are sequentially arranged along a first direction.

Abstract: Provided is a pixel circuit. In the pixel circuit, a data writing circuit controls the connection or disconnection between a data terminal and a first node, a reset circuit controls the connection or disconnection between an initial power supply terminal and a second node and between an initial power supply terminal and a light-emitting element, and controls the connection or disconnection between a reference power supply terminal and the first node, a potential adjustment circuit adjusts the potentials of the first node, the second node and the third node, a light emission control circuit controls the connection or disconnection between the reference power supply terminal and the first node, and controls the connection or disconnection between the fourth node and the light-emitting element, and a drive circuit drives the light-emitting element to emit light.

Abstract: A shift register unit and a driving method thereof, a gate drive circuit, and a display device are disclosed. The shift register unit includes: an input circuit, a first control circuit, an output circuit, an output noise reduction circuit, and a reset circuit; wherein the input circuit is connected to an input terminal; the first control circuit is connected to the first node, a second node, and a first clock signal terminal; the output circuit is connected to an output terminal; the output noise reduction circuit is connected to the output terminal; and the reset circuit is connected to a total reset terminal and a first voltage terminal, wherein the total reset signal is an invalid level in a first operation stage, and the total reset signal includes at least one period of valid level in a second operation stage.

Abstract: Provided are a pixel driving circuit and a display panel. The pixel driving circuit includes: a data writing sub-circuit, a threshold compensation sub-circuit, a driving sub-circuit, a storage sub-circuit, a first reset sub-circuit, a second reset sub-circuit. The driving sub-circuit and the storage sub-circuit are connected at a first node; the data writing sub-circuit and the storage sub-circuit are connected at a second node; the first reset sub-circuit includes a first transistor having a control electrode connected with a first reset signal line, a first electrode connected with a first initialization signal line, and a second electrode connected with the first node; the threshold compensation sub-circuit includes a second transistor having a first electrode connected with the first node, a second electrode connected with the second node, and a control electrode connected with a second scan line; the first transistor and/or the second transistor includes an oxide thin film transistor.

Abstract: The present invention relates to the technical field of head protection equipment, in particular to a wearable head-protecting safety device, including a helmet body provided with oppositely arranged mounting seats on both sides near the lower edge thereof and a quick-release adapter assembly in form of a mask structure, wherein the quick-release adapter assembly is provided with a quick-release mechanism cooperating with the mounting seat at both ends near the upper edge thereof, the quick-release mechanism being relatively rotatable and detachably connected to the mounting seats, and wherein the quick-release adapter assembly is a grinding flip assembly or a welding flip assembly. It is possible to achieve switching of various types of masks through the quick-release adapter assembly detachably connected to the helmet body. Compared with prior art, the present invention can be applied to various scenarios through mask switching, improving the applicability of the wearable head-protecting safety device.

Abstract: Disclosed is a display substrate including a display region and a non-display region. The non-display region is provided with a gate drive circuit, the gate drive circuit includes a plurality of cascaded shift register units, and a shift register unit is connected with at least one power supply line. The shift register unit includes a first output circuit and a second output circuit. The first output circuit is connected with a first group of clock signal lines, and the second output circuit is connected with the first group of clock signal lines and a second group of clock signal lines. In a first direction, the first group of clock signal lines and the at least one power supply line are located between the first output circuit and the second output circuit.

Abstract: A display substrate is disclosed, including a base substrate, multiple data lines, multiple sub-pixels, multiple data lead-out lines, and at least one first compensation unit. The base substrate includes a display area and a first bezel area located on a side of the display area. The multiple data lines and the plurality of sub-pixels are located in the display area. The multiple data lead-out lines are located in the first bezel area and electrically connected with the plurality of data lines in the display area. The at least one first compensation unit is located in the first bezel area. At least one data lead-out line is electrically connected with the at least one first compensation unit, and the at least one first compensation unit is configured to compensate at least one of resistance and capacitance of a data line electrically connected with the at least one data lead-out line.

Abstract: The present disclosure provides a display panel, a manufacturing method thereof, and a display device. The initialization signal line layer in the display panel includes an initialization signal line pattern arranged in each sub-pixel area; the anode layer includes a plurality of anode patterns, and an anode spacing area is formed between adjacent anode patterns; the first auxiliary signal line layer is a grid structure, at least part of the first auxiliary signal line layer is located in the anode spacing area, and the initialization signal line pattern in each sub-pixel area is coupled to the first auxiliary signal line layer.

Abstract: The present disclosure relates to an array substrate and a display device. The array substrate includes a plurality of pixel units arranged in an array, each of the pixel units including a plurality of sub-pixels. The array substrate includes: a plurality of power lines which are arranged in a conductive layer on a base substrate, are arranged at intervals along a first direction and extend along a second direction, and are used for providing power signals to the sub-pixels; and a plurality of power leads which are arranged in another conductive layer, are arranged at intervals along the second direction and extend along the first direction. Projections of at least one of the power lines and at least one of the power leads on the base substrate intersect, and the projections of the power lines and the power leads on the base substrate form a grid-like structure.

Abstract: The invention relates to the technical field of welding machine protection, specifically a protective device for interlocking welding machines, a design method, and a shield. The device includes: an inductive detection module to detect the relative position between the shield and a human head; a position detection module to detect the filter lens position relative to the shield; a determination module connected to both detection modules to check if all parameters are within a preset range, converting them into an unlocking signal if so; and a transmission module to send this signal to the welding machine, allowing operator control after unlocking. The invention enhances safety, reduces injury risks, and offers reliable protection, with advantages like high safety, automatic control, and effective interlocking.

Abstract: A display panel and a display device are provided. The display panel includes a base substrate and a pixel driving circuit provided on a side of the base substrate, and the pixel driving circuit includes a driving transistor, ninth transistor, eighth transistor, first transistor and second transistor. A first electrode of the ninth transistor is connected to a third initial signal line and a second electrode of the ninth transistor is connected to a first electrode of the driving transistor. A first electrode of the eighth transistor is connected to a gate electrode of the driving transistor. A first electrode of the first transistor is connected to a first initial signal line and a second electrode of the first transistor is connected to a second electrode of the eighth transistor. A first electrode of the second transistor is connected to the second electrode of the eighth transistor and a second electrode of the second transistor is connected to a second electrode of the driving transistor.

Abstract: Provided is a display substrate, a drive method thereof and a display apparatus, the display substrate includes: a first drive mode and a second drive mode, the first drive mode has a refresh rate less than that of the second drive mode, wherein the contents displayed on the display substrate include a plurality of display frames, in the first drive mode, the display frames include: a refresh frame and at least one maintain frame; the display substrate includes pixel circuits arranged in an array, the pixel circuits include a data signal line and a first initial signal line; the data signal line provides a first data signal in the maintain frame, the voltage value of the first data signal is constant, and/or the first initial signal line provides a first initial signal in the refresh frame and the maintain frame, the first initial signal is an AC signal.

Abstract: Methods, systems, and devices for wireless communications are described. A first UE may perform a sensing procedure to identify that a first sidelink resource is available. The first UE may select the first sidelink resource for transmitting a first message and one or more remaining sidelink resources for transmitting one or more additional messages. The first CE may transmit the first message via the first sidelink resource to a second UE, the first message indicating a reservation and a resource utilization probability vector for the remaining sidelink resources. The resource utilization probability vector may include the resource utilization probabilities for each sidelink resource. The second UE may select a first sidelink resource of the remaining sidelink resources or a second sidelink resource for transmitting a sidelink message based on the resource utilization probability vector, and may transmit the sidelink message to the first UE in the selected sidelink resource.

Abstract: A display substrate and a display device. The display substrate includes: a plurality of pixel islands, a first opening, a second opening and a first passage region. Each pixel island includes at least one pixel, each pixel includes a plurality of first driving lines, the first passage region is provided with a plurality of first connection lines, each of the plurality of pixel islands further includes a plurality of transfer lines, and the plurality of transfer lines are arranged in different layers from the plurality of first driving lines and cross each other to form a plurality of overlapping regions; the plurality of transfer lines are electrically connected with the plurality of first driving lines through via holes located in part of the overlapping regions, and the transfer lines in two adjacent pixel islands are respectively connected with the plurality of first connection lines in the first passage region.