Patents by Inventor Lidong Xu

Lidong Xu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10764592
    Abstract: Systems, devices and methods are described including performing scalable video coding using inter-layer residual prediction. Inter-layer residual prediction in an enhancement layer coding unit, prediction unit, or transform unit may use residual data obtained from a base layer or from a lower enhancement layer. The residual may be subjected to upsample filtering and/or refinement filtering. The upsample or refinement filter coefficients may be predetermined or may be adoptively determined.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: September 1, 2020
    Assignee: Intel Corporation
    Inventors: Wenhao Zhang, Yi-Jen Chiu, Lidong Xu, Yu Han, Zhipin Deng, Xiaoxia Cai
  • Patent number: 10659777
    Abstract: Systems, apparatus and methods are described including determining a prediction residual for a channel of video data; and determining, using the first channel's prediction residual, a prediction residual for a second channel of the video data. Further, a prediction residual for a third channel of the video data may be determined using the second channel's prediction residual.
    Type: Grant
    Filed: September 11, 2018
    Date of Patent: May 19, 2020
    Assignee: Intel Corporation
    Inventors: Lidong Xu, Yi-Jen Chiu, Yu Han, Wenhao Zhang
  • Publication number: 20200151964
    Abstract: Systems, apparatus, articles, and methods are described below including operations for scalable real-time face beautification of video images.
    Type: Application
    Filed: October 21, 2019
    Publication date: May 14, 2020
    Inventors: Ke Chen, Zhipin Deng, Xiaoxia Cai, Chen Wang, Ya-Ti Peng, Yi-Jen Chiu, Lidong Xu
  • Patent number: 10536710
    Abstract: Systems, apparatus and methods are described including operations for video coding including cross-layer cross-channel residual prediction.
    Type: Grant
    Filed: June 27, 2012
    Date of Patent: January 14, 2020
    Assignee: Intel Corporation
    Inventors: Lidong Xu, Yu Han, Wenhao Zhang, Yi-Jen Chiu, Hong Jiang
  • Patent number: 10516898
    Abstract: Methods, systems, and computer program products for the generation of multiple layers of scaled encoded video data compatible with the HEVC standard. Residue from prediction processing may be transformed into coefficients in the frequency domain. The coefficients may then be sampled to create a layer of encoded data. The coefficients may be sampled in different ways to create multiple respective layers. The layers may then be multiplexed and sent to a decoder. There, one or more of the layers may be chosen. The choice of certain layer(s) may be dependent on the desired attributes of the resulting video. A certain level of video quality, frame rate, resolution, and/or bit depth may be desired, for example. The coefficients in the chosen layers may then be assembled to create a version of the residue to be used in video decoding.
    Type: Grant
    Filed: April 24, 2018
    Date of Patent: December 24, 2019
    Assignee: Intel Corporation
    Inventors: Wenhao Zhang, Yi-Jen Chiu, Lidong Xu, Yu Han, Hong Jiang
  • Publication number: 20190387250
    Abstract: Embodiments are generally directed to affine motion compensation for current picture referencing. An embodiment of an apparatus includes one or more processors for processing of data; a memory for storage of data including video data; and an encoder for encoding of video data to generate encoded video data, wherein the encoder includes a component to provide affine motion compensation for current picture references in the video data.
    Type: Application
    Filed: June 11, 2019
    Publication date: December 19, 2019
    Applicant: Intel Corporation
    Inventors: Jill Boyce, Zhipin Deng, Lidong Xu
  • Publication number: 20190387248
    Abstract: Method and apparatus for deriving a motion vector at a video decoder. A block-based motion vector may be produced at the video decoder by utilizing motion estimation among available pixels relative to blocks in one or more reference frames. The available pixels could be, for example, spatially neighboring blocks in the sequential scan coding order of a current frame, blocks in a previously decoded frame, or blocks in a downsampled frame in a lower pyramid when layered coding has been used.
    Type: Application
    Filed: August 27, 2019
    Publication date: December 19, 2019
    Applicant: Intel Corporation
    Inventors: Yi-Jen Chiu, Lidong Xu, Hong Jiang
  • Patent number: 10477208
    Abstract: Reconstructed picture quality for a video codec system may be improved by categorizing reconstructed pixels into different histogram bins with histogram segmentation and then applying different filters on different bins. Histogram segmentation may be performed by averagely dividing the histogram into M bins or adaptively dividing the histogram into N bins based on the histogram characteristics. Here M and N may be a predefined, fixed, non-negative integer value or an adaptively generated value at encoder side and may be sent to decoder through the coded bitstream.
    Type: Grant
    Filed: March 15, 2017
    Date of Patent: November 12, 2019
    Assignee: Intel Corporation
    Inventors: Lidong Xu, Yi-Jen Chiu, Wenhao Zhang, Hong Jiang
  • Patent number: 10462467
    Abstract: Techniques involving inter layer prediction of scalable video coding are described. Such techniques may employ refining filters.
    Type: Grant
    Filed: February 15, 2017
    Date of Patent: October 29, 2019
    Assignee: Intel Corporation
    Inventors: Wenhao Zhang, Yi-Jen Chiu, Lidong Xu, Zhipin Deng, Yu Han, Xiaoxia Cai, Hong Jiang
  • Patent number: 10453270
    Abstract: Systems, apparatus, articles, and methods are described below including operations for scalable real-time face beautification of video images.
    Type: Grant
    Filed: September 11, 2015
    Date of Patent: October 22, 2019
    Assignee: Intel Corporation
    Inventors: Ke Chen, Zhipin Deng, Xiaoxia Cai, Chen Wang, Ya-Ti Peng, Yi-Jen Chiu, Lidong Xu
  • Publication number: 20190297344
    Abstract: An example system includes a processor to execute an intra search first stage on a video frame to generate intra candidates. The processor is to execute an intra search second stage on the intra candidates to generate a final intra candidate and residuals. The processor is to also execute a final mode decision and generate reconstructed pixels based on the final intra candidate and the residuals.
    Type: Application
    Filed: June 13, 2019
    Publication date: September 26, 2019
    Applicant: INTEL CORPORATION
    Inventors: James M. Holland, Srinivasan Embar Raghukrishnan, Zhijun Lei, Dmitry E. Ryzhov, Lidong Xu, Satya N. Yedidi
  • Patent number: 10404994
    Abstract: Method and apparatus for deriving a motion vector at a video decoder. A block-based motion vector may be produced at the video decoder by utilizing motion estimation among available pixels relative to blocks in one or more reference frames. The available pixels could be, for example, spatially neighboring blocks in the sequential scan coding order of a current frame, blocks in a previously decoded frame, or blocks in a downsampled frame in a lower pyramid when layered coding has been used.
    Type: Grant
    Filed: April 23, 2018
    Date of Patent: September 3, 2019
    Assignee: Intel Corporation
    Inventors: Yi-Jen Chiu, Lidong Xu, Hong Jiang
  • Publication number: 20190261001
    Abstract: A system for video encoding is described herein. The system includes a processor to execute a multi-pass palette search and mapping on a video frame to generate palette candidates. The processor is to execute an intra block copy prediction on the video frame to generate intra-block-copy candidates. The processor is to also calculate a rate distortion optimization (RDO) cost for a set of generated residuals, the palette candidates, and the intra-block-copy candidates. The processor is to further also execute a final mode decision based on a comparison of the rate distortion optimization (RDO) costs.
    Type: Application
    Filed: May 1, 2019
    Publication date: August 22, 2019
    Applicant: INTEL CORPORATION
    Inventors: James M. Holland, Srinivasan Embar Raghukrishnan, Dmitry E. Ryzhov, Lidong Xu, Satya N. Yedidi, Wenhao Zhang
  • Patent number: 10291925
    Abstract: An apparatus of video encoding is described herein. The apparatus includes an encoder and a hardware bit packing unit. The encoder includes a fixed function hierarchical motion estimation search unit, fixed function integer motion estimation search units, and a fixed function check and refinement unit. The check and refinement unit is to generate residuals using nested loops based on at least one spatial domain prediction and at least one frequency domain prediction and perform a final mode decision based on rate distortion optimization (RDO) costs associated with the generated residuals. The hardware bit packing unit is to pack bits as coded according to the final mode decision into a data format.
    Type: Grant
    Filed: July 28, 2017
    Date of Patent: May 14, 2019
    Assignee: Intel Corporation
    Inventors: James M. Holland, Srinivasan Embar Raghukrishnan, Lidong Xu, Fangwen Fu, Dmitry E. Ryzhov, Satya N. Yedidi
  • Publication number: 20190132605
    Abstract: Techniques related to motion estimation with neighbor block pattern for video coding.
    Type: Application
    Filed: June 9, 2016
    Publication date: May 2, 2019
    Applicant: Intel Corporation
    Inventors: Zhipin Deng, Iole Moccagatta, Lidong Xu, Wenhao Zhang, Yi-Jen Chiu
  • Patent number: 10277908
    Abstract: Described herein are techniques related to re-use of filter parameters, and particularly Sample Adaptive Offset (SAO) parameters, of a lower-layer bitstream or a coded enhancement layer bitstream for coding enhancement layer bitstream in a scalable video encoding.
    Type: Grant
    Filed: September 25, 2012
    Date of Patent: April 30, 2019
    Assignee: Intel Corporation
    Inventors: Lidong Xu, Yi-Jen Chiu, Zhipin Deng, Wenhao Zhang, Yu Han, Xiaoxia Cai, Hong Jiang
  • Publication number: 20190098294
    Abstract: Systems, apparatus and methods are described including determining a prediction residual for a channel of video data; and determining, using the first channel's prediction residual, a prediction residual for a second channel of the video data. Further, a prediction residual for a third channel of the video data may be determined using the second channel's prediction residual.
    Type: Application
    Filed: September 11, 2018
    Publication date: March 28, 2019
    Applicant: Intel Corporation
    Inventors: Lidong Xu, Yi-Jen Chiu, Yu Han, Wenhao Zhang
  • Publication number: 20190037227
    Abstract: An apparatus of video encoding is described herein. The apparatus includes an encoder and a hardware bit packing unit. The encoder includes a fixed function hierarchical motion estimation search unit, fixed function integer motion estimation search units, and a fixed function check and refinement unit. The check and refinement unit is to generate residuals using nested loops based on at least one spatial domain prediction and at least one frequency domain prediction and perform a final mode decision based on rate distortion optimization (RDO) costs associated with the generated residuals. The hardware bit packing unit is to pack bits as coded according to the final mode decision into a data format.
    Type: Application
    Filed: July 28, 2017
    Publication date: January 31, 2019
    Applicant: Intel Corporation
    Inventors: James M. Holland, Srinivasan Embar Raghukrishnan, Lidong Xu, Fangwen Fu, Dmitry E. Ryzhov, Satya N. Yedidi
  • Patent number: 10171808
    Abstract: A video encoder may use an adaptive Wiener filter inside the core video encoding loop to improve coding efficiency. In one embodiment, the Wiener filter may be on the input to a motion estimation unit and, in another embodiment, it may be on the output of a motion compensation unit. The taps for the Wiener filter may be determined based on characteristics of at least a region of pixel intensities within a picture. Thus, the filtering may be adaptive in that it varies based on the type of video being processed.
    Type: Grant
    Filed: March 30, 2016
    Date of Patent: January 1, 2019
    Assignee: Intel Corporation
    Inventors: Yi-Jen Chiu, Lidong Xu
  • Patent number: 10165273
    Abstract: A video encoder may use an adaptive Wiener filter inside the core video encoding loop to improve coding efficiency. In one embodiment, the Wiener filter may be on the input to a motion estimation unit and, in another embodiment, it may be on the output of a motion compensation unit. The taps for the Wiener filter may be determined based on characteristics of at least a region of pixel intensities within a picture. Thus, the filtering may be adaptive in that it varies based on the type of video being processed.
    Type: Grant
    Filed: December 4, 2015
    Date of Patent: December 25, 2018
    Assignee: Intel Corporation
    Inventors: Yi-Jen Chiu, Lidong Xu