Patents by Inventor Limin Wang

Limin Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11533510
    Abstract: A method of partitioning a video coding block for JVET, comprising representing a JVET coding tree unit as a root node in a quadtree plus binary tree (QTBT) structure that can have a quadtree branching from the root node and binary trees branching from each of the quadtree's leaf nodes using asymmetric binary partitioning to split a coding unit represented by a quadtree leaf node into two child coding units of unequal size, representing the two child coding units as leaf nodes in a binary tree branching from the quadtree leaf node and coding the child coding units represented by leaf nodes of the binary tree with JVET, wherein further partitioning of child coding units split from quadtree leaf nodes via asymmetric binary partitioning is disallowed.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: December 20, 2022
    Assignee: ARRIS Enterprises LLC
    Inventors: Krit Panusopone, Limin Wang
  • Patent number: 11527015
    Abstract: An improved method for coding video is provided that includes Virtual Reality (VR) sequences that enables more efficient encoding by organizing the VR sequence as a single 2D block structure. In the method, reference picture and subpicture lists are created and extended to account for coding of the VR sequence. To further improve coding efficiency, reference indexing can be provided for the temporal and spatial difference between a current VR picture block and the reference pictures and subpictures for the VR sequence. Further, because the reference subpictures for the VR sequence may not have the proper orientation once the VR sequence subpictures are organized into the VR sequence, reorientation of the reference subpictures is made so that the reference subpicture orientations match the current VR subpicture orientations.
    Type: Grant
    Filed: March 26, 2021
    Date of Patent: December 13, 2022
    Assignee: ARRIS Enterprises LLC
    Inventors: Seungwook Hong, Limin Wang
  • Patent number: 11523105
    Abstract: Particular embodiments may remove a condition check in the semantics for checking a high-precision data flag. This simplifies the semantics used in the encoding and decoding process. In this case, even if the high-precision data flag is not set, the value of the weighted prediction syntax element is set by the BitDepth variable. However, even if the BitDepth is not considered high-precision data, such as 8 bits, the range for the weighted prediction syntax element is still the same as the fixed value. For example, the syntax elements luma_offset_l0[i], luma_offset_l1[i], delta_chroma_offset_l0[i][j], and delta_chroma_offset_l1[i][j] use the variable BitDepth as described above whether the flag extended_precision_processing_flag is enabled and not enabled to indicate whether the bit depth is above a threshold.
    Type: Grant
    Filed: April 7, 2021
    Date of Patent: December 6, 2022
    Assignee: ARRIS Enterprises LLC
    Inventors: Yue Yu, Limin Wang
  • Patent number: 11516133
    Abstract: Packet-processing circuitry including one or more flow caches whose contents are managed using a cache-entry replacement policy that is implemented based on one or more updatable counters maintained for each of the cache entries. In an example embodiment, the implemented policy enables the flow cache to effectively catch and keep elephant flows by giving to the caught elephant flows appropriate preference in terms of the cache dwell time, which can beneficially improve the overall cache-hit ratio and/or packet-processing throughput. Some embodiments can be used to implement an Open Virtual Switch (OVS). Some embodiments are advantageously capable of implementing the cache-entry replacement policy with very limited additional memory allocation.
    Type: Grant
    Filed: July 6, 2020
    Date of Patent: November 29, 2022
    Assignee: Nokia Solutions and Networks Oy
    Inventors: Hyunseok Chang, Fang Hao, Muralidharan Kodialam, T. V. Lakshman, Sarit Mukherjee, Limin Wang
  • Patent number: 11509936
    Abstract: A method of partitioning a video coding block for JVET, comprising representing a JVET coding tree unit as a root node in a quadtree plus binary tree (QTBT) structure that can have a quadtree branching from the root node and binary trees branching from each of the quadtree's leaf nodes using asymmetric binary partitioning to split a coding unit represented by a quadtree leaf node into two child coding units of unequal size, representing the two child coding units as leaf nodes in a binary tree branching from the quadtree leaf node and coding the child coding units represented by leaf nodes of the binary tree with JVET, wherein further partitioning of child coding units split from quadtree leaf nodes via asymmetric binary partitioning is disallowed.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: November 22, 2022
    Assignee: ARRIS Enterprises LLC
    Inventors: Krit Panusopone, Limin Wang
  • Patent number: 11490117
    Abstract: Particular embodiments provide a variable, BitDepth, that may be set at a value based on a number of bits used to represent pixels in pictures of a video. The variable may be used in syntax elements in HEVC, such as the HEVC range extension, but other coding standards may be used. By using the variable, different resolutions for the video may be accommodated during the encoding and decoding process. For example, the number of pixels in the pictures may be represented by 8 bits, 10 bits, 12 bits, or another number of bits depending on the resolution. Using the BitDepth variable in the syntax provides flexibility in the motion estimation and motion compensation process. For example, syntax elements used in the weighted prediction process may take into account different numbers of bits used to represent the pictures.
    Type: Grant
    Filed: June 18, 2021
    Date of Patent: November 1, 2022
    Assignee: ARRIS Enterprises LLC
    Inventors: Yue Yu, Limin Wang
  • Patent number: 11490116
    Abstract: Particular embodiments provide a variable, BitDepth, that may be set at a value based on a number of bits used to represent pixels in pictures of a video. The variable may be used in syntax elements in HEVC, such as the HEVC range extension, but other coding standards may be used. By using the variable, different resolutions for the video may be accommodated during the encoding and decoding process. For example, the number of pixels in the pictures may be represented by 8 bits, 10 bits, 12 bits, or another number of bits depending on the resolution. Using the BitDepth variable in the syntax provides flexibility in the motion estimation and motion compensation process. For example, syntax elements used in the weighted prediction process may take into account different numbers of bits used to represent the pictures.
    Type: Grant
    Filed: June 18, 2021
    Date of Patent: November 1, 2022
    Assignee: ARRIS Enterprises LLC
    Inventors: Yue Yu, Limin Wang
  • Publication number: 20220329787
    Abstract: There are disclosed a method and an apparatus for video encoding. The method can include determining that a coding unit is in intra coded area and encoding the coding unit in intra prediction mode into a bitstream unless the intra prediction for the coding unit needs a reference sample for prediction from a dirty area. The method can further include determining that a coding unit is in clean area when the coding unit is encoded in inter prediction mode into a bitstream, the method comprises validating a plurality of inter prediction modes to determine which of the plurality of inter prediction modes do not use reference samples from a dirty area, and defining such inter prediction mode as a valid inter prediction mode. The method further includes encoding into a bitstream that exact-match is required at a recovery point and encoding into a bitstream an indication of a use of a diagonal refresh; and transmitting the encoded bitstream to a decoder.
    Type: Application
    Filed: July 29, 2020
    Publication date: October 13, 2022
    Inventors: Limin WANG, Krit PANUSOPONE, Seungwook HONG
  • Patent number: 11470351
    Abstract: Particular embodiments provide a variable, BitDepth, that may be set at a value based on a number of bits used to represent pixels in pictures of a video. The variable may be used in syntax elements in HEVC, such as the HEVC range extension, but other coding standards may be used. By using the variable, different resolutions for the video may be accommodated during the encoding and decoding process. For example, the number of pixels in the pictures may be represented by 8 bits, 10 bits, 12 bits, or another number of bits depending on the resolution. Using the BitDepth variable in the syntax provides flexibility in the motion estimation and motion compensation process. For example, syntax elements used in the weighted prediction process may take into account different numbers of bits used to represent the pictures.
    Type: Grant
    Filed: June 18, 2021
    Date of Patent: October 11, 2022
    Assignee: ARRIS Enterprises LLC
    Inventors: Yue Yu, Limin Wang
  • Patent number: 11470349
    Abstract: Particular embodiments provide a variable, BitDepth, that may be set at a value based on a number of bits used to represent pixels in pictures of a video. The variable may be used in syntax elements in HEVC, such as the HEVC range extension, but other coding standards may be used. By using the variable, different resolutions for the video may be accommodated during the encoding and decoding process. For example, the number of pixels in the pictures may be represented by 8 bits, 10 bits, 12 bits, or another number of bits depending on the resolution. Using the BitDepth variable in the syntax provides flexibility in the motion estimation and motion compensation process. For example, syntax elements used in the weighted prediction process may take into account different numbers of bits used to represent the pictures.
    Type: Grant
    Filed: June 18, 2021
    Date of Patent: October 11, 2022
    Assignee: ARRIS Enterprises LLC
    Inventors: Yue Yu, Limin Wang
  • Patent number: 11470350
    Abstract: Particular embodiments provide a variable, BitDepth, that may be set at a value based on a number of bits used to represent pixels in pictures of a video. The variable may be used in syntax elements in HEVC, such as the HEVC range extension, but other coding standards may be used. By using the variable, different resolutions for the video may be accommodated during the encoding and decoding process. For example, the number of pixels in the pictures may be represented by 8 bits, 10 bits, 12 bits, or another number of bits depending on the resolution. Using the BitDepth variable in the syntax provides flexibility in the motion estimation and motion compensation process. For example, syntax elements used in the weighted prediction process may take into account different numbers of bits used to represent the pictures.
    Type: Grant
    Filed: June 18, 2021
    Date of Patent: October 11, 2022
    Assignee: ARRIS Enterprises LLC
    Inventors: Yue Yu, Limin Wang
  • Publication number: 20220319430
    Abstract: A pixel driving circuit and a display panel are provided. In the pixel driving circuit, a cathode of a light-emitting device is connected to an output terminal of a driving module; during a first detection period, an anode of the light-emitting device is connected to a low electrical potential power signal; during a second detection period and a display period, the anode of the light-emitting device is connected to a high electrical potential power signal; and in a light-emitting phase of the display period, voltage values of the output terminals of the driving module are all within a preset range in the pixel driving circuit corresponding to different sub-pixels. Therefore, the present disclosure improves brightness uniformity of the display panel.
    Type: Application
    Filed: April 21, 2020
    Publication date: October 6, 2022
    Applicant: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Limin WANG, Taijiun HWANG, Zhenling WANG
  • Patent number: 11463708
    Abstract: A method is provided for inter-coding video in which coding units can be encoded using multiple local illumination compensation (LIC) values to more accurately and efficiently transmit and render video. In the method, two or more LIC values can be established for a single coding unit (CU) such that the CU can be coded using multiple LIC values instead of a single LIC value as employed in present systems.
    Type: Grant
    Filed: October 7, 2020
    Date of Patent: October 4, 2022
    Assignee: ARRIS Enterprises LLC
    Inventors: Yue Yu, Krit Panusopone, Limin Wang
  • Patent number: 11457233
    Abstract: A method for inter-coding video in which encoder and decoder memory requirements associated with storage of motion information related to collocated coding units is reduced. In the method motion information related to only a single or reduced set of collocated coding unit(s) may be stored at the encoder and decoder. In operation, if the encoder determines that motion information for a current coding unit should replace a currently stored motion information for currently stored motion information for the collocated coding unit, then the encoder can replace the motion information at the encoder and transmit an indicator with the current coding unit to signal to the decoder that currently stored motion information currently should be updated or replaced with the motion information associated with the current coding unit.
    Type: Grant
    Filed: April 12, 2019
    Date of Patent: September 27, 2022
    Assignee: ARRIS Enterprises LLC
    Inventors: Yue Yu, Krit Panusopone, Limin Wang, Seungwook Hong
  • Publication number: 20220272387
    Abstract: A system for signaling extension functions used in decoding a sequence including a plurality of pictures, each picture processed at least in part according to a picture parameter set is disclosed. An extension presence signaling flag is read and used to determine whether flags signaling the performance of extension functions are to be read. The flags are only read if indicated by the extension presence signaling flag.
    Type: Application
    Filed: May 12, 2022
    Publication date: August 25, 2022
    Applicant: ARRIS Enterprises LLC
    Inventors: Yue YU, Limin WANG
  • Publication number: 20220248003
    Abstract: A system and method of planar motion vector derivation which, in some embodiments can employ an unequal weighted combination of adjacent motion vectors. In some embodiments, motion vector information associated with a bottom right pixel or block adjacent to a current coding unit can be derived from motion information associated with a top row or top neighboring row of a current coding unit and motion information associated with a left column or left neighboring column of a current coding unit. Weighted or non-weighted combinations of such values can be combined in a planar mode prediction model to derive associated motion information for bottom and/or right adjacent pixels or blocks.
    Type: Application
    Filed: April 20, 2022
    Publication date: August 4, 2022
    Applicant: ARRIS Enterprises LLC
    Inventors: Krit Panusopone, Seungwook Hong, Yue Yu, Limin Wang
  • Publication number: 20220237067
    Abstract: Disclosed are a relay protection system risk assessment and fault positioning method and apparatus, and a device and a medium.
    Type: Application
    Filed: November 13, 2019
    Publication date: July 28, 2022
    Inventors: Wenhuan WANG, Peng GUO, Rongrong ZHAN, Lie ZHANG, Yanfei LI, Guosheng YANG, Limin WANG, Yiqun KANG, Hanfang ZHANG, Zhoutian YAN
  • Publication number: 20220217373
    Abstract: A method, apparatus, article of manufacture, and a memory structure for signaling extension functions used in decoding a sequence comprising a plurality of pictures, each picture processed at least in part according to a picture parameter set is disclosed. In one embodiment, the method comprises reading a first extension flag signaling a first extension function in the processing of the sequence and determining if the first extension flag has a first value. Further, the method reads a second extension flag signaling a second extension function in the processing of the sequence and performs the second extension function according to the read second extension flag only if the first extension flag has a first value.
    Type: Application
    Filed: March 21, 2022
    Publication date: July 7, 2022
    Applicant: ARRIS Enterprises LLC
    Inventors: Yue YU, Limin WANG
  • Publication number: 20220210407
    Abstract: A method of decoding JVET video, comprising defining a coding unit (CU) template within a decoded area of a video frame, the CU template being positioned above and/or to the left of a current decoding position for which data was intra predicted, defining a search window within the decoded area, the search window being adjacent to the CU template, generating a plurality of candidate prediction templates based on pixel values in the search window, each of the plurality of candidate prediction templates being generated using different intra prediction modes, calculating a matching cost between the CU template and each of the plurality of candidate prediction templates, selecting an intra prediction mode that generated the candidate prediction template that had the lowest matching cost relative to the CU template, and generating a prediction CU for the current decoding position based on the intra prediction mode.
    Type: Application
    Filed: March 14, 2022
    Publication date: June 30, 2022
    Applicant: ARRIS Enterprises LLC
    Inventors: Krit PANUSOPONE, Limin WANG, Koohyar MINOO
  • Publication number: 20220191514
    Abstract: A method of decoding JVET video, comprising receiving a bitstream indicating how a coding tree unit was partitioned into coding units according to a partitioning structure that allows nodes to be split according to a partitioning technique. An intra direction mode for a coding unit may be selected, as well as one or more of the plurality of reference lines to generate at least one predictor for the intra direction mode. A predictor may be generated from reference samples within each selected reference line by combining predicted pixel values based on a projected position on a main reference line in combination with predicted pixel values based on a projected position on a side reference line. The predicted pixel values are weighted according to a weight parameter, wherein the weight parameter is determined based on a shift conversion factor.
    Type: Application
    Filed: March 4, 2022
    Publication date: June 16, 2022
    Applicant: ARRIS Enterprises LLC
    Inventors: Krit PANUSOPONE, Koohyar MINOO, Yue YU, Limin WANG