Patents by Inventor Lin Lee

Lin Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240136484
    Abstract: An electronic device includes a substrate, a semiconductor unit and an insulating layer. The semiconductor unit is disposed on the substrate. The insulating layer is disposed on the semiconductor unit, and the insulating layer includes a first portion and a second portion connected to the first portion. In a top view, the first portion partially overlaps the semiconductor unit, the second portion does not overlap the semiconductor unit, and a part of an edge of the insulating layer is irregular.
    Type: Application
    Filed: January 2, 2024
    Publication date: April 25, 2024
    Applicant: InnoLux Corporation
    Inventors: Jia-Yuan Chen, Tsung-Han Tsai, Kuan-Feng Lee, Yuan-Lin Wu
  • Publication number: 20240136221
    Abstract: In some embodiments, the present disclosure relates to an integrated chip. The integrated chip may comprise a first metal line disposed over a substrate. A via may be disposed directly over a top of the first metal line and the via may comprise a first lower surface and a second lower surface above the first lower surface. A first dielectric structure may be disposed laterally adjacent to the first metal line and may be disposed along a sidewall of the first metal line. A first protective etch-stop structure may be disposed directly over a top of the first dielectric structure and the first protective etch-stop structure may vertically separate the second lower surface of the via from the top of the first dielectric structure.
    Type: Application
    Filed: January 3, 2024
    Publication date: April 25, 2024
    Inventors: Shao-Kuan Lee, Hai-Ching Chen, Hsin-Yen Huang, Shau-Lin Shue, Cheng-Chin Lee
  • Publication number: 20240136222
    Abstract: Different isolation liners for different type FinFETs and associated isolation feature fabrication are disclosed herein. An exemplary method includes performing a fin etching process on a substrate to form first trenches defining first fins in a first region and second trenches defining second fins in a second region. An oxide liner is formed over the first fins in the first region and the second fins in the second region. A nitride liner is formed over the oxide liner in the first region and the second region. After removing the nitride liner from the first region, an isolation material is formed over the oxide liner and the nitride liner to fill the first trenches and the second trenches. The isolation material, the oxide liner, and the nitride liner are recessed to form first isolation features (isolation material and oxide liner) and second isolation features (isolation material, nitride liner, and oxide liner).
    Type: Application
    Filed: December 18, 2023
    Publication date: April 25, 2024
    Inventors: Tzung-Yi TSAI, Tsung-Lin LEE, Yen-Ming CHEN
  • Publication number: 20240133949
    Abstract: An outlier IC detection method includes acquiring first measured data of a first IC set, training the first measured data for establishing a training model, acquiring second measured data of a second IC set, generating predicted data of the second IC set by using the training model according to the second measured data, generating a bivariate dataset distribution of the second IC set according to the predicted data and the second measured data, acquiring a predetermined Mahalanobis distance on the bivariate dataset distribution of the second IC set, and identifying at least one outlier IC from the second IC set when at least one position of the at least one outlier IC on the bivariate dataset distribution is outside a range of the predetermined Mahalanobis distance.
    Type: Application
    Filed: October 3, 2023
    Publication date: April 25, 2024
    Applicant: MEDIATEK INC.
    Inventors: Yu-Lin Yang, Chin-Wei Lin, Po-Chao Tsao, Tung-Hsing Lee, Chia-Jung Ni, Chi-Ming Lee, Yi-Ju Ting
  • Patent number: 11967601
    Abstract: A bottom-emission light-emitting diode (LED) display includes a transparent substrate, a plurality of LEDs bonded on the substrate, a packaging layer formed on the substrate to cover the LEDs, and a reflecting layer formed on the packaging layer to reflect light emitted by the plurality of LEDs. The reflecting layer has a non-smooth shape or the packaging layer has different refractivities.
    Type: Grant
    Filed: August 13, 2021
    Date of Patent: April 23, 2024
    Assignee: Prilit Optronics, Inc.
    Inventors: Biing-Seng Wu, Chao-Wen Wu, Chun-Bin Wen, Chien-Lin Lai, Hsing-Ying Lee
  • Patent number: 11967552
    Abstract: A method of fabricating a semiconductor interconnect structure includes forming a via in a dielectric layer, depositing a ruthenium-containing conductive layer over a top surface of the via and a top surface of the dielectric layer, and patterning the ruthenium-containing conductive layer to form a conductive line over the top surface of the via, where a thickness of the conductive line is less than a thickness of the via.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: April 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ming-Han Lee, Shau-Lin Shue
  • Patent number: 11968844
    Abstract: Provided are a memory device and a method of forming the same. The memory device includes: a selector; a magnetic tunnel junction (MTJ) structure, disposed on the selector; a spin orbit torque (SOT) layer, disposed between the selector and the MTJ structure, wherein the SOT layer has a sidewall aligned with a sidewall of the selector; a transistor, wherein the transistor has a drain electrically coupled to the MTJ structure; a word line, electrically coupled to a gate of the transistor; a bit line, electrically coupled to the SOT layer; a first source line, electrically coupled to a source of the transistor; and a second source line, electrically coupled to the selector, wherein the transistor is configured to control a write signal flowing between the bit line and the second source line, and control a read signal flowing between the bit line and the first source line.
    Type: Grant
    Filed: November 6, 2022
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Min Lee, Ming-Yuan Song, Yen-Lin Huang, Shy-Jay Lin, Tung-Ying Lee, Xinyu Bao
  • Patent number: 11967591
    Abstract: A method of forming a semiconductor device includes forming a first interconnect structure over a carrier; forming a thermal dissipation block over the carrier; forming metal posts over the first interconnect structure; attaching a first integrated circuit die over the first interconnect structure and the thermal dissipation block; removing the carrier; attaching a semiconductor package to the first interconnect structure and the thermal dissipation block using first electrical connectors and thermal dissipation connectors; and forming external electrical connectors, the external electrical connectors being configured to transmit each external electrical connection into the semiconductor device, the thermal dissipation block being electrically isolated from each external electrical connection.
    Type: Grant
    Filed: August 6, 2021
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Hao Chen, Fong-Yuan Chang, Po-Hsiang Huang, Ching-Yi Lin, Jyh Chwen Frank Lee
  • Publication number: 20240129167
    Abstract: A communication receiver includes a first signal processing circuit and a second signal processing circuit. The first signal processing circuit includes a first feedforward equalizer and a decision circuit. The first feedforward equalizer processes a received signal to generate a first equalized signal. The decision circuit performs hard decision upon the first equalized signal to generate a first symbol decision signal. The second signal processing circuit includes a second feedforward equalizer, a decision feedforward equalizer, and a first decision feedback equalizer. The second feedforward equalizer processes the first equalized signal to generate a second equalized signal. The decision feedforward equalizer processes the first symbol decision signal to generate a third equalized signal. The first decision feedback equalizer generates a second symbol decision signal according to the second equalized signal and the third equalized signal.
    Type: Application
    Filed: September 18, 2023
    Publication date: April 18, 2024
    Applicant: MEDIATEK INC.
    Inventors: Chung-Hsien Tsai, Che-Yu Chiang, Yu-Ting Liu, Tsung-Lin Lee, Chia-Sheng Peng, Ting-Ming Yang
  • Publication number: 20240127720
    Abstract: A display device includes a flexible display panel having two surfaces opposite to each other, and a heat dissipation sheet disposed on one of the two surfaces of the flexible display panel and being foldable together with the flexible display panel. In a side view, the heat dissipation sheet includes at least one opening.
    Type: Application
    Filed: December 18, 2023
    Publication date: April 18, 2024
    Applicant: InnoLux Corporation
    Inventors: Yuan-Lin WU, Kuan-Feng Lee
  • Publication number: 20240130052
    Abstract: A display device includes a display panel including a rollable portion and a non-rollable portion. The display panel includes a supporting structure including a groove disposed on a first side of the supporting structure, a substrate disposed on a second side of the supporting structure and the first side opposite to the second side, and a circuit board fixed onto a back of the display panel. The non-rollable portion has a first region. A first region of the circuit board is joined to the first region of the non-rollable portion. The non-rollable portion has a first end and a second end. The first end is connected to the rollable portion. The second end is connected to the circuit board.
    Type: Application
    Filed: December 20, 2023
    Publication date: April 18, 2024
    Applicant: InnoLux Corporation
    Inventors: Yuan-Lin WU, Tsung-Han Tsai, Kuan-Feng Lee
  • Publication number: 20240124439
    Abstract: The invention relates to imidazopyridines of Formula (I) and pharmaceutically acceptable salts thereof, wherein R0 to R5 are as defined in the description; to their use in medicine; to compositions containing them; to processes for their preparation; and to intermediates used in such processes. The benzimidazoles of Formula (I) are ITK inhibitors and are therefore potentially useful in the treatment of a wide range of disorders including, atopic dermatitis.
    Type: Application
    Filed: December 13, 2021
    Publication date: April 18, 2024
    Applicant: Pfizer Inc.
    Inventors: Scott William Bagley, Agustin Casimiro-Garcia, Jennifer Elizabeth Davoren, Rajiah Aldrin Denny, Brian Stephen Gerstenberger, Katherine Lin Lee, Frank Eldridge Lovering, Mihir Dineshkumar Parikh, Joseph Walter Strohbach, John Isidro Trujillo
  • Publication number: 20240123151
    Abstract: An insertion device includes an upper casing, an insertion module and a lower casing. The insertion module is disposed in the upper casing, and includes a main body assembly, an insertion seat, a first elastic member, a retraction seat and a second elastic member. When the upper casing is depressed, the insertion seat is driven by the first elastic member to perform an automatic-insertion operation, such that limiting structure between the insertion seat and the retraction seat collapses upon the collapse of another limiting structure between the insertion seat and the main body assembly, and that the retraction seat is driven by the second elastic member to perform an automatic-retraction operation.
    Type: Application
    Filed: December 27, 2023
    Publication date: April 18, 2024
    Inventors: Chun-Mu Huang, Chieh-Hsing Chen, Chen-Hao Lee, Kuan-Lin Chang
  • Publication number: 20240130156
    Abstract: A light-emitting element includes a pair of electrodes, a first light-emitting unit, a second light-emitting unit, and a charge generation layer. The first light-emitting unit, between the pair of electrodes, and the first light-emitting unit, includes a first light-emitting layer. The second light-emitting unit, between the pair of electrodes, includes a second light-emitting layer. A first luminescent layer includes a first main body material, a second main body material, a first guest material, and a first auxiliary material, and the first main body material forms a first excimer complex with the second main body material. A first excited triplet state energy level of the first auxiliary material is lower than a first excited triplet state energy level of the first excimer complex, and the first excited triplet state energy level of the first auxiliary material is higher than that of the first guest material.
    Type: Application
    Filed: September 26, 2023
    Publication date: April 18, 2024
    Applicant: WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Yu ZHANG, Li YUAN, Munjae LEE, Wenxu XIANYU, Jie YANG, Huizhen PIAO, Mugyeom KIM, Xianjie LI, Jing HUANG, Fang WANG, Kailong WU, Lin YANG, Yu GU, Mingzhou WU, Jingyao SONG, Danhua SHEN, Guo CHENG
  • Patent number: 11959230
    Abstract: A molding system includes a frame device, a scooping device, a demolding device, a cutting device, an inspection device, a packaging device, and a conveying device. The frame device defines a scooping zone, a hot pressing zone, a cutting zone, an inspection zone, and a packaging zone. The scooping device includes a pulp tank that is adapted to contain a slurry, and a scooping mold that is adapted to scoop the slurry such that the slurry forms a blank unit thereon. The cutting device is adapted to cut the blank unit into a plurality of blank bodies. The conveying device is adapted to convey the blank bodies from the cutting zone to the packaging zone through the inspection zone.
    Type: Grant
    Filed: February 24, 2022
    Date of Patent: April 16, 2024
    Inventors: Fu-Lin Hsiao, Yang-Han Lee
  • Patent number: 11961444
    Abstract: The disclosure provides a transparent display device including a display panel. The display panel includes a display area, a non-display area, and a plurality of pixels. The non-display area is adjacent to the display area. The plurality of pixels are disposed in the display area. A difference between a transmittance of the display area and a transmittance of the non-display area is less than 30% of the transmittance of the display area.
    Type: Grant
    Filed: February 3, 2023
    Date of Patent: April 16, 2024
    Assignee: Innolux Corporation
    Inventors: Yu-Chia Huang, Yuan-Lin Wu, Tsung-Han Tsai, Kuan-Feng Lee
  • Patent number: 11961834
    Abstract: A semiconductor device includes a first diode, a second diode, a clamp circuit and a third diode. The first diode is coupled between an input/output (I/O) pad and a first voltage terminal. The second diode is coupled with the first diode, the I/O pad and a second voltage terminal. The clamp circuit is coupled between the first voltage terminal and the second voltage terminal. The second diode and the clamp circuit are configured to direct a first part of an electrostatic discharge (ESD) current flowing between the I/O pad and the first voltage terminal. The third diode, coupled to the first voltage terminal, and the second diode include a first semiconductor structure configured to direct a second part of the ESD current flowing between the I/O pad and the first voltage terminal.
    Type: Grant
    Filed: March 21, 2022
    Date of Patent: April 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Po-Lin Peng, Li-Wei Chu, Ming-Fu Tsai, Jam-Wem Lee, Yu-Ti Su
  • Patent number: 11961938
    Abstract: A method of processing light-emitting elements includes: transferring a plurality of light-emitting elements from original wafers or next-stage carriers, based on a predetermined pattern. The predetermined pattern arranges two adjacent LED groups in a first direction on the original wafer or carriers to be placed on two non-adjacent positions in the first direction on the next-stage carriers. The light-emitting elements on the original wafer have a horizontal wafer pitch and a vertical wafer pitch. The light-emitting elements on each of the next-stage carriers have a first horizontal pitch and a first vertical pitch. The first horizontal pitch is greater than the horizontal wafer pitch, or the first vertical pitch is greater than the vertical wafer pitch. Besides, a light-emitting element device using the aforementioned method is also provided.
    Type: Grant
    Filed: March 13, 2020
    Date of Patent: April 16, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Min-Hsun Hsieh, Chang-Lin Lee
  • Publication number: 20240120326
    Abstract: Disclosed is a bio sensing device including a medium layer, a light emitting element and an optical sensor. The light emitting element is configured to emit a light toward a user's skin layer, in which the light passes through the medium layer and has a maximum intensity in a first wavelength. The optical sensor is configured to receive a reflected part of the light from the user's skin layer, in which the reflected part of the light passes through the medium layer, and the medium layer has a first transmittance greater than 60% with respect to the first wavelength.
    Type: Application
    Filed: September 11, 2023
    Publication date: April 11, 2024
    Applicant: InnoLux Corporation
    Inventors: Yuan-Lin WU, Chandra LIUS, Tsung-Han TSAI, Kuan-Feng LEE
  • Publication number: 20240120451
    Abstract: An electronic assembly is provided. The electronic assembly includes a first circuit structure including a conductive structure, a second circuit structure disposed on the first circuit structure, a plurality of electronic elements disposed on the first circuit structure, and a connecting element disposed on the first circuit layer. The connecting element is disposed between two adjacent ones of the plurality electronic elements and electrically connected to the second circuit layer and one of the two adjacent ones of the plurality of electronic elements.
    Type: Application
    Filed: December 19, 2023
    Publication date: April 11, 2024
    Inventors: Jia-Yuan CHEN, Tsung-Han TSAI, Kuan-Feng LEE, Yuan-Lin WU