Patents by Inventor Lin XUE

Lin XUE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210234091
    Abstract: A method of etching a layer stack. The method may include providing a substrate in a process chamber, the substrate comprising an array of patterned features, arranged within a layer stack, the layer stack including at least one metal layer, and directing an ion beam to the substrate from an ion source, wherein the ion beam causes a physical sputtering of the at least one metal layer. The method may include directing a neutral reactive gas directly to the substrate, separately from the ion source, wherein the neutral reactive gas reacts with metallic species generated by the physical sputtering of the at least one metal layer.
    Type: Application
    Filed: January 24, 2020
    Publication date: July 29, 2021
    Applicant: APPLIED Materials, Inc.
    Inventors: Jong Mun Kim, Mang-Mang Ling, Soham Asrani, Lin Xue, Chentsau Chris Ying, Srinivas D. Nemani, Ellie Y. Yieh
  • Patent number: 11069853
    Abstract: Embodiments of the disclosure provide methods and apparatus for fabricating magnetic tunnel junction (MTJ) structures on a substrate in for hybrid (or called integrated) spin-orbit-torque magnetic spin-transfer-torque magnetic random access memory (SOT-STT MRAM) applications. In one embodiment, the method includes one or more magnetic tunnel junction structures disposed on a substrate, the magnetic tunnel junction structure comprising a first ferromagnetic layer and a second ferromagnetic layer sandwiching a tunneling barrier layer, a spin orbit torque (SOT) layer disposed on the magnetic tunnel junction structure, and a back end structure disposed on the spin orbit torque (SOT) layer.
    Type: Grant
    Filed: November 19, 2018
    Date of Patent: July 20, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Hsin-Wei Tseng, Chando Park, Jaesoo Ahn, Lin Xue, Mahendra Pakala
  • Publication number: 20210193914
    Abstract: Embodiments of magnetic tunnel junction (MTJ) structures discussed herein employ seed layers of one or more layer of chromium (Cr), NiCr, NiFeCr, RuCr, IrCr, or CoCr, or combinations thereof. These seed layers are used in combination with one or more pinning layers, a first pinning layer in contact with the seed layer can contain a single layer of cobalt, or can contain cobalt in combination with bilayers of cobalt and platinum (Pt), iridium (Ir), nickel (Ni), or palladium (Pd), The second pinning layer can be the same composition and configuration as the first, or can be of a different composition or configuration. The MTJ stacks discussed herein maintain desirable magnetic properties subsequent to high temperature annealing.
    Type: Application
    Filed: March 5, 2021
    Publication date: June 24, 2021
    Inventors: Lin XUE, Chi Hong CHING, Rongjun WANG, Mahendra PAKALA
  • Patent number: 10998496
    Abstract: Embodiments of the disclosure provide methods for forming MTJ structures from a film stack disposed on a substrate for MRAM applications and associated MTJ devices. The methods described herein include forming the film properties of material layers from the film stack to create a film stack with a sufficiently high perpendicular magnetic anisotropy (PMA). An iron containing oxide capping layer is utilized to generate the desirable PMA. By utilizing an iron containing oxide capping layer, thickness of the capping layer can be more finely controlled and reliance on boron at the interface of the magnetic storage layer and the capping layer is reduced.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: May 4, 2021
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Lin Xue, Chi Hong Ching, Xiaodong Wang, Mahendra Pakala, Rongjun Wang
  • Publication number: 20210119119
    Abstract: Embodiments of the disclosure provide methods and apparatus for fabricating magnetic tunnel junction (MTJ) structures on a substrate for MRAM applications. In one embodiment, a magnetic tunnel junction (MTJ) device structure includes a junction structure disposed on a substrate, the junction structure comprising a first ferromagnetic layer and a second ferromagnetic layer sandwiching a tunneling barrier layer, a dielectric capping layer disposed on the junction structure, a metal capping layer disposed on the junction structure, and a top buffer layer disposed on the metal capping layer.
    Type: Application
    Filed: December 4, 2020
    Publication date: April 22, 2021
    Inventors: Lin XUE, Chando PARK, Chi Hong CHING, Jaesoo AHN, Mahendra PAKALA
  • Publication number: 20210111338
    Abstract: A film stack for a magnetic tunnel comprises a substrate, a magnetic reference layer disposed over the substrate, and a tunnel barrier layer disposed over the magnetic reference layer. The film stack further comprises a magnetic storage layer disposed over the tunnel barrier layer, and a capping layer disposed over the magnetic storage layer. Further, the film stack comprises at least one protection layer disposed between the magnetic reference layer and the tunnel barrier layer and disposed between the magnetic storage layer and the capping layer. Additionally, a material forming the at least one protection layer differs from at least one of a material forming the magnetic reference layer and a material forming the magnetic storage layer.
    Type: Application
    Filed: October 14, 2019
    Publication date: April 15, 2021
    Inventors: Lin XUE, Jaesoo Ahn, Sahil Patel, Chando Park, Mahendra Pakala
  • Patent number: 10978947
    Abstract: An apparatus is disclosed for a single-inductor multiple-output (SIMO) power converter with a cross-regulation switch. An example apparatus includes a power source and a SIMO power converter. The SIMO power converter includes an input node coupled to the power source, a first node, a second node, a ground node, and an inductor coupled between the first node and the second node. The single-inductor multiple-output power converter also includes a first switch coupled between the input node and the first node, a second switch coupled between the first node and the ground node, and a cross-regulation switch coupled between the input node and the second node.
    Type: Grant
    Filed: April 15, 2019
    Date of Patent: April 13, 2021
    Assignee: QUALCOMM Incorporated
    Inventors: Sally Amin, Lin Xue, Iulian Mirea, Song Shi
  • Patent number: 10957849
    Abstract: Embodiments of magnetic tunnel junction (MTJ) structures discussed herein employ a first pinning layer and a second pinning layer with a synthetic anti-ferrimagnetic layer disposed therebetween. The first pinning layer in contact with the seed layer can contain a single layer of platinum or palladium, alone or in combination with one or more bilayers of cobalt and platinum (Pt), nickel (Ni), or palladium (Pd), or combinations or alloys thereof, The first pinning layer and the second pinning layer can have a different composition or configuration such that the first pinning layer has a higher magnetic material content than the second pinning layer and/or is thicker than the second pinning layer. The MTJ stacks discussed herein maintain desirable magnetic properties subsequent to high temperature annealing.
    Type: Grant
    Filed: March 19, 2019
    Date of Patent: March 23, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Lin Xue, Chi Hong Ching, Rongjun Wang, Mahendra Pakala
  • Patent number: 10944050
    Abstract: Embodiments of magnetic tunnel junction (MTJ) structures discussed herein employ seed layers of one or more layer of chromium (Cr), NiCr, NiFeCr, RuCr, IrCr, or CoCr, or combinations thereof. These seed layers are used in combination with one or more pinning layers, a first pinning layer in contact with the seed layer can contain a single layer of cobalt, or can contain cobalt in combination with bilayers of cobalt and platinum (Pt), iridium (Ir), nickel (Ni), or palladium (Pd), The second pinning layer can be the same composition and configuration as the first, or can be of a different composition or configuration. The MTJ stacks discussed herein maintain desirable magnetic properties subsequent to high temperature annealing.
    Type: Grant
    Filed: March 13, 2019
    Date of Patent: March 9, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Lin Xue, Chi Hong Ching, Rongjun Wang, Mahendra Pakala
  • Patent number: 10923652
    Abstract: Embodiments of the disclosure provide methods and apparatus for fabricating magnetic tunnel junction (MTJ) structures on a substrate for MRAM applications. In one embodiment, a magnetic tunnel junction (MTJ) device structure includes a junction structure disposed on a substrate, the junction structure comprising a first ferromagnetic layer and a second ferromagnetic layer sandwiching a tunneling barrier layer, a dielectric capping layer disposed on the junction structure, a metal capping layer disposed on the junction structure, and a top buffer layer disposed on the metal capping layer.
    Type: Grant
    Filed: June 21, 2019
    Date of Patent: February 16, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Lin Xue, Chando Park, Chi Hong Ching, Jaesoo Ahn, Mahendra Pakala
  • Patent number: 10924017
    Abstract: Certain aspects of the present disclosure generally relate to methods and apparatus for operating a switched-mode power supply (SMPS). One example method generally includes selecting a first output of a plurality of outputs of the SMPS based on a power demand associated with each of the plurality of outputs if a voltage at the first output is less than a reference voltage associated with the first output, by selecting as the first output one of the plurality of outputs having the highest power demand, and based on an amount of overcharge associated with the first output if the voltage at the first output is greater than the reference voltage, by selecting as the first output one of the plurality of outputs having the lowest amount of overcharge. The method may also include directing current across an inductive element of the SMPS to the first output based on the selection.
    Type: Grant
    Filed: June 13, 2019
    Date of Patent: February 16, 2021
    Assignee: QUALCOMM Incorporated
    Inventors: Linfei Guo, Chengwu Tao, Joseph Duncan, Amir Parayandeh, Xiaocheng Jing, Justin Philpott, Lin Xue
  • Publication number: 20200403152
    Abstract: Embodiments of the disclosure provide methods and apparatus for fabricating magnetic tunnel junction (MTJ) structures on a substrate for MRAM applications. In one embodiment, a magnetic tunnel junction (MTJ) device structure includes a junction structure disposed on a substrate, the junction structure comprising a first ferromagnetic layer and a second ferromagnetic layer sandwiching a tunneling barrier layer, a dielectric capping layer disposed on the junction structure, a metal capping layer disposed on the junction structure, and a top buffer layer disposed on the metal capping layer.
    Type: Application
    Filed: June 21, 2019
    Publication date: December 24, 2020
    Inventors: Lin XUE, Chando PARK, Chi Hong CHING, Jaesoo AHN, Mahendra PAKALA
  • Publication number: 20200395848
    Abstract: Certain aspects of the present disclosure generally relate to methods and apparatus for operating a switched-mode power supply (SMPS). One example method generally includes selecting a first output of a plurality of outputs of the SMPS based on a power demand associated with each of the plurality of outputs if a voltage at the first output is less than a reference voltage associated with the first output, by selecting as the first output one of the plurality of outputs having the highest power demand, and based on an amount of overcharge associated with the first output if the voltage at the first output is greater than the reference voltage, by selecting as the first output one of the plurality of outputs having the lowest amount of overcharge. The method may also include directing current across an inductive element of the SMPS to the first output based on the selection.
    Type: Application
    Filed: June 13, 2019
    Publication date: December 17, 2020
    Inventors: Linfei GUO, Chengwu TAO, Joseph DUNCAN, Amir PARAYANDEH, Xiaocheng JING, Justin PHILPOTT, Lin XUE
  • Patent number: 10819233
    Abstract: A power converter includes a voltage source for generating an input voltage, and a regulation circuit for generating a set of output voltages based on the input voltage. The regulation circuit regulates the set of output voltages in different manners based on whether the set of output voltages is greater or less than a set of corresponding reference voltages, respectively. If one or more output voltages are less than one or more of the corresponding reference voltages, the regulation circuit regulates only those one or more output voltages during a current regulation interval based on an error voltage related to one or more differences between the one or more output voltages and the corresponding one or more reference voltages, respectively. If all output voltages are greater than the corresponding reference voltages, the regulation circuit regulates only the output voltage associated with the largest load current during the current regulation interval.
    Type: Grant
    Filed: January 11, 2019
    Date of Patent: October 27, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Lin Xue, Iulian Mirea, Xiaocheng Jing, Jongshick Ahn, Amir Parayandeh, Linfei Guo
  • Publication number: 20200332404
    Abstract: The invention discloses a centimeter-level high-strength iron-based bulk amorphous alloy and novel copper mold casting method thereof; the molecular formula thereof is Fe44-xCo6Cr15Mo14C15B6Tmx, wherein x represents the atomic percent of corresponding alloy elements and 0?x?6; the novel copper mold casting method comprising: directly cooling a copper mold with cooling water under negative pressure through electric arc melting to obtain an amorphous alloy ingot; the alloy has the remarkable characteristics of high amorphous forming ability, high strength and high hardness, by the conventional casting, the maximum critical diameter can be 10 mm, the highest strength can be 4295 Mpa, and the highest Vickers hardness can be 1220 Hv; meanwhile, the alloy has obvious spinning glass behavior at low temperature; the preparation method has low cooling rate, is free from the limitation of mold diameter, and can directly obtain the amorphous alloy ingot, the cost is reduced, and the maximum diameter of the amorphous all
    Type: Application
    Filed: April 15, 2020
    Publication date: October 22, 2020
    Inventors: Baolong Shen, Zhiqiang Cui, Lin Xue
  • Publication number: 20200328677
    Abstract: An apparatus is disclosed for a single-inductor multiple-output (SIMO) power converter with a cross-regulation switch. An example apparatus includes a power source and a SIMO power converter. The SIMO power converter includes an input node coupled to the power source, a first node, a second node, a ground node, and an inductor coupled between the first node and the second node. The single-inductor multiple-output power converter also includes a first switch coupled between the input node and the first node, a second switch coupled between the first node and the ground node, and a cross-regulation switch coupled between the input node and the second node.
    Type: Application
    Filed: April 15, 2019
    Publication date: October 15, 2020
    Inventors: Sally Amin, Lin Xue, Iulian Mirea, Song Shi
  • Patent number: 10756259
    Abstract: The bottom-pinned spin-orbit torque (SOT) MRAM devices are fabricated to form high quality interfaces between layers including the spin-orbit torque (SOT) layer and the free layer of the magnetic tunnel junction (MTJ) by forming those layers under vacuum, without breaking vacuum in between formation of the layers. An encapsulation layer is used as an etch stop and to protect the free layer. The encapsulation layer is etched back prior to the deposition of a metal layer. The metal layer forms a plurality of metal lines that are electrically connected to two or more sides of the SOT layer and are electrically coupled to the SOT layer to transfer current through the SOT layer. The metal lines are not in contact with a top surface of the SOT layer which has a dielectric layer disposed thereon.
    Type: Grant
    Filed: March 1, 2019
    Date of Patent: August 25, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Jaesoo Ahn, Chando Park, Hsin-wei Tseng, Lin Xue, Mahendra Pakala
  • Publication number: 20200259078
    Abstract: Embodiments of the disclosure provide methods for forming MTJ structures from a film stack disposed on a substrate for MRAM applications and associated MTJ devices. The methods described herein include forming the film properties of material layers from the film stack to create a film stack with a sufficiently high perpendicular magnetic anisotropy (PMA). An iron containing oxide capping layer is utilized to generate the desirable PMA. By utilizing an iron containing oxide capping layer, thickness of the capping layer can be more finely controlled and reliance on boron at the interface of the magnetic storage layer and the capping layer is reduced.
    Type: Application
    Filed: April 27, 2020
    Publication date: August 13, 2020
    Inventors: Lin XUE, Chi Hong CHING, Xiaodong WANG, Mahendra PAKALA, Rongjun WANG
  • Publication number: 20200203600
    Abstract: A process sequence is provided to provide an ultra-smooth (0.2 nm or less) bottom electrode surface for depositing magnetic tunnel junctions thereon. In one embodiment, the sequence includes forming a bottom electrode pad through bulk layer deposition followed by patterning and etching. Oxide is then deposited over the formed bottom electrode pads and polished back to expose the bottom electrode pads. A bottom electrode buff layer is then deposited thereover following a pre-clean operation. The bottom electrode buff layer is then exposed to a chemical mechanical polishing process to improve surface roughness. An magnetic tunnel junction deposition is then performed over the bottom electrode buff layer.
    Type: Application
    Filed: March 5, 2020
    Publication date: June 25, 2020
    Inventors: Lin XUE, Sajjad Amin HASSAN, Mahendra PAKALA, Jaesoo AHN
  • Publication number: 20200161541
    Abstract: Embodiments of the disclosure provide methods and apparatus for fabricating magnetic tunnel junction (MTJ) structures on a substrate in for hybrid (or called integrated) spin-orbit-torque magnetic spin-transfer-torque magnetic random access memory (SOT-STT MRAM) applications. In one embodiment, the method includes one or more magnetic tunnel junction structures disposed on a substrate, the magnetic tunnel junction structure comprising a first ferromagnetic layer and a second ferromagnetic layer sandwiching a tunneling barrier layer, a spin orbit torque (SOT) layer disposed on the magnetic tunnel junction structure, and a back end structure disposed on the spin orbit torque (SOT) layer.
    Type: Application
    Filed: November 19, 2018
    Publication date: May 21, 2020
    Inventors: Hsin-wei TSENG, Chando PARK, Jaesoo AHN, Lin XUE, Mahendra PAKALA