Abstract: Embodiments herein provide film stacks that include a buffer layer; a synthetic ferrimagnet (SyF) coupling layer; and a capping layer, wherein the capping layer comprises one or more layers, and wherein the capping layer, the buffer layer, the SyF coupling layer, or a combination thereof, is not fabricated from Ru.

Abstract: The bottom-pinned spin-orbit torque (SOT) MRAM devices are fabricated to form high quality interfaces between layers including the spin-orbit torque (SOT) layer and the free layer of the magnetic tunnel junction (MTJ) by forming those layers under vacuum, without breaking vacuum in between formation of the layers. An encapsulation layer is used as an etch stop and to protect the free layer. The encapsulation layer is etched back prior to the deposition of a metal layer. The metal layer forms a plurality of metal lines that are electrically connected to two or more sides of the SOT layer and are electrically coupled to the SOT layer to transfer current through the SOT layer. The metal lines are not in contact with a top surface of the SOT layer which has a dielectric layer disposed thereon.

Abstract: Embodiments of the disclosure provide methods for forming MTJ structures from a film stack disposed on a substrate for MRAM applications and associated MTJ devices. The methods described herein include forming the film properties of material layers from the film stack to create a film stack with a sufficiently high perpendicular magnetic anisotropy (PMA). An iron containing oxide capping layer is utilized to generate the desirable PMA. By utilizing an iron containing oxide capping layer, thickness of the capping layer can be more finely controlled and reliance on boron at the interface of the magnetic storage layer and the capping layer is reduced.

Abstract: Embodiments herein provide methods of forming a magnetic tunnel junction structure. The method includes forming a film stack that includes: a buffer layer; a seed layer disposed over the buffer layer; a first pinning layer disposed over the seed layer; a synthetic ferrimagnet (SyF) coupling layer disposed over the first pinning layer; a second pinning layer disposed over the SyF coupling layer; a structure blocking layer disposed over the second pinning layer; a magnetic reference layer disposed over the structure blocking layer; a tunnel barrier layer disposed over the magnetic reference layer; a magnetic storage layer disposed over the tunnel barrier layer; a capping layer disposed over the magnetic storage layer; and a hard mask disposed over the capping layer, wherein at least one of the capping layer, the buffer layer, and the SyF coupling layer is not fabricated from Ru; and forming a magnetic tunnel junction structure.

Abstract: Embodiments of the disclosure relate to methods for fabricating structures used in memory devices. More specifically, embodiments of the disclosure relate to methods for fabricating MTJ structures in memory devices. In one embodiment, the method includes forming a MTJ structure, depositing a encapsulating layer on a top and sides of the MTJ structure, depositing a dielectric material on the encapsulating layer, removing the dielectric material and the encapsulating layer disposed on the top of the MTJ structure by a chemical mechanical planarization (CMP) process to expose the top of the MTJ structure, and depositing a contact layer on the MTJ structure. The method utilizes a CMP process to expose the top of the MTJ structure instead of an etching process, which avoids damaging the MTJ structure and leads to improved electrical contact between the MTJ structure and the contact layer.

Abstract: A process sequence is provided to provide an ultra-smooth (0.2 nm or less) bottom electrode surface for depositing magnetic tunnel junctions thereon. In one embodiment, the sequence includes forming a bottom electrode pad through bulk layer deposition followed by patterning and etching. Oxide is then deposited over the formed bottom electrode pads and polished back to expose the bottom electrode pads. A bottom electrode buff layer is then deposited thereover following a pre-clean operation. The bottom electrode buff layer is then exposed to a CMP process to improve surface roughness. An MTJ deposition is then performed over the bottom electrode buff layer.

Abstract: A power converter includes a voltage source for generating an input voltage, and a regulation circuit for generating a set of output voltages based on the input voltage. The regulation circuit regulates the set of output voltages in different manners based on whether the set of output voltages is greater or less than a set of corresponding reference voltages, respectively. If one or more output voltages are less than one or more of the corresponding reference voltages, the regulation circuit regulates only those one or more output voltages during a current regulation interval based on an error voltage related to one or more differences between the one or more output voltages and the corresponding one or more reference voltages, respectively. If all output voltages are greater than the corresponding reference voltages, the regulation circuit regulates only the output voltage associated with the largest load current during the current regulation interval.

Abstract: Embodiments of the disclosure provide methods and apparatus for fabricating magnetic tunnel junction (MTJ) structures on a substrate for MRAM applications, particularly for spin-orbit-torque magnetic random access memory (SOT MRAM) applications. In one embodiment, a magnetic tunnel junction (MTJ) device structure includes a magnetic tunnel junction (MTJ) pillar structure disposed on a substrate, and a gap surrounding the MTJ pillar structure. In yet another embodiment, a magnetic tunnel junction (MTJ) device structure includes a spacer layer surrounding a patterned reference layer and a tunneling barrier layer disposed on a patterned free layer, and a gap surrounding the patterned free layer.

Abstract: Embodiments of magnetic tunnel junction (MTJ) structures discussed herein employ a first pinning layer and a second pinning layer with a synthetic anti-ferrimagnetic layer disposed therebetween. The first pinning layer in contact with the seed layer can contain a single layer of platinum or palladium, alone or in combination with one or more bilayers of cobalt and platinum (Pt), nickel (Ni), or palladium (Pd), or combinations or alloys thereof, The first pinning layer and the second pinning layer can have a different composition or configuration such that the first pinning layer has a higher magnetic material content than the second pinning layer and/or is thicker than the second pinning layer. The MTJ stacks discussed herein maintain desirable magnetic properties subsequent to high temperature annealing.

Abstract: Embodiments of magnetic tunnel junction (MTJ) structures discussed herein employ seed layers of one or more layer of chromium (Cr), NiCr, NiFeCr, RuCr, IrCr, or CoCr, or combinations thereof. These seed layers are used in combination with one or more pinning layers, a first pinning layer in contact with the seed layer can contain a single layer of cobalt, or can contain cobalt in combination with bilayers of cobalt and platinum (Pt), iridium (Ir), nickel (Ni), or palladium (Pd), The second pinning layer can be the same composition and configuration as the first, or can be of a different composition or configuration. The MTJ stacks discussed herein maintain desirable magnetic properties subsequent to high temperature annealing.

Abstract: Embodiments described herein relate to substrate processing methods. More specifically, embodiments of the disclosure provide for an MRAM back end of the line integration process which utilizes a zero mark for improved patterning alignment. In one embodiment, the method includes fabricating a substrate having at least a bottom contact and a via extending from the bottom contact in a first region and etching a zero mark in the substrate in a second region apart from the first region. The method also includes depositing a touch layer over the substrate in the first region and the second region, depositing a memory stack over the touch layer in the first region and the second region, and depositing a hardmask over the memory stack layer in the first region and the second region.

Abstract: Embodiments of the present disclosure are for systems and methods for fabrication of a magnetic tunnel junction stack. This fabrication can occur via methods including one or more of (1) heating the substrate after the deposition of a buffer layer on the substrate, prior to deposition of a seed layer; (2) cooling the substrate after the deposition of a second pinning layer, before deposition of a structure blocking layer; (3) heating the substrate during the deposition of a tunnel barrier layer and then cooling it after the deposition of the tunnel barrier layer is complete; (4) heating the substrate after the deposition of a magnetic storage layer on the tunnel barrier layer; and (5) cooling the substrate after the deposition of the magnetic storage layer before a first interlayer of the capping layer is deposited.

Abstract: Embodiments of the disclosure provide methods for forming MTJ structures from a film stack disposed on a substrate for MRAM applications and associated MTJ devices. The methods described herein include forming the film properties of material layers from the film stack to create a film stack with a sufficiently high perpendicular magnetic anisotropy (PMA). An iron containing oxide capping layer is utilized to generate the desirable PMA. By utilizing an iron containing oxide capping layer, thickness of the capping layer can be more finely controlled and reliance on boron at the interface of the magnetic storage layer and the capping layer is reduced.

Abstract: Embodiments herein provide methods of forming a magnetic tunnel junction structure. The method includes forming a film stack that includes: a buffer layer; a seed layer disposed over the buffer layer; a first pinning layer disposed over the seed layer; a synthetic ferrimagnet (SyF) coupling layer disposed over the first pinning layer; a second pinning layer disposed over the SyF coupling layer; a structure blocking layer disposed over the second pinning layer; a magnetic reference layer disposed over the structure blocking layer; a tunnel barrier layer disposed over the magnetic reference layer; a magnetic storage layer disposed over the tunnel barrier layer; a capping layer disposed over the magnetic storage layer; and a hard mask disposed over the capping layer, wherein at least one of the capping layer, the buffer layer, and the SyF coupling layer is not fabricated from Ru; and forming a magnetic tunnel junction structure.

Abstract: Embodiments herein provide film stacks utilized to form a magnetic tunnel junction (MTJ) structure on a substrate, comprising: a buffer layer; a seed layer disposed over the buffer layer; a first pinning layer disposed over the seed layer; a synthetic ferrimagnet (SyF) coupling layer disposed over the first pinning layer; a second pinning layer disposed over the SyF coupling layer; a structure blocking layer disposed over the second pinning layer; a magnetic reference layer disposed over the structure blocking layer; a tunnel barrier layer disposed over the magnetic reference layer; a magnetic storage layer disposed over the tunnel barrier layer; a capping layer disposed over the magnetic storage layer, wherein the capping layer comprises one or more layers; and a hard mask disposed over the capping layer, wherein at least one of the capping layer, the buffer layer, and the SyF coupling layer is not fabricated from Ru.

Abstract: Embodiments herein provide film stacks utilized to form a magnetic tunnel junction (MTJ) structure on a substrate, comprising: a buffer layer; a seed layer disposed over the buffer layer; a first pinning layer disposed over the seed layer; a synthetic ferrimagnet (SyF) coupling layer disposed over the first pinning layer; a second pinning layer disposed over the SyF coupling layer; a structure blocking layer disposed over the second pinning layer; a magnetic reference layer disposed over the structure blocking layer; a tunnel barrier layer disposed over the magnetic reference layer; a magnetic storage layer disposed over the tunnel barrier layer; a capping layer disposed over the magnetic storage layer, wherein the capping layer comprises one or more layers; and a hard mask disposed over the capping layer, wherein at least one of the capping layer, the buffer layer, and the SyF coupling layer is not fabricated from Ru.

Abstract: A method and a system for a mobile robot to self-establish a map indoors are provided, and the method comprises: forming an initialized map (101); marking a coordinate origin in the initialized map (102); causing the robot to travel throughout indoor accessible regions to record path information and environment information (103); causing the robot to calculate and mark a CV value of each grid in the map (104); and establishing the map according to the path information and the CV value (105), the path information and the CV value being obtained through calculation by using a mathematic algorithm. By adopting a grid map to perform modeling, real-time adjustment and correspondence of an indoor environment and grid information are realized and effectiveness of a map model is ensured; further, the grid map is easy to be maintained and is convenient for quick access of map data.

Abstract: A process sequence is provided to provide an ultra-smooth (0.2 nm or less) bottom electrode surface for depositing magnetic tunnel junctions thereon. In one embodiment, the sequence includes forming a bottom electrode pad through bulk layer deposition followed by patterning and etching. Oxide is then deposited over the formed bottom electrode pads and polished back to expose the bottom electrode pads. A bottom electrode buff layer is then deposited thereover following a pre-clean operation. The bottom electrode buff layer is then exposed to a CMP process to improve surface roughness. An MTJ deposition is then performed over the bottom electrode buff layer.

Abstract: Embodiments of the disclosure provide methods and apparatus for fabricating magnetic tunnel junction (MTJ) structures on a substrate in for spin-transfer-torque magnetoresistive random access memory (STT-MRAM) applications. In one example, a film stack utilized to form a magnetic tunnel junction structure on a substrate includes a pinned layer disposed on a substrate, wherein the pinned layer comprises multiple layers including at least one or more of a Co containing layer, Pt containing layer, Ta containing layer, an Ru containing layer, an optional structure decoupling layer disposed on the pinned magnetic layer, a magnetic reference layer disposed on the optional structure decoupling layer, a tunneling barrier layer disposed on the magnetic reference layer, a magnetic storage layer disposed on the tunneling barrier layer, and a capping layer disposed on the magnetic storage layer.

Abstract: A method for fabricating an MRAM bit that includes depositing a spacer layer that protects the tunneling barrier layer during processing is disclosed. The deposited spacer layer prevents byproducts formed in later processing from redepositing on the tunneling barrier layer. Such redeposition may lead to product failure and decreased manufacturing yield. The method further includes non-corrosive processing conditions that prevent damage to the layers of MRAM bits. The non-corrosive processing conditions may include etching without using a halogen-based plasma. Embodiments disclosed herein use an etch-deposition-etch sequence that simplifies processing.