Patents by Inventor Linda T. Romano

Linda T. Romano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7829351
    Abstract: Methods and systems for depositing nanomaterials onto a receiving substrate and optionally for depositing those materials in a desired orientation, that comprise providing nanomaterials on a transfer substrate and contacting the nanomaterials with an adherent material disposed upon a surface or portions of a surface of a receiving substrate. Orientation is optionally provided by moving the transfer and receiving substrates relative to each other during the transfer process.
    Type: Grant
    Filed: August 21, 2006
    Date of Patent: November 9, 2010
    Assignee: Nanosys, Inc.
    Inventors: Robert S. Dubrow, Linda T. Romano, David P. Stumbo
  • Publication number: 20100264454
    Abstract: In accordance with embodiments of the invention, at least partial strain relief in a light emitting layer of a III-nitride light emitting device is provided by configuring the surface on which at least one layer of the device grows such that the layer expands laterally and thus at least partially relaxes. This layer is referred to as the strain-relieved layer. In some embodiments, the light emitting layer itself is the strain-relieved layer, meaning that the light emitting layer is grown on a surface that allows the light emitting layer to expand laterally to relieve strain. In some embodiments, a layer grown before the light emitting layer is the strain-relieved layer. In a first group of embodiments, the strain-relieved layer is grown on a textured surface.
    Type: Application
    Filed: July 6, 2010
    Publication date: October 21, 2010
    Applicants: KONINKLIJKE PHILIPS ELECTRONICS N.V., PHILIPS LUMILEDS LIGHTING COMPANY, LLC
    Inventors: Sungsoo YI, Nathan F. GARDNER, Michael R. KRAMES, Linda T. ROMANO
  • Patent number: 7795125
    Abstract: The present invention relates to a system and process for producing a nanowire-material composite. A substrate having nanowires attached to a portion of at least one surface is provided. A material is deposited over the portion to form the nanowire-material composite. The process further optionally includes separating the nanowire-material composite from the substrate to form a freestanding nanowire-material composite. The freestanding nanowire material composite is optionally further processed into a electronic substrate. A variety of electronic substrates can be produced using the methods described herein. For example, a multi-color light-emitting diode can be produced from multiple, stacked layers of nanowire-material composites, each composite layer emitting light at a different wavelength.
    Type: Grant
    Filed: November 20, 2008
    Date of Patent: September 14, 2010
    Assignee: Nanosys, Inc.
    Inventors: Mihai A. Buretea, Jian Chen, Calvin Y. H. Chow, Chunming Niu, Yaoling Pan, J. Wallace Parce, Linda T. Romano, David P. Stumbo
  • Patent number: 7754524
    Abstract: Methods and systems for depositing nanomaterials onto a receiving substrate and optionally for depositing those materials in a desired orientation, that comprise providing nanomaterials on a transfer substrate and contacting the nanomaterials with an adherent material disposed upon a surface or portions of a surface of a receiving substrate. Orientation is optionally provided by moving the transfer and receiving substrates relative to each other during the transfer process.
    Type: Grant
    Filed: September 14, 2005
    Date of Patent: July 13, 2010
    Assignee: Nanosys, Inc.
    Inventors: Robert S. Dubrow, Linda T. Romano, David P. Stumbo
  • Publication number: 20100167512
    Abstract: Methods of doping nanostructures, such as nanowires, are disclosed. The methods provide a variety of approaches for improving existing methods of doping nanostructures. The embodiments include the use of a sacrificial layer to promote uniform dopant distribution within a nanostructure during post-nanostructure synthesis doping. In another embodiment, a high temperature environment is used to anneal nanostructure damage when high energy ion implantation is used. In another embodiment rapid thermal annealing is used to drive dopants from a dopant layer on a nanostructure into the nanostructure. In another embodiment a method for doping nanowires on a plastic substrate is provided that includes depositing a dielectric stack on a plastic substrate to protect the plastic substrate from damage during the doping process.
    Type: Application
    Filed: March 9, 2010
    Publication date: July 1, 2010
    Applicant: NANOSYS, INC.
    Inventors: Yaoling Pan, Jian Chen, Francisco Leon, Shahriar Mostarshed, Linda T. Romano, Vijendra Sahi, David P. Stumbo
  • Publication number: 20100155696
    Abstract: A method and apparatus for an electronic substrate having a plurality of semiconductor devices is described. A thin film of nanowires is formed on a substrate. The thin film of nanowires is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions are defined in the thin film of nanowires. Contacts are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.
    Type: Application
    Filed: March 1, 2007
    Publication date: June 24, 2010
    Applicant: NANOSYS, INC.
    Inventors: Xiangfeng Duan, Chunming Niu, Stephen Empedocles, Linda T. Romano, Jian Chen, Vijendra Sahi, Lawrence Bock, David Stumbo, J. Wallace Parce, Jay L. Goldman
  • Publication number: 20100144103
    Abstract: Methods, systems, and apparatuses for electronic devices having improved gate structures are described. An electronic device includes at least one nanowire. A gate contact is positioned along at least a portion of a length of the at least one nanowire. A dielectric material layer is between the gate contact and the at least one nanowire. A source contact and a drain contact are in contact with the at least one nanowire. At least a portion of the source contact and/or the drain contact overlaps with the gate contact along the nanowire the length. In another aspect, an electronic device includes a nanowire having a semiconductor core surrounded by an insulating shell layer. A ring shaped first gate region surrounds the nanowire along a portion of the length of the nanowire. A second gate region is positioned along the length of the nanowire between the nanowire and the substrate.
    Type: Application
    Filed: February 9, 2010
    Publication date: June 10, 2010
    Applicant: NANOSYS, INC.
    Inventors: Shahriar Mostarshed, Jian Chen, Francisco Leon, Yaoling Pan, Linda T. Romano
  • Patent number: 7701014
    Abstract: Methods, systems, and apparatuses for electronic devices having improved gate structures are described. An electronic device includes at least one nanowire. A gate contact is positioned along at least a portion of a length of the at least one nanowire. A dielectric material layer is between the gate contact and the at least one nanowire. A source contact and a drain contact are in contact with the at least one nanowire. At least a portion of the source contact and/or the drain contact overlaps with the gate contact along the nanowire the length. In another aspect, an electronic device includes a nanowire having a semiconductor core surrounded by an insulating shell layer. A ring shaped first gate region surrounds the nanowire along a portion of the length of the nanowire. A second gate region is positioned along the length of the nanowire between the nanowire and the substrate.
    Type: Grant
    Filed: October 2, 2008
    Date of Patent: April 20, 2010
    Assignee: Nanosys, Inc.
    Inventors: Shahriar Mostarshed, Jian Chen, Francisco Leon, Yaoling Pan, Linda T. Romano
  • Publication number: 20100075468
    Abstract: Methods and systems for depositing nanomaterials onto a receiving substrate and optionally for depositing those materials in a desired orientation, that comprise providing nanomaterials on a transfer substrate and contacting the nanomaterials with an adherent material disposed upon a surface or portions of a surface of a receiving substrate. Orientation is optionally provided by moving the transfer and receiving substrates relative to each other during the transfer process.
    Type: Application
    Filed: August 21, 2006
    Publication date: March 25, 2010
    Applicant: Nanosys, Inc.
    Inventors: Robert Dubrow, Linda T. Romano, David Stumbo
  • Patent number: 7666791
    Abstract: The present invention is directed to systems and methods for nanowire growth and harvesting. In an embodiment, methods for nanowire growth and doping are provided, including methods for epitaxial oriented nanowire growth using a combination of silicon precursors. In a further aspect of the invention, methods to improve nanowire quality through the use of sacrificial growth layers are provided. In another aspect of the invention, methods for transferring nanowires from one substrate to another substrate are provided.
    Type: Grant
    Filed: August 15, 2007
    Date of Patent: February 23, 2010
    Assignee: Nanosys, Inc.
    Inventors: Shahriar Mostarshed, Linda T. Romano
  • Patent number: 7663148
    Abstract: In accordance with embodiments of the invention, strain is reduced in the light emitting layer of a III-nitride device by including a strain-relieved layer in the device. The surface on which the strain-relieved layer is grown is configured such that strain-relieved layer can expand laterally and at least partially relax. In some embodiments of the invention, the strain-relieved layer is grown over a textured semiconductor layer or a mask layer. In some embodiments of the invention, the strain-relieved layer is group of posts of semiconductor material.
    Type: Grant
    Filed: December 22, 2006
    Date of Patent: February 16, 2010
    Assignee: Philips Lumileds Lighting Company, LLC
    Inventors: Sungsoo Yi, Aurelien J. F. David, Nathan F. Gardner, Michael R. Krames, Linda T. Romano
  • Patent number: 7651944
    Abstract: Methods of positioning and orienting nanostructures, and particularly nanowires, on surfaces for subsequent use or integration. The methods utilize mask based processes alone or in combination with flow based alignment of the nanostructures to provide oriented and positioned nanostructures on surfaces. Also provided are populations of positioned and/or oriented nanostructures, devices that include populations of positioned and/or oriented nanostructures, systems for positioning and/or orienting nanostructures, and related devices, systems and methods.
    Type: Grant
    Filed: August 5, 2008
    Date of Patent: January 26, 2010
    Assignee: Nanosys, Inc.
    Inventors: Xiangfeng Duan, R. Hugh Daniels, Chunming Niu, Vijendra Sahi, James M. Hamilton, Linda T. Romano
  • Patent number: 7560366
    Abstract: The present invention provides processes for producing horizontal nanowires that are separate and oriented and allow for processing directly on a substrate material. The nanowires grow horizontally by suppressing vertical growth from a nucleating particle, such as a metal film. The present invention also provides for horizontal nanowire growth from nucleating particles on the edges of nanometer-sized steps. Following processing, the nanowires can be removed from the substrate and transferred to other substrates. The present invention also provides for nanowires produced by these processes and electronic devices comprising these nanowires. The present invention also provides for nanowire growth apparatus that provide horizontal nanowires, and processes for producing nanowire devices.
    Type: Grant
    Filed: December 1, 2005
    Date of Patent: July 14, 2009
    Assignee: Nanosys, Inc.
    Inventors: Linda T. Romano, Shahriar Mostarshed
  • Patent number: 7547908
    Abstract: In a III-nitride light emitting device, the device layers including the light emitting layer are grown over a template designed to reduce strain in the device, in particular in the light emitting layer. Reducing the strain in the light emitting device may improve the performance of the device. The template may expand the lattice constant in the light emitting layer over the range of lattice constants available from conventional growth templates. Strain is defined as follows: a given layer has a bulk lattice constant abulk corresponding to a lattice constant of a free standing material of a same composition as that layer and an in-plane lattice constant ain-plane corresponding to a lattice constant of that layer as grown in the structure. The amount of strain in a layer is |(ain-plane?abulk)|/abulk. In some embodiments, the strain in the light emitting layer is less than 1%.
    Type: Grant
    Filed: December 22, 2006
    Date of Patent: June 16, 2009
    Assignee: Philips Lumilieds Lighting Co, LLC
    Inventors: Patrick N. Grillot, Nathan F. Gardner, Werner K. Goetz, Linda T. Romano
  • Patent number: 7534638
    Abstract: In a III-nitride light emitting device, the device layers including the light emitting layer are grown over a template designed to reduce strain in the device, in particular in the light emitting layer. Reducing the strain in the light emitting device may improve the performance of the device. The template may expand the lattice constant in the light emitting layer over the range of lattice constants available from conventional growth templates. Strain is defined as follows: a given layer has a bulk lattice constant abulk corresponding to a lattice constant of a free standing material of a same composition as that layer and an in-plane lattice constant ain-plane corresponding to a lattice constant of that layer as grown in the structure. The amount of strain in a layer is |(ain-plane?abulk)|/abulk. In some embodiments, the strain in the light emitting layer is less than 1%.
    Type: Grant
    Filed: December 22, 2006
    Date of Patent: May 19, 2009
    Assignee: Philips Lumiled Lighting Co., LLC
    Inventors: Patrick N. Grillot, Nathan F. Gardner, Werner K. Goetz, Linda T. Romano
  • Publication number: 20090075468
    Abstract: The present invention relates to a system and process for producing a nanowire-material composite. A substrate having nanowires attached to a portion of at least one surface is provided. A material is deposited over the portion to form the nanowire-material composite. The process further optionally includes separating the nanowire-material composite from the substrate to form a freestanding nanowire-material composite. The freestanding nanowire material composite is optionally further processed into a electronic substrate. A variety of electronic substrates can be produced using the methods described herein. For example, a multi-color light-emitting diode can be produced from multiple, stacked layers of nanowire-material composites, each composite layer emitting light at a different wavelength.
    Type: Application
    Filed: November 20, 2008
    Publication date: March 19, 2009
    Applicant: NANOSYS, INC.
    Inventors: Mihai Buretea, Jian Chen, Calvin Chow, Chunming Niu, Yaoling Pan, J. Wallace Parce, Linda T. Romano, David Stumbo
  • Publication number: 20090050974
    Abstract: Methods, systems, and apparatuses for electronic devices having improved gate structures are described. An electronic device includes at least one nanowire. A gate contact is positioned along at least a portion of a length of the at least one nanowire. A dielectric material layer is between the gate contact and the at least one nanowire. A source contact and a drain contact are in contact with the at least one nanowire. At least a portion of the source contact and/or the drain contact overlaps with the gate contact along the nanowire the length. In another aspect, an electronic device includes a nanowire having a semiconductor core surrounded by an insulating shell layer. A ring shaped first gate region surrounds the nanowire along a portion of the length of the nanowire. A second gate region is positioned along the length of the nanowire between the nanowire and the substrate.
    Type: Application
    Filed: October 2, 2008
    Publication date: February 26, 2009
    Applicant: NANOSYS, INC.
    Inventors: Shahriar Mostarshed, Jian Chen, Francisco Leon, Yaoling Pan, Linda T. Romano
  • Publication number: 20090032828
    Abstract: A semiconductor light emitting device includes a wurtzite III-nitride semiconductor structure including a light emitting layer disposed between an n-type region and a p-type region. A template layer and a dislocation bending layer are grown before the light emitting layer. The template layer is grown such that at least 70% of the dislocations in the template layer are edge dislocations. At least some of the edge dislocations in the template layer continue into the dislocation bending layer. The dislocation bending layer is grown to have a different magnitude of strain than the template layer. The change in strain at the interface between the template layer and the dislocation bending layer causes at least some of the edge dislocations in the template layer to bend to a different orientation in the dislocation bending layer. Semiconductor material grown above the bent edge dislocations may exhibit reduced strain.
    Type: Application
    Filed: August 3, 2007
    Publication date: February 5, 2009
    Applicant: PHILIPS LUMILEDS LIGHTING COMPANY, LLC
    Inventors: Linda T. Romano, Patrick N. Grillot
  • Patent number: 7473943
    Abstract: Methods, systems, and apparatuses for electronic devices having improved gate structures are described. An electronic device includes at least one nanowire. A gate contact is positioned along at least a portion of a length of the at least one nanowire. A dielectric material layer is between the gate contact and the at least one nanowire. A source contact and a drain contact are in contact with the at least one nanowire. At least a portion of the source contact and/or the drain contact overlaps with the gate contact along the nanowire the length. In another aspect, an electronic device includes a nanowire having a semiconductor core surrounded by an insulating shell layer. A ring shaped first gate region surrounds the nanowire along a portion of the length of the nanowire. A second gate region is positioned along the length of the nanowire between the nanowire and the substrate.
    Type: Grant
    Filed: September 22, 2005
    Date of Patent: January 6, 2009
    Assignee: Nanosys, Inc.
    Inventors: Shahriar Mostarshed, Jian Chen, Francisco Leon, Yaoling Pan, Linda T. Romano
  • Patent number: 7468315
    Abstract: The present invention relates to a system and process for producing a nanowire-material composite. A substrate having nanowires attached to a portion of at least one surface is provided. A material is deposited over the portion to form the nanowire-material composite. The process further optionally includes separating the nanowire-material composite from the substrate to form a freestanding nanowire-material composite. The freestanding nanowire material composite is optionally further processed into an electronic substrate. A variety of electronic substrates can be produced using the methods described herein. For example, a multi-color light-emitting diode can be produced from multiple, stacked layers of nanowire-material composites, each composite layer emitting light at a different wavelength.
    Type: Grant
    Filed: September 14, 2005
    Date of Patent: December 23, 2008
    Assignee: Nanosys, Inc.
    Inventors: Mihai A. Buretea, Jian Chen, Calvin Y. H. Chow, Chunming Niu, Yaoling Pan, J. Wallace Parce, Linda T. Romano, David P. Stumbo