Abstract: Techniques and apparatuses described herein enable a user equipment (UE) to adjust a measurement period indicated by a measurement schedule for neighbor cell measurement. For example, the UE may receive the measurement schedule. The measurement schedule may indicate a baseline measurement period. The UE may determine a measurement period (referred to as a determined measurement period) based at least in part on a received power value (such as an Srxlev) associated with the serving cell and a received power value for one or more neighbor cells.

Abstract: Disclosed is a light-emitting diode which includes a light-emitting epitaxial layered unit, an insulation layer, a transparent conductive layer, a protective layer, a first electrode, and a second electrode. The light-emitting epitaxial layered unit includes a first semiconductor layer, a second semiconductor layer, and a light-emitting layer sandwiched between the first and second semiconductor layers, and has a first electrode region which includes a pad area and an extension area. The insulation layer is disposed on the first semiconductor layer and at the extension area of the first electrode region. Also disclosed is a method for manufacturing the light-emitting diode.

Abstract: This disclosure provides an array substrate, a fabrication method thereof, and a display device. The array substrate includes a P-type driving transistor, an N-type first transistor, a capacitor, a base substrate, a first conductive layer laminated at a side of the base substrate, a first dielectric layer laminated at a side of the first conductive layer away from the base substrate, a first buffer layer laminated at a side of the first dielectric layer facing away from the base substrate and having a slot, and a second conductive layer laminated at a side of the first buffer layer facing away from the base substrate. The second conductive layer includes a second conductive portion configured as the gate electrode of the first transistor, and a third conductive portion located at the bottom of the slot to form the second electrode of the capacitor.

Abstract: A power stage circuit generates an output signal according to an input signal and a control signal. A ramp generator circuit generates a ramp signal according to the control signal, the input signal, and the output signal. A calculation circuit generates a calculation signal according to the output signal and a reference signal. The calculation circuit operates in a first mode when the power converter operates in a light loading state, and the calculation circuit operates in a second mode when the power converter operates in a normal state. A control circuit generates the control signal according to the calculation signal and the ramp signal. The control circuit includes a comparator circuit and a control signal generator. The comparator circuit generates a comparison signal according to the calculation signal and the ramp signal. The control signal generator generates the control signal according to the comparison signal.

Abstract: A memory device and method of making the same are disclosed. The memory device includes transistor devices located in both a memory region and a logic region of the device. Transistor devices in the memory region include sidewall spacers having a first oxide layer over a side surface of a gate structure, a first nitride layer over the first oxide layer, a second oxide layer over the first nitride layer, and a second nitride layer over the second oxide layer. Transistor devices in the logic region include sidewall spacers having a first oxide layer over a side surface of a gate structure, a first nitride layer over the first oxide layer, and a second nitride layer over the first nitride layer.

Abstract: A display substrate, a manufacturing method therefor, and a display apparatus are provided. The display substrate includes a first semiconductor layer, a first conductive layer, a second conductive layer, a second semiconductor layer, a third conductive layer, a fourth conductive layer, and a fifth conductive layer disposed on an substrate. The first semiconductor layer includes active layers of a plurality of poly silicon transistors, the first conductive layer includes gates of a plurality of poly silicon transistors, a first electrode plate of a storage capacitor and a first scan signal line. The second conductive layer includes a second electrode plate of the storage capacitor. The second semiconductor layer includes active layers of a plurality of oxide transistors. The third conductive layer includes gates of the plurality of oxide transistors.

Abstract: Disclosed herein are methods for treating cancers in a subject. The method includes determining the plasma level of arginine in the subject, followed by administering to the subject an arginine deprivation therapy alone or in combination with an anti-cancer agent based on the determined plasma level of arginine. According to some embodiments of the present disclosure, the anti-cancer agent is selected from the group consisting of FOLFOX, docetaxel, cisplatin, pemetrexed, pembrolizumab, and a combination thereof.

Abstract: A pulp molded cup lid includes a lid top portion, a transverse extension portion and a longitudinal extension portion. The transverse extension portion is connected to a lower side of an outer edge of the lid top portion and extends radially outward. The longitudinal extension portion is connected to an outer edge of the transverse extension portion and extends axially downward. The longitudinal extension portion is cylindrical. The pulp molded cup lid further includes an inner convex buckle disposed on an inner wall of the longitudinal extension portion. The inner convex buckle is integrally formed with the longitudinal extension portion. The inner convex buckle protrudes inward relative to the inner wall of the longitudinal extension portion. An outer wall of the longitudinal extension portion defines a rolling groove. The rolling groove is configured to further reduce an inner diameter of the inner convex buckle.

Abstract: An augmented reality implementing method applied to a server, which includes a plurality of augmented reality objects and a plurality of setting records corresponding to the augmented reality objects respectively is provided. Firstly, the server receives an augmented reality request from a mobile device, where the augmented reality request is related to a target device. Then, the server is communicated with the target device to access current information. Then, the server determines the current information corresponds to which one of the setting records, and selects one of the augmented reality objects based on the determined setting record as a virtual object provided to the mobile device.

Abstract: An electronic device housing, an electronic device and a compound body are provided. The electronic device housing comprises a frame; a sealing layer, disposed on at least a part of an outer surface of the frame, and including a plurality of sub-sealing layers laminated in sequence; and a back case, attached to the frame by the sealing layer, wherein two adjacent sub-sealing layers have different compositions.

Abstract: Embodiments relate to methods, systems, and computer program products for path management in a processing system. In a method, in response to receiving a request for adding a target controlling unit into a processing system, a plurality of network nodes in the processing system are divided into a group of subnets based on a topology of the plurality of network nodes, the plurality of network nodes being connected to at least one controlling unit in the processing system. A workload estimation is determined, the workload estimation representing a workload to be caused by the target controlling unit to the processing system. A target subnet is selected from the group of subnets for connecting the target controlling unit into the processing system based on the workload estimation. With these embodiments, the target subnet may be selected in an automatic way such that the performance of the processing system may be increased.

Abstract: The display substrate includes a base substrate and a plurality of pixel units disposed on the base substrate. Each of the pixel units is composed of 5 sub-pixels. The 5 sub-pixels include 1 red sub-pixel, 2 green sub-pixels, 1 blue sub-pixel and 1 white sub-pixel. Each of the sub-pixels includes a white light emitting unit. The red sub-pixel, the green sub-pixels and the blue sub-pixel further include color film layers corresponding to respective light emitting colors of the red sub-pixel, the green sub-pixels and the blue sub-pixel. The white sub-pixel is adjacent to the blue sub-pixel, and an aperture area of the blue sub-pixel is smaller than that of the green sub-pixels and smaller than that of the red sub-pixel.

Abstract: The present disclosure relates to a sgRNA and constructing a dual pig model of severe immunodeficiency and liver injury and use thereof. The method comprises the steps of knocking out RAG2, IL2R? and FAH genes in a porcine fetal fibroblast by using a CRISPR/Cas9 technology, constructing a RAG2?/?/IL2R??/Y/FAH?/? triple-gene edited cloned pig by using a somatic cell nuclear transfer technology, and obtaining a dual pig model of severe immunodeficiency and liver injury through phenotypic analysis and identification. The method overcomes the problems of long production period, low efficiency, irreversible damage, unsatisfactory use in a humanization degree and the like in the existing model construction technology, can realize a batch construction of the dual pig model of severe immunodeficiency and liver injury by a continuous cloning technology, and has great advantages and potential market application prospects in the related fields of tumor biology, cell transplantation, humanized animal models and the like.

Abstract: A projection system includes a control module, a projection tube, an aiming driver, an observation device and an observation driver. The control module is configured to issue a first control command and a second control command. The aiming driver is electrically connected to the projection tube and configured to control, in response to the first control command, a projection viewing-line of the projection tube to be aligned with a calibration point. The observation driver is electrically connected to the observation device and configured to control, in response to the second control command, an observation viewing-line of the observation device to be aligned with the calibration point. The projection tube and the observation device are controlled asynchronously.

Abstract: An information handling system may include a circuit board, an integrated circuit package mounted on the circuit board, the integrated circuit package comprising: a plurality of solder balls for electrically coupling the integrated circuit package to the circuit board, the plurality of solder balls comprising a first solder ball and a second solder ball, an internal electrical coupling coupled between the first solder ball and the second solder ball, and a management controller electrically coupled to the internal electrical coupling, the first solder ball, and the second solder ball, and configured to provide out-of-band management facilities for management of the information handling system, the management controller further configured to detect whether an impedance discontinuity has occurred with respect to one or both of the first solder ball and the second solder ball.

Abstract: Provided is a display substrate. The display substrate includes including a base substrate having a first display region and a second display region; in the pixel circuit included in the pixels in the second display region, the conductive line connected to the metal layer is a transparent conductive line, and the transparent conductive line is disposed between the two existing insulating layers.

Abstract: An information handling system may include a strain force fuse formed on a circuit board of the information handling system, the strain force fuse configured to experience an impedance discontinuity in response to a mechanical force applied to the circuit board at or proximate to the strain force fuse and a management controller electrically coupled to the strain force fuse and configured to provide out-of-band management facilities for management of the information handling system, the management controller further configured to detect whether the impedance discontinuity has occurred.

Abstract: A method of forming a semiconductor structure includes forming a seed layer on a substrate, forming a photoresist layer on the seed layer with a first opening wider than a second opening, performing an electroplating process with a first plating current to grow a bottom portion of a first metal line in the first opening and a bottom portion of a second metal line in the second opening, continuing the electroplating process with a second plating current that is larger than the first plating current to grow a top portion of the first metal line and a top portion of the second metal line, removing the photoresist layer to expose a portion of the seed layer, and removing the exposed portion of the seed layer.

Abstract: A power semiconductor device includes an epitaxial layer of a first conductivity type, a plurality of trench device. The epitaxial layer includes an active region and a termination region. A plurality of trench devices are respectively located in a plurality of device trenches in the epitaxial layer in the active region. A contact metal layer is located on an insulating layer and continuously covering the active region and the termination region. A plurality of termination electrodes are respectively located in a plurality of termination trenches in the epitaxial layer in the termination region and electrically isolated from the epitaxial layer. Each of the plurality of termination electrodes includes a lower electrode and an upper electrode. A first end termination electrode, a second end termination electrode, and a first middle termination electrode of the plurality of termination electrodes are electrically connected to the contact metal layer.