Abstract: The present invention provides an anti-PD-L1/VEGF bispecific antibody and a use thereof. Specifically, the present invention provides a bifunctional antibody, comprising: (a) anti-PD-L1 antibody or element; and (b) an anti-VEGF antibody or element linked to the anti-PD-L1 antibody or element. The bifunctional antibody of the present invention can simultaneously bind to VEGF and PD-L1, thereby exerting a therapeutic effect on VEGF and PD-L1-positive tumor cells (especially malignant tumor cells).

Abstract: A semiconductor structure includes a first layer, a second layer, a first interconnection layer, and a second interconnection layer. The first layer includes an upper passive component pattern, and the second layer includes a lower passive component pattern, wherein the upper passive component pattern is opposite to the lower passive component pattern. The first interconnection layer includes at least one first interconnect structure electrically connected on the upper passive component pattern. The second interconnection layer includes at least one second interconnect structure electrically connected on the passive component pattern. The first interconnect structure on the upper passive component pattern is hybrid bonded with the second interconnect structure on the lower passive component pattern. Therefore, the upper passive component pattern and the lower passive component pattern are joined by hybrid bonding to form a passive device.

Abstract: A method for fabricating an integrated circuit device is provided. The method includes depositing a first dielectric layer; depositing a second dielectric layer over the first dielectric layer; etching a trench opening in the second dielectric layer, wherein the trench opening exposes a first sidewall of the second dielectric layer and a second sidewall of the second dielectric layer, the first sidewall of the second dielectric layer extends substantially along a first direction, and the second sidewall of the second dielectric layer extends substantially along a second direction different from the first direction in a top view; forming a via etch stop layer on the first sidewall of the second dielectric layer, wherein the second sidewall of the second dielectric layer is free from coverage by the via etch stop layer; forming a conductive line in the trench opening; and forming a conductive via over the conductive line.

Abstract: This application discloses a method for recovering lead iodide from a perovskite solar battery, and a recycling system. The method for recovering lead iodide from a perovskite solar battery includes the following steps: pretreating a recycled perovskite solar battery to obtain perovskite; putting the perovskite into a second solvent to dissolve lead iodide to obtain a lead iodide-containing solution; and mixing the lead iodide-containing solution with a third solvent to precipitate the lead iodide, and collecting a lead iodide precipitate. A boiling point of the third solvent is lower than a boiling point of the second solvent. The recycling system for recovering lead iodide from a perovskite solar battery includes: a recycled perovskite solar battery stripping apparatus, a lead iodide extraction apparatus, and a lead iodide precipitate separation apparatus.

Abstract: A pixel circuit includes a drive sub-circuit, a write sub-circuit, a compensation sub-circuit, a first reset sub-circuit, a second reset sub-circuit and a light-emitting element. The drive sub-circuit is configured to provide a drive signal to a third node in response to signals of the first node and the second node; the write sub-circuit is configured to write the signal of the data signal line to the second node or the third node under a control of a signal of a first scanning signal line; the compensation sub-circuit is configured to compensate a voltage at the first node under the control of the signal of the first scanning signal line.

Abstract: An electronic device is provided. The electronic device includes a first substrate, an insulating layer, a first conductive layer and a second conductive layer. The insulating layer is overlapped with the first substrate. The second conductive layer contacts with the first conductive layer. The first conductive layer and the second conductive layer are disposed between the first substrate and the insulating layer. The second conductive layer is disposed between the first conductive layer and the insulating layer. Moreover, a thermal expansion coefficient of the second conductive layer is between a thermal expansion coefficient of the first conductive layer and a thermal expansion coefficient of the insulating layer.

Abstract: A lens assembly includes a lens unit and a first reflective element. The lens unit includes a plurality of lenses and the back focal length of the lens unit is longer than the total length of the lens unit. The first reflective element includes a first surface, a first prism surface, and a bottom surface, and the first prism surface connects the first surface and the bottom surface, respectively. The lens unit and the first reflective element are arranged in order from an object side along a first axis. A light from the object side enters the first reflective element from the first surface and then guided to the first prism surface.

Abstract: An optical structure, a manufacturing method thereof and a display device. The optical structure has a light incident side and a light-exiting side, the optical structure includes a first lens, a transflective film, a phase retardation layer, and a polarizing reflective film. The first lens includes a first surface and a second surface, the phase retardation layer is located on a side of the second surface away from the first surface, the phase retardation layer includes an alignment layer and a liquid crystal layer, the manufacturing method includes: coating the alignment layer on the second surface of the first lens; using an alignment light source to optically align the alignment layer from the light incident side; coating the liquid crystal layer on a side of the alignment layer away from the second surface.

Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may identify a first service associated with a first subscriber identification module (SIM), the first service having a first priority. The UE may identify at least one re-prioritization condition that is satisfied, wherein the at least one re-prioritization condition is associated with at least one of the first service or a second service associated with a second SIM, the second service having a second priority that is lower than the first priority. The UE may adjust, based at least in part on the at least one re-prioritization condition being satisfied, the second priority, wherein the adjusted second priority is higher than the first priority. The UE may perform a communication corresponding to the second service based at least in part on the adjusted second priority. Numerous other aspects are described.

Abstract: Disclosed are a method and a device for identifying full-section excavation parameters of large-section tunnel with broken surrounding rock, which is capable of solving the problem of inaccurate arrangement of blasting hole points in tunnel excavation engineering, including following steps: establishing a three-dimensional finite element model based on a blasting section design of a tunnel; performing a simulation with the three-dimensional finite element model based on blasting design parameters to obtain blasting quality parameters; selecting a group closest to a preset quality parameter from multiple groups of the blasting design parameters as target blasting design parameters, wherein the preset quality parameter is an acceptance grade standard of the tunnel; obtaining first thermal imaging information of a first hot spot of a surface to be blasted; calibrating actual hole spacing parameters based on the first thermal imaging information and the target blasting design parameters.

Abstract: The present invention relates to a cell differentiation medium composition, a high secretion insulin-producing cells and a preparation method thereof. The high secretion insulin-producing cells obtained by using the cell differentiation medium composition to induce stem cell differentiated under specific conditions can secrete a large amount of insulin in a short time, and when the high-secreting insulin-producing cells are transplanted into the human body, they are not easy to be swallowed by macrophages, which can improve the survival rate of the insulin-producing cells and prolong the time of insulin secretion thereby.

Abstract: A micro light-emitting element is provided. The micro light-emitting element includes a first-type semiconductor having a bottom surface and a light-emitting layer disposed on the first-type semiconductor. The micro light-emitting element also includes a second-type semiconductor disposed on the light-emitting layer and an intrinsic semiconductor disposed on the second-type semiconductor and made of the same material as the second-type semiconductor. The intrinsic semiconductor has a top surface relative to the bottom surface. The sidewalls of the first-type semiconductor, the light-emitting layer, the second-type semiconductor, and the intrinsic semiconductor form a continuous side surface, and the side surface connects the bottom surface to the top surface.

Abstract: The present disclosure provides a display module and a display apparatus, which belong to the field of display technology and can solve the technical problem of notably insufficient space reserved for batteries in the display module that causes a notably reduced battery capacity and influences standby time of the display apparatus in the existing art. The display module of the present disclosure includes a display panel, and a driver integrated circuit and a passive device each electrically connected to the display panel. The driver integrated circuit and the passive device are packaged in a land grid array package structure. The land grid array package structure is integrated onto the display panel.

Abstract: A method for fabricating a semiconductor device includes the steps of forming a metal gate on a substrate, a contact etch stop layer (CESL) adjacent to the metal gate, and an interlayer dielectric (ILD) layer around the gate structure, performing a first etching process to remove the ILD layer, performing a second etching process to remove the CESL for forming a first contact hole, and then forming a first contact plug in the first contact hole. Preferably, a width of the first contact plug adjacent to the CESL is less than a width of the first contact plug under the CESL.

Abstract: A semiconductor structure can include a first substrate having a frontside and a backside opposite the frontside. The semiconductor structure can include devices on the frontside. The semiconductor structure can include first interconnect structures on the frontside and coupled to the devices. The semiconductor structure can include a heat distribution layer on the frontside and electrically isolated from the first interconnect structures, where the heat distribution layer includes a thermally conductive material. The semiconductor structure can include a second substrate coupled to the first substrate on the frontside. The semiconductor structure can include second interconnect structures on the backside and coupled to the devices.

Abstract: The present disclosure belongs to the technical field of medical devices, and in particular relates to a post-operative indwelling urinary catheter suitable for males. In view of a problem that a urinary catheter is prone to shaking due to collision, in the present disclosure, by arranging a shield, a limiting ring is rotated to adjust a connection position of a spiral tube and a chassis, and the shield is pushed to cause a fixing soft disk to be abutted against a human body, avoiding the possibility of urethral irritation or injury when an external urinary catheter I is shaken, avoiding bacterial invasion and urinary tract infection, and improving the comfort of use.

Abstract: A rolling and sliding adaptive device for guiding and fixing a drill pipe includes a mounting platform, where the mounting platform is provided with a through hole for the drill pipe to pass through. Multiple rolling and sliding support mechanisms are arranged around the through hole. The rolling and sliding support mechanisms each include a support seat. The support seat is provided with a contact element telescopic and swingable on the support seat. A telescopic drive mechanism is provided between the contact element and the support seat. The contact elements on the multiple rolling and sliding support mechanisms form a funnel-shaped structure with a large upper part and a small lower part around the through hole. The rolling and sliding adaptive device is used on a deep in-situ high-fidelity coring calibration platform for accurate positioning of an assembly process of a multi-section drill pipe bin.

Abstract: In an embodiment, a method includes forming a device layer over a first substrate; forming a first interconnect structure over a front-side of the device layer; attaching a second substrate to the first interconnect structure; forming a second interconnect structure over a back-side of the device layer, the second interconnect structure comprising back-side memory elements, wherein the back-side memory elements and a first plurality of active devices of the device layer provide a first memory array; and forming conductive connectors over the second interconnect structure.

Abstract: The present disclosure relates to a ULBP6 binding protein that inhibits the interaction between ULBP6 and NKG2D, and methods of treating cancer with said ULBP6 binding protein.

Abstract: A integrated circuit includes a first, a second, a third, and a fourth gate, a first input pin and a first conductor. The first and third gate are on a first level. The second and fourth gate are on a second level. The second gate is coupled to the first gate. The fourth gate is coupled to the third gate. The first input pin extends in a second direction, is on a first metal layer above a front-side of a substrate, is coupled to the first gate, and configured to receive a first input signal. The first input pin is electrically coupled to the third gate by the first, second or fourth gate. The first conductor extends in the first direction, is on a second metal layer below a back-side of the substrate, and is coupled to the second and fourth gate.