Abstract: The invention provides a carbon dioxide-based polyurethane elastomer with damping and anti-fatigue aging properties and its preparation method. It is obtained from Component A and Component B; Component A includes: PTMG-1000 45˜60 parts, carbon dioxide-based polyol 25˜30 parts, poly-DOPO-ITA-pentanediol ester 10˜20 parts, BDO 3˜5 parts, water 0.3˜0.5 parts, N-methylimidazole 0.5˜0.8 parts, bis(2-dimethylaminoethyl) ether 0.1˜0.2 parts, needle-shaped nano-titanium dioxide 0.5 parts, hindered phenol 0.2˜0.5 parts, dibutyltin dilaurate 0.1˜0.3 parts, strontium chloride 0.005˜0.01 parts, rhodium chloride 0.02˜0.03 parts, foaming agent 0.2˜0.5 parts; Component B includes: carbon dioxide-based polyol 50˜55 parts, MDI-50 45˜50 parts, organic zinc 0.01˜0.02 parts, organic bismuth 0.01˜0.02 parts.

Abstract: Semiconductor devices and methods of forming the same are provided. In an embodiment, a semiconductor device includes a first fin extending along a first direction, a second fin extending parallel to the first fin, and a gate structure over and wrapping around the first fin and the second fin, the gate structure extending along a second direction perpendicular to the first direction. The first fin bents away from the second fin along the second direction and the second fin bents away from the first fin along the second direction.

Abstract: A semiconductor structure includes a SiGe fin protruding from a substrate, where the SiGe fin includes a top portion having a first sidewall and a second sidewall and a bottom portion having a third sidewall and a fourth sidewall, and where a first transition region connecting the first sidewall to the third sidewall and a second transition region connecting the second sidewall to the fourth sidewall each have a tapered profile extending away from the first sidewall and the second sidewall, respectively, and a Si-containing layer disposed on the top portion of the SiGe fin, where a portion of the Si-containing layer on the first transition region extends away from the first sidewall by a first lateral distance and a portion of the Si-containing layer on the second transition region extends away from the second sidewall by a second lateral distance that is different from the first lateral distance.

Abstract: A tricalcium silicate kit includes a first reagent containing tricalcium silicate, and a second reagent containing a salt material and water. The salt material is selected from the group consisting of sodium carbonate, calcium chloride, and a combination thereof. A method for preparing a Portland cement-based dental material using the tricalcium silicate kit is also provided.

Abstract: The invention provides a Probiotic microcapsule and a preparation method thereof, relating to the technical field of Probiotic products. The method includes the following steps: (a) preparing a capsule core containing Probiotics: mixing the capsule core materials including Probiotic powder, microcrystalline cellulose and starch, then adding a hydroxypropyl methylcellulose solution thereinto, while mixing evenly, making the obtained mixture materials into spherical particulate capsule cores by the extrusion spherization method; (b) coating by atomization: coating the microcapsule cores with a coating material solution in a single layer or multiple layers by atomization, getting core-shell microcapsules. The Probiotic microcapsules prepared by the present invention have a large encapsulation, uniform microcapsule particles, controllable particle size, storage-resistance, targetability to intestinal tracts, resistance to gastric acids and high temperature stability.

Abstract: The embodiments described herein are directed to a method for reducing fin oxidation during the formation of fin isolation regions. The method includes providing a semiconductor substrate with an n-doped region and a p-doped region formed on a top portion of the semiconductor substrate; epitaxially growing a first layer on the p-doped region; epitaxially growing a second layer different from the first layer on the n-doped region; epitaxially growing a third layer on top surfaces of the first and second layers, where the third layer is thinner than the first and second layers. The method further includes etching the first, second, and third layers to form fin structures on the semiconductor substrate and forming an isolation region between the fin structures.

Abstract: Semiconductor devices and methods of forming the same are provided. In an embodiment, a semiconductor device includes a first fin extending along a first direction, a second fin extending parallel to the first fin, and a gate structure over and wrapping around the first fin and the second fin, the gate structure extending along a second direction perpendicular to the first direction. The first fin bents away from the second fin along the second direction and the second fin bents away from the first fin along the second direction.

Abstract: A semiconductor structure includes a SiGe fin protruding from a substrate, where the SiGe fin includes a top portion having a first sidewall and a second sidewall and a bottom portion having a third sidewall and a fourth sidewall, and where a first transition region connecting the first sidewall to the third sidewall and a second transition region connecting the second sidewall to the fourth sidewall each have a tapered profile extending away from the first sidewall and the second sidewall, respectively, and a Si-containing layer disposed on the top portion of the SiGe fin, where a portion of the Si-containing layer on the first transition region extends away from the first sidewall by a first lateral distance and a portion of the Si-containing layer on the second transition region extends away from the second sidewall by a second lateral distance that is different from the first lateral distance.

Abstract: A packaging structure includes: a substrate provided with a through-cavity penetrating up and down, and a metal heat sink on a front surface of the substrate; a bonding chip mounting area and a first passive element mounting area on the front surface, and a flip chip mounting area, a second passive element mounting area and a pin lead mounting area are provided on a back surface of the substrate; a first sealing ring located at the periphery of the bonding chip mounting area and the first passive element mounting area; a first cover plate packaged on the first sealing ring; a second sealing ring located at the periphery of the flip chip mounting area and the second passive element mounting area with the pin lead mounting area being located at the periphery of the second sealing ring; and a second cover plate packaged on the second sealing ring.

Abstract: Semiconductor devices and methods of forming the same are provided. In an embodiment, a semiconductor device includes a first fin extending along a first direction, a second fin extending parallel to the first fin, and a gate structure over and wrapping around the first fin and the second fin, the gate structure extending along a second direction perpendicular to the first direction. The first fin bents away from the second fin along the second direction and the second fin bents away from the first fin along the second direction.

Abstract: The embodiments described herein are directed to a method for reducing fin oxidation during the formation of fin isolation regions. The method includes providing a semiconductor substrate with an n-doped region and a p-doped region formed on a top portion of the semiconductor substrate; epitaxially growing a first layer on the p-doped region; epitaxially growing a second layer different from the first layer on the n-doped region; epitaxially growing a third layer on top surfaces of the first and second layers, where the third layer is thinner than the first and second layers. The method further includes etching the first, second, and third layers to form fin structures on the semiconductor substrate and forming an isolation region between the fin structures.

Abstract: The invention relates to the technical field of bioengineering and provides a method for improving the specificity and affinity of an aptamer. The method includes: S1, screening a target of an aptamer from a compound information database by virtual computing; S2, verifying the screening result in Step S1 through experiments; S3, performing virtual saturation mutation on a site of the aptamer, and screening out a mutation site of the aptamer; S4, performing base substitution to the mutation site of the aptamer; and S5, detecting the binding parameter of the aptamer after base substitution with the target screened in Step S1, and selecting an aptamer with improved specificity and affinity after base substitution. An efficient molecular design-guided method is developed by computer rational calculation, to improve the specificity and binding affinity of the aptamer by directional modification. The present invention is of great significance for the practical application of aptamers.

Abstract: The embodiments described herein are directed to a method for reducing fin oxidation during the formation of fin isolation regions. The method includes providing a semiconductor substrate with an n-doped region and a p-doped region formed on a top portion of the semiconductor substrate; epitaxially growing a first layer on the p-doped region; epitaxially growing a second layer different from the first layer on the n-doped region; epitaxially growing a third layer on top surfaces of the first and second layers, where the third layer is thinner than the first and second layers. The method further includes etching the first, second, and third layers to form fin structures on the semiconductor substrate and forming an isolation region between the fin structures.

Abstract: A device for rapidly detecting energy efficiency of a permanent magnet synchronous motor includes a test platform, an energy circulation device, and a data synchronous acquisition module, the test platform being fixedly connected to support legs via threads, an upper end surface of the test platform being provided with baffles to define a motor mounting tank, a bolt hole being provided in a surface of an outer baffle of the motor mounting tank, the energy circulation device being mounted on a fixed baffle on one end of the motor mounting tank, a second intelligent power analyzer, a first intelligent power analyzer, and a temperature inspection instrument being sequentially mounted on an upper surface of a tail end on a right side of the test platform, and the data synchronous acquisition module being provided on one end of an inner wall of the motor mounting tank.

Abstract: A device for rapidly detecting energy efficiency of a permanent magnet synchronous motor includes a test platform, an energy circulation device, and a data synchronous acquisition module, the test platform being fixedly connected to support legs via threads, an upper end surface of the test platform being provided with baffles to define a motor mounting tank, a bolt hole being provided in a surface of an outer baffle of the motor mounting tank, the energy circulation device being mounted on a fixed baffle on one end of the motor mounting tank, a second intelligent power analyzer, a first intelligent power analyzer, and a temperature inspection instrument being sequentially mounted on an upper surface of a tail end on a right side of the test platform, and the data synchronous acquisition module being provided on one end of an inner wall of the motor mounting tank.

Abstract: Concealed mark preparation with core-shell luminosphores for customs security check system and application thereof, to address that infrared luminescent materials have not been used in senseless customs clearance field, absorption cross sections of infrared luminescent materials currently available are not big enough, and upconversion luminescence intensity thereof is low, consequently, the luminescent marks are not clear enough to recognize marked abnormal luggage, and provide a following solution: step 1: preparing TiQ2; step 2: preparing Ag@TiO2 composite nanoparticles; step 3: preparing Ag@TiQ2@NaYF4:Yb3+, Er3+ luminescent nanoparticles; step 4: making concealed luggage marks.

Abstract: A display panel includes a first substrate, a second substrate, and spacers. The first substrate includes a light-shielding layer having a matrix portion and widened portions, and each widened portion is disposed at an intersection of at least one column and at least one row of the matrix portion. The second substrate is disposed opposite to the first substrate. The spacers are disposed on the first substrate. Each spacer is covered with each widened portion respectively, and an end of each spacer abuts against a surface of the second substrate. A slidable scope on the surface of the second substrate, within which the end of each spacer abuts against the second substrate, is not greater than coverage of a corresponding widened portion.

Abstract: A semiconductor structure includes a SiGe fin protruding from a substrate, where the SiGe fin includes a top portion having a first sidewall and a second sidewall and a bottom portion having a third sidewall and a fourth sidewall, and where a first transition region connecting the first sidewall to the third sidewall and a second transition region connecting the second sidewall to the fourth sidewall each have a tapered profile extending away from the first sidewall and the second sidewall, respectively, and a Si-containing layer disposed on the top portion of the SiGe fin, where a portion of the Si-containing layer on the first transition region extends away from the first sidewall by a first lateral distance and a portion of the Si-containing layer on the second transition region extends away from the second sidewall by a second lateral distance that is different from the first lateral distance.

Abstract: Semiconductor devices and methods of forming the same are provided. In an embodiment, a semiconductor device includes a first fin extending along a first direction, a second fin extending parallel to the first fin, and a gate structure over and wrapping around the first fin and the second fin, the gate structure extending along a second direction perpendicular to the first direction. The first fin bents away from the second fin along the second direction and the second fin bents away from the first fin along the second direction.

Abstract: The embodiments described herein are directed to a method for reducing fin oxidation during the formation of fin isolation regions. The method includes providing a semiconductor substrate with an n-doped region and a p-doped region formed on a top portion of the semiconductor substrate; epitaxially growing a first layer on the p-doped region; epitaxially growing a second layer different from the first layer on the n-doped region; epitaxially growing a third layer on top surfaces of the first and second layers, where the third layer is thinner than the first and second layers. The method further includes etching the first, second, and third layers to form fin structures on the semiconductor substrate and forming an isolation region between the fin structures.