Abstract: An optical device and the prism module thereof are provided. The prism module includes a first prism, a second prism, and a third prism. The second prism is disposed beside the first prism. The third prism is adhered to the second prism. First light enters the first prism, is reflected plural times in the first prism, enters the second prism, and is emitted from the second prism. Second light enters the second prism, is reflected plural times in the second prism, and is emitted from the second prism. Third light sequentially passes through the third prism and the second prism, enters the first prism, is reflected plural times in the first prism, and is emitted from the first prism.

Abstract: A semiconductor structure includes a first interposer; a second interposer laterally adjacent to the first interposer, where the second interposer is spaced apart from the first interposer; and a first die attached to a first side of the first interposer and attached to a first side of the second interposer, where the first side of the first interposer and the first side of the second interposer face the first die.

Abstract: The present disclosure relates to a carrier for sustained-release of a drug and use thereof. The carrier is used to carry a drug. The carrier is in a gel state, a semi-solid state, or a solid state. The carrier includes a polyol fatty acid ester as a main component and a hydrogenated vegetable oil dissolved in the polyol fatty acid ester. The state of the sustained-release carrier can be adjusted by adjusting the amount of the dissolved hydrogenated vegetable oil.

Abstract: A handheld controller is adapted to control an electronic device. The handheld controller includes a first body, a second body, and a connecting portion. The first body is adapted to be held by a user's hand. The second body is connected to the first body through the connecting portion. The connecting portion is adapted to be clamped between user's fingers. A distance between the first body and at least a portion of the second body is variable.

Abstract: A method of forming a semiconductor device includes providing a substrate having a recess, and growing an epitaxial feature in the recess. The method of growing the epitaxial feature includes: (a) growing a sub-layer of the epitaxial feature; (b) selectively etching the sub-layer of the epitaxial feature while providing a first UV radiation; and (c) repeating step (a) and step (b) alternately multiple times.

Abstract: A chip package structure is provided. The chip package structure includes a chip. The chip package structure includes a conductive ring-like structure over and electrically insulated from the chip. The conductive ring-like structure surrounds a central region of the chip. The chip package structure includes a first solder structure over the conductive ring-like structure. The first solder structure and the conductive ring-like structure are made of different materials.

Abstract: A rate adjustment method includes a rate estimation model generating a plurality of estimated rates according to a plurality of training data, a revenue estimation model generating an estimated revenue according to the plurality of estimated rates, updating the rate estimation model according to the estimated revenue to generate an updated rate estimation model, and inputting a plurality of current data into the updated rate estimation model to update the plurality of estimated rates.

Abstract: An analog input device including at least one mounting panel and a matrix of analog push button assemblies mounted thereon. Each analog push button assembly including an analog pressure sensor including a pressure reception arrangement having an optical sensing sub-arrangement configured to measure an amount of light varied according to a pressure sensed at the pressure reception arrangement and an output terminal for outputting an analog signal corresponding to the amount of light measured, and a plunger element configured to exert the pressure on the pressure reception arrangement. The analog input device may include a multiplexer including an input side coupled to the push button assemblies and an output side; an analog-to-digital converter coupled to the output side of the multiplexer; a processor coupled to the analog-to-digital converter and configured to output a data packet; and a communication interface configured to transmit the data packet to a host computing device.

Abstract: A package structure is provided. The package structure includes a conductive structure having a first portion and a second portion, and the second portion is wider than the first portion. The package structure also includes a semiconductor chip laterally separated from the conductive structure. The package structure further includes a protective layer laterally surrounding the conductive structure and the semiconductor chip. The first portion of the conductive structure has a sidewall extending from the second portion to a surface of the protective layer. The protective layer laterally surrounds an entirety of the sidewall of the first portion.

Abstract: Various example embodiments described herein relate to a sensor assembly. The sensor assembly includes a first sensor cover and a second sensor cover. The first sensor cover is disposed on a first end of the sensor assembly and the second sensor cover is disposed on a second end of the sensor assembly. The first sensor cover defines a first capillary and the second sensor cover defines a second capillary therethrough. The sensor assembly further includes a first sensing unit, a second sensing unit, and a filter. The first sensing unit and the second sensing unit are disposed between the first sensor cover and the second sensor cover. In some example embodiments, the filter is reactive to a target gas and thereby prevents an inflow of the target gas through the second capillary into the sensor assembly.

Abstract: A chip package structure is provided. The chip package structure includes a first substrate. The chip package structure includes a conductive via structure passing through the first substrate. The chip package structure includes a barrier layer over a surface of the first substrate. The chip package structure includes an insulating layer over the barrier layer. The chip package structure includes a conductive pad over the insulating layer. The conductive pad has a first portion passing through the insulating layer and the barrier layer and connected to the conductive via structure. The chip package structure includes a conductive bump over the conductive pad. The chip package structure includes a second substrate. The chip package structure includes an underfill layer between the first substrate and the second substrate.

Abstract: An example computing device includes a plurality of interfaces to connect to a plurality of audio peripheral devices, a communications interface to establish a network connection, and a processor interconnected with the plurality of interfaces and the communications interface. The processor is to determine a location of the computing device based on the network connection. The processor sets an audio peripheral device from the plurality of the audio peripheral devices as a default audio peripheral device based on the location. The processor communicates an audio signal through the default audio peripheral device.

Abstract: A chip package structure is provided. The chip package structure includes a first substrate. The chip package structure includes a conductive via structure passing through the first substrate. The chip package structure includes a barrier layer over a surface of the first substrate. The chip package structure includes an insulating layer over the barrier layer. The chip package structure includes a conductive pad over the insulating layer and having a first portion and a second portion. The chip package structure includes a conductive bump over the second portion of the conductive pad. A third portion of the conductive pad is between the conductive bump and the conductive via structure from a top view of the conductive pad, the conductive bump, and the conductive via structure.

Abstract: A chip package structure is provided. The chip package structure includes a chip. The chip package structure includes a conductive bump over and electrically connected to the chip. The chip package structure includes a ring-like structure over and electrically insulated from the chip. The ring-like structure surrounds the conductive bump, and the ring-like structure and the conductive bump are made of a same material.

Abstract: A package structure includes a first semiconductor die having a first conductive pad and a second semiconductor die having a second conductive pad. The package structure also includes a conductive structure and a third semiconductor die. The third semiconductor die extends across a portions of the first semiconductor die and the second semiconductor die. A third conductive pad and a fourth conductive pad of the third semiconductor die are aligned with the first conductive pad and the second conductive pad, respectively. The package structure further includes a protective layer surrounding the conductive structure and the third semiconductor die and an insulating layer extending across an interface between the protective layer and the conductive structure. The package structure includes a conductive layer electrically connected to the conductive structure. The conductive layer has a first portion spaced from the conductive structure and a second portion directly above the conductive structure.

Abstract: A package structure and a formation method of a package structure are provided. The method includes forming a conductive structure over a carrier substrate and disposing a semiconductor die over the carrier substrate. The method also includes forming a protective layer to surround the conductive structure and the semiconductor die. The method further includes forming an insulating layer over the protective layer. The insulating layer has an opening exposing a portion of the conductive structure. In addition, the method includes forming a conductive layer over the insulating layer. The conductive layer fills the opening, and the conductive layer has a substantially planar top surface.

Abstract: An optical system includes an objective lens module, an image inverting module, and an eyepiece module. The objective lens module includes a first lens group, a second lens group, a third lens group, a fourth lens group, and a fifth lens group. The optical system satisfies at least one of the following conditions: 0.45?LG4D/LG1D?0.8; 0.015 mm?1?1/fG3?0.045 mm?1; 0.045 mm?1?|1/fG4|?0.07 mm?1; 0.35?|fG4/fG3|?0.75; 0.15?fG1/f?1.6; wherein LG4D is an effective optical diameter of the fourth lens group, LG1D is an effective optical diameter of the first lens group, fG1 is an effective focal length of the first lens group, fG3 is an effective focal length of the third lens group, fG4 is an effective focal length of the fourth lens group, and f is an effective focal length of the objective lens module.

Abstract: In some examples, an electronic device comprises a processor and a power circuit coupled to the processor. The power circuit is to provide power to the processor and to measure a current drawn from the power circuit by the processor. The electronic device also comprises a voltage regulator controller coupled to the processor and the power circuit. The voltage regulator controller is to receive a current usage prediction from the processor, receive the measurement from the power circuit, compare the current usage prediction and the measurement, and, based on the comparison, drive the power circuit in accordance with the measurement instead of the current usage prediction.

Abstract: A package structure is provided. The package structure includes a conductive structure having a first portion and a second portion, and the second portion is wider than the first portion. The package structure also includes a semiconductor chip laterally separated from the conductive structure. The package structure further includes a protective layer laterally surrounding the conductive structure and the semiconductor chip. The first portion of the conductive structure has a sidewall extending from the second portion to a surface of the protective layer. The protective layer laterally surrounds an entirety of the sidewall of the first portion.