Abstract: A semiconductor device is formed such that a semiconductor substrate of the device has a non-uniform thickness. A cavity is etched at a selected side of the semiconductor substrate, and the selected side is then fusion bonded to another substrate, such as a carrier substrate. After fusion bonding, the side of the semiconductor substrate opposite the selected side is ground to a defined thickness. Accordingly, the semiconductor substrate has a uniform thickness except in the area of the cavity, where the substrate is thinner. Devices that benefit from a thinner substrate, such as an accelerometer, can be formed over the cavity.

Abstract: A wafer structure (88) includes a device wafer (20) and a cap wafer (60). Semiconductor dies (22) on the device wafer (20) each include a microelectronic device (26) and terminal elements (28, 30). Barriers (36, 52) are positioned in inactive regions (32, 50) of the device wafer (20). The cap wafer (60) is coupled to the device wafer (20) and covers the semiconductor dies (22). Portions (72) of the cap wafer (60) are removed to expose the terminal elements (28, 30). The barriers (36, 52) may be taller than the elements (28, 30) and function to prevent the portions (72) from contacting the terminal elements (28, 30) when the portions (72) are removed. The wafer structure (88) is singulated to form multiple semiconductor devices (89), each device (89) including the microelectronic device (26) covered by a section of the cap wafer (60) and terminal elements (28, 30) exposed from the cap wafer (60).

Abstract: A semiconductor device is formed such that a semiconductor substrate of the device has a non-uniform thickness. A cavity is etched at a selected side of the semiconductor substrate, and the selected side is then fusion bonded to another substrate, such as a carrier substrate. After fusion bonding, the side of the semiconductor substrate opposite the selected side is ground to a defined thickness. Accordingly, the semiconductor substrate has a uniform thickness except in the area of the cavity, where the substrate is thinner. Devices that benefit from a thinner substrate, such as an accelerometer, can be formed over the cavity.

Abstract: A method for forming a semiconductor device includes providing a substrate having a first major surface and a second major surface, removing a first portion of the substrate to form a cavity at the first major surface of the substrate, bonding the first major surface of the substrate to a carrier substrate after forming the cavity, and reducing a thickness of the substrate. The method further includes forming a first accelerometer device at the second major surface such that at least a portion of the first accelerometer device is over the cavity and forming a second accelerometer device at the second major surface such that the second accelerometer device is not disposed over the cavity.

Abstract: A semiconductor die (20) includes a substrate (30) and microelectronic devices (22, 26) located at a surface (32) of the substrate (30). A cap (34) is coupled to the substrate (30), and the microelectronic device (22) is positioned in the cavity (24). An outgassing material structure (36) is located within a cavity (24) between the cap (34) and the substrate (30). The outgassing material structure (36) releases trapped gas (37) to increase the pressure within the cavity (24) from an initial pressure level (96) to a second pressure level (94). The cap (34) may include another cavity (28) containing another microelectronic device (26). A getter material (42) may be located within the cavity (28). The getter material (42) is activated to absorb residual gas (46) in the cavity (28) and decrease the pressure within the cavity (28) from the initial pressure level (96) to a third pressure level (92).

Abstract: A MEMS is attached to a bonding wafer in part by forming a support layer over the MEMS. A first eutectic layer is formed over the support layer. The eutectic layer is patterned into segments to relieve stress. A second eutectic layer is formed over the bonding wafer. A eutectic bond is formed with the segments and the second eutectic layer to attach the bonding wafer to the MEMS.

Abstract: A wafer structure (88) includes a device wafer (20) and a cap wafer (60). Semiconductor dies (22) on the device wafer (20) each include a microelectronic device (26) and terminal elements (28, 30). Barriers (36, 52) are positioned in inactive regions (32, 50) of the device wafer (20). The cap wafer (60) is coupled to the device wafer (20) and covers the semiconductor dies (22). Portions (72) of the cap wafer (60) are removed to expose the terminal elements (28, 30). The barriers (36, 52) may be taller than the elements (28, 30) and function to prevent the portions (72) from contacting the terminal elements (28, 30) when the portions (72) are removed. The wafer structure (88) is singulated to form multiple semiconductor devices (89), each device (89) including the microelectronic device (26) covered by a section of the cap wafer (60) and terminal elements (28, 30) exposed from the cap wafer (60).

Abstract: A semiconductor device is formed such that a semiconductor substrate of the device has a non-uniform thickness. A cavity is etched at a selected side of the semiconductor substrate, and the selected side is then fusion bonded to another substrate, such as a carrier substrate. After fusion bonding, the side of the semiconductor substrate opposite the selected side is ground to a defined thickness. Accordingly, the semiconductor substrate has a uniform thickness except in the area of the cavity, where the substrate is thinner. Devices that benefit from a thinner substrate, such as an accelerometer, can be formed over the cavity.

Abstract: A wafer structure (88) includes a device wafer (20) and a cap wafer (60). Semiconductor dies (22) on the device wafer (20) each include a microelectronic device (26) and terminal elements (28, 30). Barriers (36, 52) are positioned in inactive regions (32, 50) of the device wafer (20). The cap wafer (60) is coupled to the device wafer (20) and covers the semiconductor dies (22). Portions (72) of the cap wafer (60) are removed to expose the terminal elements (28, 30). The barriers (36, 52) may be taller than the elements (28, 30) and function to prevent the portions (72) from contacting the terminal elements (28, 30) when the portions (72) are removed. The wafer structure (88) is singulated to form multiple semiconductor devices (89), each device (89) including the microelectronic device (26) covered by a section of the cap wafer (60) and terminal elements (28, 30) exposed from the cap wafer (60).

Abstract: A disclosed semiconductor fabrication process includes forming a first bonding structure on a first surface of a cap wafer, forming a second bonding structure on a first surface of a device wafer, and forming a device structure on the device wafer. One or more eutectic flow containment structures are formed on the cap wafer, the device wafer, or both. The flow containment structures may include flow containment micro-cavities (FCMCs) and flow containment micro-levee (FCMLs). The FCMLs may be elongated ridges overlying the first surface of the device wafer and extending substantially parallel to the bonding structure. The FCMLs may include interior FCMLs lying within a perimeter of the bonding structure, exterior FCMLs lying outside of the bonding structure perimeter, or both. When the two wafers are bonded, the FCMLs and FCMCs confine flow of the eutectic material to the region of the bonding structure.

Abstract: A device structure is made using a first conductive layer over a first wafer. An isolated conductive region is formed in the first conductive layer surrounded by a first opening in the conductive layer. A second wafer has a first insulating layer and a conductive substrate, wherein the conductive substrate has a first major surface adjacent to the first insulating layer. The insulating layer is attached to the isolated conductive region. The conductive substrate is thinned to form a second conductive layer. A second opening is formed through the second conductive layer and the first insulating layer to the isolated conductive region. The second opening is filled with a conductive plug wherein the conductive plug contacts the isolated conductive region. The second conductive region is etched to form a movable finger over the isolated conductive region. A portion of the insulating layer under the movable finger is removed.

Abstract: A method of forming a MEMS device includes forming a sacrificial layer over a substrate. The method further includes forming a metal layer over the sacrificial layer and forming a protection layer overlying the metal layer. The method further includes etching the protection layer and the metal layer to form a structure having a remaining portion of the protection layer formed over a remaining portion of the metal layer. The method further includes etching the sacrificial layer to form a movable portion of the MEMS device, wherein the remaining portion of the protection layer protects the remaining portion of the metal layer during the etching of the sacrificial layer to form the movable portion of the MEMS device.

Abstract: A MEMS is attached to a bonding wafer in part by forming a support layer over the MEMS. A first eutectic layer is formed over the support layer. The eutectic layer is patterned into segments to relieve stress. A second eutectic layer is formed over the bonding wafer. A eutectic bond is formed with the segments and the second eutectic layer to attach the bonding wafer to the MEMS.

Abstract: A method of forming a MEMS device includes forming a sacrificial layer over a substrate. The method further includes forming a metal layer over the sacrificial layer and forming a protection layer overlying the metal layer. The method further includes etching the protection layer and the metal layer to form a structure having a remaining portion of the protection layer formed over a remaining portion of the metal layer. The method further includes etching the sacrificial layer to form a movable portion of the MEMS device, wherein the remaining portion of the protection layer protects the remaining portion of the metal layer during the etching of the sacrificial layer to form the movable portion of the MEMS device.

Abstract: A method (50) for producing a layered wafer structure (24) having anti-stiction bumps (22) entails producing the anti-stiction bumps (22) in a surface (32) of a substrate (26) or, alternatively, in a surface (48) of a substrate (28). The method (50) further entails coupling the substrates (26, 28) with an insulator layer (30) interposed between the substrates (26, 28). A MEMS structure (20) having a movable element (34) is formed in the substrate (28) and openings (78) defining the movable element (34) extend through the substrate (28). A portion of the insulator layer (30) is removed via the openings (78) to release the movable element (34). The anti-stiction bumps (22) limit stiction between the movable element (34) and the underlying substrate (26).

Abstract: A method for electrically coupling a first wafer with a second wafer is provided. The method includes bonding the first wafer with the second wafer using a bonding material. The method further includes forming an opening in the first wafer in a scribe area of the second wafer to expose a surface of a conductive structure of the second wafer. The method further includes forming a conductive layer overlying the first wafer and the opening in the first wafer such that the conductive layer forms an electrical contact with the conductive structure of the second wafer thereby electrically coupling the first wafer with the second wafer.

Abstract: A method of forming a micro-electromechanical system (MEMS) includes providing a cap substrate, providing a support substrate, depositing a conductive material over the support substrate, patterning the conductive material to form a gap stop and a contact, wherein the gap stop is separated form the contact by an opening, forming a bonding material over the contact and in the opening, wherein the gap stop and the contact prevent the bonding material from extending outside the opening, and attaching the cap substrate to the support substrate by the step of forming the bonding material. In addition, the structure is described.

Abstract: A device structure is made using a first conductive layer over a first wafer. An isolated conductive region is formed in the first conductive layer surrounded by a first opening in the conductive layer. A second wafer has a first insulating layer and a conductive substrate, wherein the conductive substrate has a first major surface adjacent to the first insulating layer. The insulating layer is attached to the isolated conductive region. The conductive substrate is thinned to form a second conductive layer. A second opening is formed through the second conductive layer and the first insulating layer to the isolated conductive region. The second opening is filled with a conductive plug wherein the conductive plug contacts the isolated conductive region. The second conductive region is etched to form a movable finger over the isolated conductive region. A portion of the insulating layer under the movable finger is removed.

Abstract: A capped micro-electro-mechanical systems (MEMS) device is formed using a device wafer and a cap wafer. The MEMS device is located on a frontside of the device wafer. A frontside of a cap wafer is attached to the frontside of the device wafer. A first stressor layer having a tensile stress is applied to a backside of the cap wafer after attaching the frontside of the cap wafer to the frontside of the device wafer. The first stressor layer and the cap wafer are patterned to form an opening through the first stressor layer and the cap wafer after applying the first stressor layer. A conductive layer is applied to the backside of the cap wafer, including through the opening to the frontside of the device wafer.

Abstract: A wafer structure (88) includes a device wafer (20) and a cap wafer (60). Semiconductor dies (22) on the device wafer (20) each include a microelectronic device (26) and terminal elements (28, 30). Barriers (36, 52) are positioned in inactive regions (32, 50) of the device wafer (20). The cap wafer (60) is coupled to the device wafer (20) and covers the semiconductor dies (22). Portions (72) of the cap wafer (60) are removed to expose the terminal elements (28, 30). The barriers (36, 52) may be taller than the elements (28, 30) and function to prevent the portions (72) from contacting the terminal elements (28, 30) when the portions (72) are removed. The wafer structure (88) is singulated to form multiple semiconductor devices (89), each device (89) including the microelectronic device (26) covered by a section of the cap wafer (60) and terminal elements (28, 30) exposed from the cap wafer (60).