Abstract: A method for electrically coupling a first wafer with a second wafer is provided. The method includes bonding the first wafer with the second wafer using a bonding material. The method further includes forming an opening in the first wafer in a scribe area of the second wafer to expose a surface of a conductive structure of the second wafer. The method further includes forming a conductive layer overlying the first wafer and the opening in the first wafer such that the conductive layer forms an electrical contact with the conductive structure of the second wafer thereby electrically coupling the first wafer with the second wafer.

Abstract: A method of forming a micro-electromechanical system (MEMS) includes providing a cap substrate, providing a support substrate, depositing a conductive material over the support substrate, patterning the conductive material to form a gap stop and a contact, wherein the gap stop is separated form the contact by an opening, forming a bonding material over the contact and in the opening, wherein the gap stop and the contact prevent the bonding material from extending outside the opening, and attaching the cap substrate to the support substrate by the step of forming the bonding material. In addition, the structure is described.

Abstract: A microelectromechanical systems (MEMS) device (20) includes a polysilicon structural layer (46) having movable microstructures (28) formed therein and suspended above a substrate (22). Isolation trenches (56) extend through the layer (46) such that the microstructures (28) are laterally anchored to the isolation trenches (56). A sacrificial layer (22) is formed overlying the substrate (22), and the structural layer (46) is formed overlying the sacrificial layer (22). The isolation trenches (56) are formed by etching through the polysilicon structural layer (46) and depositing a nitride (72), such as silicon-rich nitride, in the trenches (56). The microstructures (28) are then formed in the structural layer (46), and electrical connections (30) are formed over the isolation trenches (56). The sacrificial layer (22) is subsequently removed to form the MEMS device (20) having the isolated microstructures (28) spaced apart from the substrate (22).

Abstract: A disclosed semiconductor fabrication process includes forming a first bonding structure on a first surface of a cap wafer, forming a second bonding structure on a first surface of a device wafer, and forming a device structure on the device wafer. One or more eutectic flow containment structures are formed on the cap wafer, the device wafer, or both. The flow containment structures may include flow containment micro-cavities (FCMCs) and flow containment micro-levee (FCMLs). The FCMLs may be elongated ridges overlying the first surface of the device wafer and extending substantially parallel to the bonding structure. The FCMLs may include interior FCMLs lying within a perimeter of the bonding structure, exterior FCMLs lying outside of the bonding structure perimeter, or both. When the two wafers are bonded, the FCMLs and FCMCs confine flow of the eutectic material to the region of the bonding structure.

Abstract: A disclosed semiconductor fabrication process includes forming a first bonding structure on a first surface of a cap wafer, forming a second bonding structure on a first surface of a device wafer, and forming a device structure on the device wafer. One or more eutectic flow containment structures are formed on the cap wafer, the device wafer, or both. The flow containment structures may include flow containment micro-cavities (FCMCs) and flow containment micro-levee (FCMLs). The FCMLs may be elongated ridges overlying the first surface of the device wafer and extending substantially parallel to the bonding structure. The FCMLs may include interior FCMLs lying within a perimeter of the bonding structure, exterior FCMLs lying outside of the bonding structure perimeter, or both. When the two wafers are bonded, the FCMLs and FCMCs confine flow of the eutectic material to the region of the bonding structure.

Abstract: Eutectic Flow Containment in a Semiconductor Fabrication Process A disclosed semiconductor fabrication process includes forming a first bonding structure on a first surface of a cap wafer, forming a second bonding structure on a first surface of a device wafer, and forming a device structure on the device wafer. One or more eutectic flow containment structures are formed on the cap wafer, the device wafer, or both. The flow containment structures may include flow containment micro-cavities (FCMCs) and flow containment micro-levee (FCMLs). The FCMLs may be elongated ridges overlying the first surface of the device wafer and extending substantially parallel to the bonding structure. The FCMLs may include interior FCMLs lying within a perimeter of the bonding structure, exterior FCMLs lying outside of the bonding structure perimeter, or both. When the two wafers are bonded, the FCMLs and FCMCs confine flow of the eutectic material to the region of the bonding structure.

Abstract: A microelectromechanical systems (MEMS) device (20) includes a polysilicon structural layer (46) having movable microstructures (28) formed therein and suspended above a substrate (22). Isolation trenches (56) extend through the layer (46) such that the microstructures (28) are laterally anchored to the isolation trenches (56). A sacrificial layer (22) is formed overlying the substrate (22), and the structural layer (46) is formed overlying the sacrificial layer (22). The isolation trenches (56) are formed by etching through the polysilicon structural layer (46) and depositing a nitride (72), such as silicon-rich nitride, in the trenches (56). The microstructures (28) are then formed in the structural layer (46), and electrical connections (30) are formed over the isolation trenches (56). The sacrificial layer (22) is subsequently removed to form the MEMS device (20) having the isolated microstructures (28) spaced apart from the substrate (22).