Abstract: Packaged semiconductor devices are disclosed, comprising: a semiconductor die having a top major surface with a plurality of contact pads thereon, and four sides, wherein the sides are stepped such that a lower portion of each side extends laterally beyond a respective upper portion; encapsulating material encapsulating the top major surface and the upper portion of each of the sides wherein the semiconductor die is exposed at the lower portion of each of the sides; a contact-redistribution structure on the encapsulating material over the top major surface of the semiconductor die; a plurality of metallic studs extending through the encapsulating material, and providing electrical contact between the contact pads and the contact-redistribution structure. Corresponding methods are also disclosed.

Abstract: The present disclosure provides a display substrate, a manufacturing method thereof and a display device. The display substrate includes a base substrate, a plurality of groups of scanning lines extending along a first direction and arranged along a second direction, and a reference signal line extending along the second direction at an end of each scanning line, and an orthogonal projection of the reference signal line onto the base substrate does not overlap with an orthogonal projection of each scanning line onto the base substrate. The scanning lines include a target scanning line for discharging static electricity and including an electrostatic discharge end arranged at a side of the target scanning line close to the reference signal line, the display substrate further includes an electrostatic discharge structure electrically coupled to the electrostatic discharge end and an electrostatic ring and arranged between the electrostatic discharge end and the reference signal line.

Abstract: A lithium nickel manganese oxide core-shell material, comprising a core, composed of a first lithium nickel manganese oxide material; and a shell, covering the core and composed of a second lithium nickel manganese oxide material, wherein the first lithium nickel manganese oxide material and the second lithium nickel manganese oxide material contain manganese and nickel, and the ratio of manganese and nickel in the first lithium nickel manganese oxide material is different from the ratio of manganese and nickel in the second lithium nickel manganese oxide material.

Abstract: An integral ignition structure and a compressed-gas-type fuel gas generator are provided. The integral ignition structure comprises an ignition box, an igniter, and an end cover, wherein the ignition box is open at one end, and has a closed end and an open end opposite to each other; the igniter is provided at the closed end; and the end cover is provided at the open end, and is arranged to form, together with the ignition box, an ignition chamber, wherein at least one flow-through hole for communicating with the ignition chamber is formed in the end cover, an ignition composition is provided in the ignition chamber, the igniter is configured to ignite the ignition composition and generate an inflation gas, and the end cover is further configured to be plastically deformed under effect of a pressure of the inflation gas, so as to increase a volume of the ignition chamber.

Abstract: A method for performing at least one perception task associated with autonomous vehicle control includes receiving a first dataset and identifying a first object category of objects associated with the plurality of images, the first object category including a plurality of object types. The method also includes identifying a current statistical distribution of a first object type of the plurality of object types and determining a first distribution difference between the current statistical distribution of the first object type and a standard statistical distribution associated with the first object category. The method also includes, in response to a determination that the first distribution difference is greater than a threshold, generating first object type data corresponding to the first object type, configuring at least one attribute of the first object type data, and generating a second dataset by augmenting the first dataset using the first object type data.

Abstract: Methods and semiconductor structures are provided. A semiconductor structure according to the present disclosure includes a plurality of transistors, an interconnect structure electrically coupled to the plurality of transistors, a metal feature disposed over the interconnect structure and electrically isolated from the plurality of transistors, an insulation layer disposed over the metal feature, and a first redistribution feature and a second redistribution feature disposed over the insulation layer. A space between the first redistribution feature and the second redistribution feature is disposed directly over at least a portion of the metal feature.

Abstract: A method for manufacturing a semiconductor device includes: forming a first feature and a second feature extending in a normal direction transverse to a substrate; directionally depositing a dielectric material upon the features at an inclined angle relative to the normal direction so as to form a cap layer including a top portion disposed on a top surface of each of the features, and two opposite wall portions extending downwardly from two opposite ends of the top portion to partially cover two opposite lateral surfaces of each of the features, respectively, the cap layer on the first feature being spaced apart from the cap layer on the second feature; forming a sacrificial feature in a recess between the features; forming a sustaining layer to cover the sacrificial feature; and removing the sacrificial feature to form an air gap.

Abstract: A deep learning-based digital holographic continuous phase noise reduction method for microstructure measurement is provided. A MEMS microstructure is simulated to generate an object phase image through generation of random matrix superposition, noise in a digital holographic continuous phase map is simultaneously simulated to generate a noise grayscale image, and a simulation data set is thus created. An end-to-end convolutional neural network is designed, and a trained convolutional neural network is trained and obtained. A holographic interference pattern of an object under measurement is collected by photographing, and after spectrum extraction, angular spectrum diffraction, phase unwrapping, and distortion compensation, a continuous phase map containing only the object phase and noise is obtained and input into the trained convolutional neural network to obtain an object phase map.

Abstract: A key module includes a circuit assembly, a support assembly and a display assembly. The support assembly is movably disposed on the circuit assembly. The display assembly includes a digital display unit. The digital display unit is supported on the circuit assembly by the support assembly, and the digital display unit is electrically connected to the circuit assembly.

Abstract: Disclosed are proteinaceous coagulation factor XIIa (FXIIa) inhibitors and their use for treating or inhibiting the development of a condition in which inhibiting FXIIa stimulates or effects treatment or inhibition of the development of the condition. Suitable conditions include thromboembolism-associated conditions such as acute coronary syndrome, stroke, deep vein thrombosis and pulmonary embolism, a thrombosis, a thrombosis-associated hematologic disorder such as sickle cell disease or thrombophilia, and an inflammatory condition or a condition related to the kallikrein-kinin system such as hereditary angioedema, multiple sclerosis, rheumatoid arthritis or lupus. The proteinaceous FXIIa inhibitors are also useful for treating or inhibiting thrombus and/or embolus formation. In vitro methods for identifying a disulfide rich peptide which binds to a target substance are also disclosed.

Abstract: The application provides a floating structure for mooring a vessel in a water body, comprising a hull having a plurality of dampers disposed on lateral sides or corners of the hull, a plurality of piles erected in the water body around a periphery of the hull, wherein each of the piles comprises a guiding plate having one or more guiding surfaces for coupling to at least one damper, one or more auxiliary piles connected to the pile by truss structure and partially embedded in the water body, the hull is vertically slidably coupled to a plurality of piles by slidably coupling the dampers to corresponding guiding surfaces of the guiding plate on the piles. The application also provides a plurality of floating structures linked to form a water-based hub serving as a novel nearshore logistics anchorage hub.

Abstract: An organic light-emitting diode (OLED) display may have an array of organic light-emitting diode pixels that each have OLED layers interposed between a cathode and an anode. Voltage may be applied to the anode of each pixel to control the magnitude of emitted light. The conductivity of the OLED layers may allow leakage current to pass between neighboring anodes in the display. To reduce leakage current and the accompanying cross-talk in a display, the pixel definition layer may disrupt continuity of the OLED layers. The pixel definition layer may have an undercut to disrupt continuity of some but not all of the OLED layers. The undercut may be defined by three discrete portions of the pixel definition layer. The undercut may result in a void that is interposed between different portions of the OLED layers to break a leakage path formed by the OLED layers.

Abstract: An integrated circuit includes first through fourth devices positioned over one or more substrates, a first radio frequency interconnect (RFI) including a first transmitter included in the first device, a first receiver included in the second device, and a first guided transmission medium coupled to each of the first transmitter and the first receiver, a second RFI including a second transmitter included in the first device, a second receiver included in the third device, and a second guided transmission medium coupled to each of the second transmitter and the second receiver, and a third RFI including a third transmitter included in the first device, a third receiver included in the fourth device, and the second guided transmission medium coupled to each of the third transmitter and the third receiver.

Abstract: An electronic device is provided. The electronic device includes a first substrate, a second substrate, a first transistor and a second transistor. The second substrate is disposed on the first substrate. The first transistor is disposed on the first substrate and includes a first semiconductor layer. The second transistor is disposed on the second substrate and includes a second semiconductor layer. The first semiconductor layer includes a first channel. The second semiconductor layer includes a second channel. The width-to-length ratio of the first channel is different from the width-to-length ratio of the second channel.

Abstract: Methods and semiconductor structures are provided. A semiconductor structure according to the present disclosure includes a plurality of transistors, an interconnect structure electrically coupled to the plurality of transistors, a metal feature disposed over the interconnect structure and electrically isolated from the plurality of transistors, an insulation layer disposed over the metal feature, and a first redistribution feature and a second redistribution feature disposed over the insulation layer. A space between the first redistribution feature and the second redistribution feature is disposed directly over at least a portion of the metal feature.

Abstract: Packaged semiconductor devices are disclosed, comprising: a semiconductor die having a top major surface with a plurality of contact pads thereon, and four sides, wherein the sides are stepped such that a lower portion of each side extends laterally beyond a respective upper portion; encapsulating material encapsulating the top major surface and the upper portion of each of the sides wherein the semiconductor die is exposed at the lower portion of each of the sides; a contact-redistribution structure on the encapsulating material over the top major surface of the semiconductor die; a plurality of metallic studs extending through the encapsulating material, and providing electrical contact between the contact pads and the contact-redistribution structure. Corresponding methods are also disclosed.

Abstract: Provided is a display substrate, including: a base, a first signal line, a second signal line, and a first electrode. The first signal line, the second signal line and the first electrode are located on the base and sequentially arranged away from the base, and are insulated from each other; orthographic projections of the first signal line and the second signal line on the base at least partially overlap, an orthographic projection of the first electrode partially overlaps with an overlapping region in which the orthographic projections of the first signal line and the second signal line on the base overlap; an opening is provided in at least a partial region of the first electrode, with the orthographic projection thereof on the base overlaps with the overlapping region in which the orthographic projections of the first signal line and the second signal line on the base overlap with each other.

Abstract: In a digital holographic wrapped phase aberration compensation method based on deep learning, a random Zernike polynomial coefficient and a corresponding wrapped phase map are generated by a computer and are respectively treated as a learning label and a network to train a neural network model. A digital holographic optical setup is built to record a hologram of a sample to be measured, the wrapped phase map is inputted into the trained neural network model after numerical reconstruction, and the Zernike polynomial coefficient is outputted to reconstruct a phase aberration distribution and to compensate complex amplitude in a spatial domain. Phase filtering and unwrapping are performed on the compensated wrapped phase map, and Zernike polynomial fitting based on background segmentation is performed on the unwrapped phase to compensate for residual aberration.

Abstract: A method for manufacturing a semiconductor device includes: forming a first feature and a second feature extending in a normal direction transverse to a substrate; directionally depositing a dielectric material upon the features at an inclined angle relative to the normal direction so as to form a cap layer including a top portion disposed on a top surface of each of the features, and two opposite wall portions extending downwardly from two opposite ends of the top portion to partially cover two opposite lateral surfaces of each of the features, respectively, the cap layer on the first feature being spaced apart from the cap layer on the second feature; forming a sacrificial feature in a recess between the features; forming a sustaining layer to cover the sacrificial feature; and removing the sacrificial feature to form an air gap.