Abstract: A display substrate and a display device are provided. In the display substrate, the shift register unit includes a charge pump circuit, the charge pump circuit includes a first capacitor and a first transistor, and the charge pump circuit is electrically connected with a first input node and a first node, respectively; a first electrode plate of the first capacitor is connected with the first clock signal line, a second electrode plate of the first capacitor is connected with the first input node, a gate electrode of the first transistor is connected with a first electrode of the first transistor, a second electrode plate of the first capacitor is provided with a first portion, and the first portion of the second electrode plate of the first capacitor and the gate electrode of the first transistor have an integral structure.

Abstract: The display panel includes a plurality of rows and a plurality of columns of pixel circuits, a plurality of rows of gate lines, a plurality rows of reset control lines, and a plurality of columns of data lines, a same row of pixel circuits corresponds to two rows of gate lines, and one/the other row of gate line is electrically connected to odd/even-numbered columns of pixel circuits in the row of pixel circuits, and provides a corresponding gate driving signal for the odd/even-numbered columns of pixel circuits; a same column of pixel circuits corresponds to two columns of data lines, and one/the other column of data line of the two columns of data lines is electrically connected to odd/even-numbered rows of pixel circuits, and provides a corresponding data voltage for the odd/even-numbered rows of pixel circuits.

Abstract: The present disclosure relates to an array substrate and a display device. The array substrate includes a plurality of pixel units arranged in an array, each of the pixel units including a plurality of sub-pixels. The array substrate includes: a plurality of power lines which are arranged in a conductive layer on a base substrate, are arranged at intervals along a first direction and extend along a second direction, and are used for providing power signals to the sub-pixels; and a plurality of power leads which are arranged in another conductive layer, are arranged at intervals along the second direction and extend along the first direction. Projections of at least one of the power lines and at least one of the power leads on the base substrate intersect, and the projections of the power lines and the power leads on the base substrate form a grid-like structure.

Abstract: The embodiments of the present disclosure provides a display substrate, including: an active region and a peripheral region, the active region is provided therein with a plurality of pixel units arranged in an array, all the pixel units are divided into n pixel unit groups, the peripheral region is provided therein with a driver block including a first gate drive circuit having n+x first signal output terminals configured to sequentially output first gate drive signals in an active level and the first gate line provided for an ith pixel unit group is electrically connected to a (i+x)th first signal output terminal, and the reset signal line provided for the ith pixel unit group is electrically connected to an ith first signal output terminal, with i being a positive integer and i?n.

Abstract: A display substrate includes a base substrate, including a display region; multiple sub-pixels including first sub-pixels and second sub-pixels adjacent along a first direction, located in the display region, each including a pixel circuit structure; a light-shielding layer, located between the pixel circuit structure and the base substrate, provided with a light transmission hole; a first initialization signal line and a light emitting control signal line extending along the first direction; a first power supply line, extending along a second direction; a first data line, extending along the second direction, connected with the pixel circuit structure of the first sub-pixel; and a second data line, extending along the second direction, connected with the pixel circuit structure of the second sub-pixel; the hole is located within a region enclosed by the first power supply line, the second data line, the light emitting control signal line, and the first initialization signal line.

Abstract: A display panel includes an array substrate and an encapsulation layer encapsulated on a surface of the array substrate. The display panel further includes a stretching area located in a corner area of the display panel and at least partially located in a display area of the display panel, and the stretching area is provided with a hollow opening penetrating through the array substrate and the encapsulation layer.

Abstract: A display panel includes: a substrate; at least one first signal line disposed on the substrate and located in a peripheral region; at least one second signal line disposed on the substrate and located in the peripheral region; an insulating layer covering the at least one first signal line and the at least one second signal line; and a shielding signal line covering the at least one groove. The at least one second signal line and the at least one first signal line are arranged in a same layer. A surface of the insulating layer away from the substrate has at least one groove. An orthogonal projection, on the substrate, of a bottom surface of a groove is located between orthogonal projections, on the substrate, of a first signal line and a second signal line.

Abstract: The present disclosure relates to an array substrate and a display device. The array substrate includes a plurality of pixel units arranged in an array, each of the pixel units including a plurality of sub-pixels. The array substrate includes: a plurality of power lines which are arranged in a conductive layer on a base substrate, are arranged at intervals along a first direction and extend along a second direction, and are used for providing power signals to the sub-pixels; and a plurality of power leads which are arranged in another conductive layer, are arranged at intervals along the second direction and extend along the first direction. Projections of at least one of the power lines and at least one of the power leads on the base substrate intersect, and the projections of the power lines and the power leads on the base substrate form a grid-like structure.

Abstract: The source, drain and gate of the drive transistor of the pixel drive circuit are respectively connected to the first node, the second node and the third node. The storage capacitor is connected to the third node. The first control unit is used for enabling a path between the second node and the fourth node in response to the first control signal. The second control unit is used for outputting the first power supply voltage to the first node in response to the light-emitting signal. The threshold compensation transistor is used for enabling a path between the second node and the third node in response to the second control signal. The material of the active region is a metal oxide semiconductor.

Abstract: A display substrate and a display device are disclosed. The display substrate includes: a transition region, located between a first display region and a second display region, the first display region, the second display region and the transition region are provided with a plurality of pixels, the plurality of pixels are arranged in an array in the first direction and a second direction intersecting with the first direction, a pixel per inch (PPI) of the first display region is greater than a PPI of the second display region and a PPI of the transition region, the transition region is further provided with a row driving circuit, the row driving circuit is configured to drive the plurality of pixels in the first display region, the second display region and the transition region by rows.

Abstract: A display panel and a display device are provided. The display panel has a display area. The display panel includes: a base substrate; a driving circuit and at least one signal line on the base substrate; and at least one insulating layer between the driving circuit and the at least one signal line. The driving circuit is disposed in a periphery of the display area; and an orthogonal projection of at least one of the signal lines on the base substrate has an overlapping area with an orthogonal projection of the driving circuit on the base substrate.

Abstract: Disclosed are a display panel and a display device. In the display panel, an orthographic projection of the blocker on the base substrate at least partially overlaps with an orthographic projection of the conductive connection portion on the base substrate; an orthographic projection of the first conductive structure on the base substrate at least partially overlaps with the orthographic projection of the blocker on the base substrate; an area of an orthographic projection of a portion of the blocker overlapping with the first conductive structure on the base substrate is larger than an area of an orthographic projection of a portion of the blocker overlapping with the conductive connection portion on the base substrate, and an orthographic projection of the shielding portion on the base substrate at least partially overlaps with the orthographic projection of the first conductive structure on the base substrate.

Abstract: A flexible array substrate includes at least one stretchable region; wherein the flexible array substrate is provided with a plurality of through holes within the stretchable region, and the plurality of through holes divide the stretchable region into a pixel island area for displaying and a bridging area for signal transmission; the bridging area includes a source-drain bridging area. The flexible array substrate, in the source-drain bridging area, includes: a base substrate, a first source-drain metal layer, a first insulating material layer, a second source-drain metal layer, a second insulating material layer, and an encapsulation layer that are sequentially stacked.

Abstract: A display substrate, a manufacturing method thereof, and a display device are provided. The display substrate includes: a non-stretchable display region and a stretchable display region. The stretchable display region includes multiple island regions in an array and separated from each other, and multiple bridge regions connecting adjacent island regions, a pixel unit is arranged on each of the island regions, the pixel unit includes at least one pixel, and a signal wire electrically connecting the pixels is arranged on each bridge region. A pixel pitch between the pixels in the pixel unit in a stretching direction is a reference pitch P0, a pitch between two adjacent pixel units in the stretching direction is a first pitch P1, and the first pitch P1 is less than the reference pitch P0.

Abstract: Disclosed are a display panel and a display device. The display panel includes: a pixel unit, including a pixel circuit and a light-emitting element, the pixel circuit includes a driving transistor and a threshold compensation transistor; a first power line configured to supply a first power supply voltage to the pixel circuit; a blocker, electrically connected with the first power line; and a first conductive structure, connected with the gate electrode of the driving transistor, the first channel and the second channel of the threshold compensation transistor are connected by a conductive connection portion; an area of an orthographic projection of a portion of the blocker overlapping with the first conductive structure on the base substrate is larger than an area of an orthographic projection of a portion of the blocker overlapping with the conductive connection portion on the base substrate.

Abstract: The present disclosure provides an array substrate and a display device. The array substrate includes a plurality of initialization signal lines and a plurality of connection lines. The initialization signal lines are arranged in a first conductive layer, extend along a first direction and are arranged at intervals along a second direction; the connection lines are arranged in a second conductive layer, extend along the second direction and are arranged at intervals along the first direction; the first conductive layer and the second conductive layer are an identical layer or different layers; projections of at least one of the initialization signal lines and at least one of the connection lines on the base substrate are intersected and electrically connected, such that the projections of the initialization signal lines and the connection lines on the base substrate form a grid structure.

Abstract: A display substrate and a display device are provided. In the display substrate, the shift register unit includes a charge pump circuit, the charge pump circuit includes a first capacitor and a first transistor, and the charge pump circuit is electrically connected with a first input node and a first node, respectively; a first electrode plate of the first capacitor is connected with the first clock signal line, a second electrode plate of the first capacitor is connected with the first input node, a gate electrode of the first transistor is connected with a first electrode of the first transistor, a second electrode plate of the first capacitor is provided with a first portion, and the first portion of the second electrode plate of the first capacitor and the gate electrode of the first transistor have an integral structure.

Abstract: A display substrate includes a base, and first data lines, second data lines, a plurality of sub-pixels and voltage signal lines disposed on the base. The first data lines and the second data lines are alternately arranged in a first direction. Each column of sub-pixels includes first sub-pixels and second sub-pixels that are alternately arranged in a second direction. In the column of sub-pixels, the first sub-pixels are electrically connected to a first data line located on a side of the column of sub-pixels and adjacent thereto, and the second sub-pixels are electrically connected to a second data line located on another side of the column of sub-pixels and adjacent thereto. An orthogonal projection of each voltage signal line on the base is located between orthogonal projections of a first data line and a second data line between two adjacent columns of sub-pixels on the base.

Abstract: Disclosed are a display substrate and a preparation method thereof, and a display apparatus. The display substrate includes a substrate and a plurality of sub-pixels, at least one sub-pixel includes a pixel drive circuit and a light emitting device connected to the pixel drive circuit, the pixel drive circuit includes a plurality of transistors, wherein at least one transistor includes an active layer and two gate electrodes. The substrate is provided with a semiconductor layer and a plurality of conductive layers disposed on one side of the semiconductor layer away from the substrate, at least one conductive layer is provided with at least one electrode plate, and there is an overlapping region between an orthographic projection of the electrode plate on the substrate and an orthographic projection of the active layer between the two gate electrodes on the substrate.

Abstract: Aspects of the present disclosure include methods, apparatuses, and computer readable media for determining a connected mode discontinuous reception (C-DRX) short cycle value, transmitting a C-DRX short cycle request to a base station, the C-DRX short cycle request including the C-DRX short cycle value, receiving a first confirmation indicating the base station accepting the C-DRX short cycle value associated with the C-DRX short cycle request, determining an averaging window value based on the C-DRX short cycle value, transmitting an averaging window request to the base station, the averaging window request including the averaging window value, receiving a second confirmation indicating the base station accepting the averaging window value associated with the averaging window request, and communicating with the base station based on the C-DRX short cycle value and the averaging window value.