Abstract: A battery pack, a vehicle, and an energy storage device are provided. The battery pack includes a cell array and a support member, where the cell array includes a plurality of cells, the cell has a first dimension, and the first dimension is a maximum spacing between two imaginary parallel planes sandwiching the cell; and at least one of the cells 600 mm?first dimension?2500 mm the at least one cell includes a casing and a core located inside the casing, a supporting region is formed on the casing, and the cell is connected to the support member through the supporting region and is supported by the support member. The support member is connected to the supporting region to support the cell.

Abstract: A power battery pack includes: a pack body; a plurality of cells, disposed in the pack body; the cell having a length L0, a width H0, and a thickness D0, where at least one cell meets: L0>H0?D0, a length direction of the cell is arranged along a width direction of a vehicle body of the electric vehicle, and in the width direction of the electric vehicle, the length L0 of the cell and a size W of the vehicle body of the electric vehicle in the width direction meet: 46%?L0/W?76%; or at least one cell meets: L0>H0?D0, a length direction of the cell is arranged along a length direction of a vehicle body of the electric vehicle, and in the length direction of the electric vehicle, the length L0 of the cell and a size X of the vehicle body of the electric vehicle in the length direction meet: 40%?L0/W?76%.

Abstract: A mechanical apparatus levelling mechanism has a base (10), an adjusting screw rod (20), an adjusting plate (30) and a support plate (40). The adjusting screw rod penetrates into the adjusting plate in an axial direction and is connected to the base. The adjusting plate is located on the base; the support plate is mounted at a top end of the adjusting screw rod and is located above the adjusting plate; and the adjusting plate rotates to drive the adjusting screw rod to rotate, such that the support plate is adjusted vertically. This simplifies the operation procedure, improving the assembly accuracy and improving the working efficiency. The method is simple to operate. These adjusting mechanisms are convenient to move and simple to adjust, are time-saving and labour-saving, and have adjustment dimensions that can be quantified. Moreover, the installation is simple, and the adjusting mechanisms themselves can be reused.

Abstract: The present invention relates to the field of inland vessel identification and ranging technology, and discloses a method, system, medium, equipment and terminal for identifying and ranging inland vessels. In the stage of vessel identification, based on the classical YOLO-V4 network model, the MobileNetV1 network is used to replace the feature extraction network CSPDarknet53 of the YOLO-V4 model; In the stage of vessel ranging, a binocular stereo vision ranging model is established, and the FSRCNN is used for super-resolution reconstruction of the original image pairs to enhance the vessel feature information; the ORB algorithm is used to achieve feature detection and matching at the sub-pixel level to obtain the parallax value between image pairs, and the depth information of the vessel target is obtained by triangulation principle and coordinate conversion.

Abstract: This application provides a current collecting member, a secondary battery, and a fabrication method. The secondary battery includes an electrode assembly, a housing, a top cover assembly and current collecting members. The electrode assembly includes a main body portion and a first tab extending from an end of the main body portion along a transverse direction. The top cover assembly includes a top cover plate and a first electrode terminal disposed on the top cover plate connected to the housing. The current collecting member is connected to the first tab and the first electrode terminal. The current collecting member includes a substrate and a support plate, the substrate being provided at a side of the main body portion along a transverse direction, the support plate extending from an end part of the substrate in a longitudinal direction, and the first tab being connected to the support plate.

Abstract: An amphibious robot includes a housing including a first shell and a second shell and having a first configuration and a second configuration, a rack disposed in an inner cavity of the housing, a telescopic assembly disposed on the rack and connected between the first shell and the second shell, and a rotary wing assembly disposed on the rack and having a folded configuration and a flight configuration. The rotary wing assembly includes: a folding arm with one end rotatably connected to the rack, a rotary wing, and a tilting arm connected between the rotary wing and the folding arm, the tilting arm and the rotary wing are extended to an outside of the housing to be adapted to drive the robot to fly in the flight configuration, and the tilting arm is rotatable relative to the folding arm to adjust a rotation direction of the rotary wing.

Abstract: An optical module has an optical port and an electrical port, and includes a shell, a circuit board, a circuit adapter board, a silicon optical chip, a light source and an optical fiber socket. The circuit board is disposed in the shell. One end of the circuit board is provided with a connecting finger located in the electrical port. The circuit adapter board is disposed on and electrically connected to the circuit board. A thermal expansion coefficient of the circuit adapter board is lower than that of the circuit board. The silicon optical chip is disposed on and electrically connected to the circuit adapter board. The light source is disposed on the circuit board, is electrically connected to the circuit board, and is optically connected to the silicon optical chip. The optical fiber socket is optically connected to the silicon optical chip, and is configured to form the optical port.

Abstract: This application discloses network congestion control methods and apparatuses. In an implementation, a method comprises: obtaining, by the an intelligent network interface card comprised in a network congestion control apparatus, at least two types of traffic. Identifying, by the intelligent network interface card, algorithm matching features of the at least two types of traffic, and in response to determining to perform congestion control on one type of traffic of the at least two types of traffic, determining, by the intelligent network interface card, a congestion control algorithm that matches an algorithm matching feature of the one type of traffic. Performing, by the intelligent network interface card, congestion control on the one type of traffic according to the congestion control algorithm that matches the algorithm matching feature of the one type of traffic.

Abstract: The technology described herein is directed to methods of determining oligonucleotide sequences, e.g. by enriching target sequences prior to sequencing the sequences.

Abstract: Disclosed is a nonlinear optimization method for parameters of ocean ecological dynamics model, comprising the following steps: acquiring a state variable set and a parameter set to be optimized; building an ocean ecological dynamics model; acquiring a final cost function equation group; solving the ocean ecological dynamics model to obtain numerical solutions of each state variable; acquiring a Hamilton function of the cost function equation group under a constraint condition, and acquiring an adjoint equation based on the Hamilton function; adjusting the parameter set to be optimized based on the adjoint equation to obtain an optimal parameter set.

Abstract: The present invention relates to a hardware accelerator for hypergraph processing and its operating method, the hardware accelerator comprising: a data loader: for, in the presence of a data-centric load-trigger-reduce execution model, reading hypergraph partition data from an off-chip memory successively according to hypergraph data structure and an order of hypergraph partitions; an address translator, for deploying the hypergraph data into a private register of a processor and/or into a buffer memory according to a priority level of loaded data, and recording corresponding offset information; a task trigger, for generating computing tasks according to the loaded data, and scheduling the computing tasks into the processor; the processor, for receiving and executing the computing tasks; a reducer, for scheduling intermediate results into a first-priority-data reducer unit or a second-priority-data reducer unit depending on the priority level of the data so as to execute a reducing operation for the intermedi

Abstract: The present invention relates to a dynamic memory management apparatus and method for HLS, the apparatus at least comprising: several searching and caching modules and several modifying and writing-back modules, wherein the searching and caching modules are in connection with a DRAM storing module and a BRAM buffer, respectively, and the modifying and writing-back modules are in connection with the DRAM storing module and the BRAM buffer, respectively, wherein the BRAM buffer is for caching information about nodes on a search path and registering information about modification made to the nodes; the searching and caching module is for reading node data from the DRAM storing module according to received operators and node addresses, and writing the node data into the BRAM buffer; and the modifying and writing-back module reads the node data from the BRAM buffer and writes the node data back into the DRAM storing module.

Abstract: An optical module includes a circuit board, a circuit sub-board, a signal processing chip, a first light transceiver assembly, and a second light transceiver assembly. The circuit board is configured to be electrically connected to an outside of the optical module. The circuit sub-board is disposed on the circuit board and electrically connected to the circuit board. The circuit sub-board includes a first body and a connecting hole. The connecting hole runs through an upper surface and a lower surface of the first body. The signal processing chip is disposed on the circuit sub-board. The first light transceiver assembly is disposed on the circuit board and located in the connecting hole. The second light transceiver assembly is disposed on the circuit board and located outside the connecting hole.

Abstract: Provided herein are antibodies and chimeric antigen receptor (CAR) cells comprising the antigen binding domains of these antibodies. Also provided are compositions comprising the same, vector or plasmid encoding the antibodies and CARs, and methods for producing the same, or using the same for detecting or treating cancer and kits for carrying out said methods.

Abstract: An optical module includes a circuit board, a substrate, a laser assembly, and a silicon photonic chip. The silicon photonic chip is electrically connected to the circuit board through the substrate so as to ground the silicon photonic chip. The substrate includes a body, a first support step, and a second support step. The first support step is disposed at an end of the body. The second support step is disposed at another end of the body. The circuit board includes a first metal layer and a second metal layer. The first metal layer is disposed on a surface of the circuit board proximate to the first support step and is electrically connected to the first support step. The second metal layer is disposed on a surface of the circuit board proximate to the second support step and is electrically connected to the second support step.

Abstract: The present disclosure describes techniques of editing a video. The techniques described in the present disclosure comprise converting a to-be-edited video comprising a plurality of frames into an image sequence comprising a plurality of images, wherein a resolution of each image in the image sequence is lower than a resolution of a corresponding frame in the to-be-edited video; generating a script of editing the to-be-edited video based at least in part on selecting and editing at least some of the plurality of images in the image sequence; displaying a preview of editing effects based on the script; and sending the script to a server computing device in response to determining the preview satisfies requirements, wherein the to-be-edited video is processed by the server computing device based on the script of editing the to-be edited video.

Abstract: The present invention relates to compositions and methods of use of anti-ADAMTS13 autoantibodies and fragments thereof. In one aspect, the invention includes a composition comprising an isolated anti-ADAMTS13 autoantibody or fragment thereof. In other aspects, methods are described for generating an in vivo model of thrombotic thrombocytopenic purpura (TTP) comprising introducing at least one anti-ADAMTS13 autoantibody or fragment thereof into a model organism and identifying an anti-autoimmune reagent for treating TTP.

Abstract: A deep learning heterogeneous computing method based on layer-wide memory allocation, at least comprises steps of: traversing a neural network model so as to acquire a training operational sequence and a number of layers L thereof; calculating a memory room R1 required by data involved in operation at the ith layer of the neural network model under a double-buffer configuration, where 1?i?L; altering a layer structure of the ith layer and updating the training operational sequence; distributing all the data across a memory room of the CPU and the memory room of the GPU according to a data placement method; performing iterative computation at each said layer successively based on the training operational sequence so as to complete neural network training.

Abstract: The present invention relates to an optimization method for graph processing based on heterogeneous FPGA data streams. The method can balance processing loads between the CPU processing module and the FPGA processing module during acceleration of graph data processing.

Abstract: A system for streaming data items of a streaming application via a Vertical Cuckoo Filter (VCF), including: one or more computers communicating with a provider via a network; wherein the one or more computers includes: a processor; and a storage device coupled to the processor, wherein the storage device is configured to store the VCF, an insert module, a lookup module, and a delete module, the VCF includes buckets with one or more slots and includes at least two bitmasks, the insert module is configured to perform an insert operation of a first fingerprint of a first item from the provider on the VCF, the lookup module is configured to perform a lookup operation of a second fingerprint of a second item from the provider on the VCF, the delete module is configured to perform a delete operation of a third fingerprint of a third item from the VCF.