Patents by Inventor Long Zheng
Long Zheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12292609Abstract: An optical module including a circuit board, a circuit adapter board disposed on and electrically connected to the circuit board, a silicon optical chip disposed on and electrically connected to the circuit adapter board, an optical fiber socket optically connected to the silicon optical chip through a first optical fiber ribbon, and a light source disposed on and electrically connected to the circuit board and optically connected to the silicon optical chip through a second optical fiber ribbon; wherein a thermal expansion coefficient of the circuit adapter board is lower than that of the circuit board, the silicon optical chip is provided with optical waveguide end facet on a side thereof configured to be butted with the first optical fiber ribbon and the second optical fiber ribbon, and the circuit adapter board has a notch on a side thereof proximate to the optical waveguide end facets.Type: GrantFiled: February 13, 2024Date of Patent: May 6, 2025Assignee: HISENSE BROADBAND MULTIMEDIA TECHNOLOGIES CO., LTD.Inventors: Long Zheng, Sigeng Yang
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Publication number: 20250138251Abstract: This optical module provided by the present disclosure includes an optical component, an optical fiber adapter, an optical cable plug, an anti-unlocking component and an unlocking component. The optical cable plug includes a base and a sleeve. The base is inserted into the optical fiber adapter, and a limiting groove is formed on it; the sleeve is slidably sleeved on the base; the optical cable plug and the optical fiber adapter can be locked or disassembled by moving the sleeve. The anti-unlocking component is arranged on the optical cable plug and is formed therein with a locking mechanism, and the locking mechanism is embedded in the limiting groove to lock and limit the sleeve.Type: ApplicationFiled: December 27, 2024Publication date: May 1, 2025Applicant: HISENSE BROADBAND MULTIMEDIA TECHNOLOGIES CO., LTD.Inventors: Sigeng YANG, Long ZHENG, Fabu XU
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Publication number: 20250093598Abstract: An optical module including: a circuit board; an optical emission component including an emission base embedded in a mounting hole of the circuit board, a light emitting assembly disposed on the emission base and connected to the circuit board through wire bonding to generate 2N paths of optical signals, wherein N?1, and a collimating lens group located in output optical path of the light emitting assembly; a first optical reception component disposed on the circuit board to receive N paths of optical signals; a second optical reception component disposed on the circuit board to receive N paths of optical signals; an optical transmission assembly comprising a first optical fiber connected to the optical emission component, a second optical fiber connected to the first optical reception component, and a third optical fiber connected to the second optical reception component.Type: ApplicationFiled: September 26, 2024Publication date: March 20, 2025Applicant: HISENSE BROADBAND MULTIMEDIA TECHNOLOGIES CO., LTD.Inventors: Wanju Sun, Long Zheng, Feng Cui, Fabu Xu
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Patent number: 12189950Abstract: The present invention relates to a dynamic memory management apparatus and method for HLS, the apparatus has several searching and caching modules and several modifying and writing-back modules, the searching and caching modules are in connection with a DRAM storing module and a BRAM buffer, respectively, and the modifying and writing-back modules are in connection with the DRAM storing module and the BRAM buffer, respectively, the BRAM buffer is for caching information about nodes on a search path and registering information about modification made to the nodes. To remedy the defect that the traditional operating system is directly transplanted to the FPGA and has low execution efficiency, the present invention utilizes the advantage of the large capacity of the DRAM on the FPGA to realize efficient dynamic memory allocation and deallocation, and improve the usability and code reusability of HLS.Type: GrantFiled: December 22, 2022Date of Patent: January 7, 2025Assignees: Huazhong University Of Science And Technology, Zhejiang LabInventors: Long Zheng, Qinggang Wang, Xiaofei Liao, Zhaozeng An, Hai Jin
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Publication number: 20240402428Abstract: An optical module includes a circuit board and a silicon optical chip. The circuit board includes a plurality of circuit board bonding pads. The silicon optical chip includes a plurality of chip bonding pads corresponding to the plurality of circuit board bonding pads. The plurality of chip bonding pads are electrically connected to the corresponding circuit board bonding pads, so that the silicon optical chip is electrically connected to the circuit board. A chip bonding pad is electrically connected to at least one corresponding circuit board bonding pad through a plurality of bonding wires, or a circuit board bonding pad is electrically connected to at least one corresponding chip bonding pad through a plurality of bonding wires. The plurality of bonding wires have different heights, with an angle formed between bonding wires with different heights.Type: ApplicationFiled: August 14, 2024Publication date: December 5, 2024Applicant: HISENSE BROADBAND MULTIMEDIA TECHNOLOGIES CO., LTD.Inventors: Long ZHENG, Sigeng YANG
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Publication number: 20240404642Abstract: A method, a device and a medium for genome graph analysis based on in-memory computing. The method comprises the following steps: firstly, combining a linear reference genome with genetic variation to construct a genome graph; then, generating indexes for a plurality of vertices of the genome graph, and constructing an index table according to the generated indexes; then dividing the read length into a plurality of substrings with the length of k-mer, and querying the index table to obtain a seed position, generating a reference subgraph according to the seed position, and identifying a candidate mapping position according to the reference subgraph to filter a candidate mapping area; finally, using a PUM mode to run approximate string matching between the read length and all unfiltered candidate mapping positions, so as to complete the optimal alignment of a reference gene sequence and a query gene sequence.Type: ApplicationFiled: September 4, 2023Publication date: December 5, 2024Inventors: Long ZHENG, Yu HUANG, Wei ZHOU
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Patent number: 12158626Abstract: An optical module includes a shell, a circuit board, a light source, and a silicon optical chip. The circuit board is located in the shell, a hollow portion is provided in the circuit board, and the hollow portion penetrates the circuit board. The light source includes at least one laser assembly, and the at least one laser assembly is mounted on the shell and is located in the hollow portion, and the at least one laser assembly is electrically connected to the circuit board. The silicon optical chip is mounted on the shell and is located in the hollow portion. The silicon optical chip is electrically connected to the circuit board and is connected to the light source.Type: GrantFiled: June 30, 2021Date of Patent: December 3, 2024Assignee: HISENSE BROADBAND MULTIMEDIA TECHNOLOGIES CO., LTD.Inventors: Long Zheng, Sigeng Yang
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Patent number: 12113993Abstract: The present disclosure describes techniques of processing video. The techniques comprise obtaining a video to be transcoded, the video comprising a plurality of frames; setting a test object in each of the plurality of frames of the video to be transcoded; transcoding the video using a predetermined video transcoding mechanism and obtaining the transcoded video; extracting a test object from each of a plurality of frames of the transcoded video; and determining a transcoding result based at least in part on the test object extracted from each of the plurality of frames of the transcoded video.Type: GrantFiled: December 9, 2021Date of Patent: October 8, 2024Assignee: SHANGHAI BILIBILI TECHNOLOGY CO., LTD.Inventors: Ran Tang, Yi Wang, Long Zheng, Jun He
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Publication number: 20240330369Abstract: A method for incremental metapath storage and dynamic maintenance is provided, which includes, reformatting metapath instances, from a designated heterogeneous graph and of a designated metapath type, into path graphs; executing graph updating tasks and performing dynamic maintenance on the updated path graphs, traversing the path graph to obtain the location of metapath updates and update the path graph; for metapaths with length greater than 2 and with symmetrical central portion, central merge operation is performed to simplify path graph and perform subsequent restoration operation; and directly perform restoration operation on path graphs that do not meet the merging conditions. The present disclosure utilizes characteristics of graph update to obtain locality of metapath updates, and combines internal relationship characteristics of metapath instances to greatly speed up metapath generation and achieve real-time inference of dynamic heterogeneous graph models.Type: ApplicationFiled: March 20, 2024Publication date: October 3, 2024Inventors: Long ZHENG, Haiheng HE, Xiaofei LIAO, Hai JIN, Dan CHEN, Yu HUANG
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Patent number: 12085753Abstract: An optical module includes a circuit board and a silicon optical chip. The circuit board includes a plurality of circuit board bonding pads. The silicon optical chip includes a plurality of chip bonding pads corresponding to the plurality of circuit board bonding pads. The plurality of chip bonding pads are electrically connected to the corresponding circuit board bonding pads, so that the silicon optical chip is electrically connected to the circuit board. A chip bonding pad is electrically connected to at least one corresponding circuit board bonding pad through a plurality of bonding wires, or a circuit board bonding pad is electrically connected to at least one corresponding chip bonding pad through a plurality of bonding wires. A connecting line of two or more of bonding positions of the plurality of bonding wires on the circuit board bonding pads is inclined with respect to a connecting line of centers of the circuit board bonding pads.Type: GrantFiled: September 22, 2021Date of Patent: September 10, 2024Assignee: HISENSE BROADBAND MULTIMEDIA TECHNOLOGIES CO., LTD.Inventors: Long Zheng, Sigeng Yang
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Patent number: 12078174Abstract: Provided is a scroll compressor, comprising a compression mechanism and a valve assembly. The compression mechanism is provided with a vent, and the valve assembly is used for selectively opening and closing the vent. The valve assembly comprises a valve plate and at least one valve piece. The valve plate comprises at least one valve orifice; and the valve piece is configured to selectively open and close the valve orifice. The scroll compressor further comprises a guide passageway. The guide passageway is provided with a first port communicating with the valve orifice and a second port communicating with the exhaust opening. The valve assembly and the compressor can significantly prolong the service life of the valve piece, and can provide good guidance for a fluid discharged from the compression mechanism, thereby significantly reducing the resistance of venting and the fluid pressure drop, and improving the effect of venting.Type: GrantFiled: November 29, 2019Date of Patent: September 3, 2024Assignee: Copeland Climate Technologies (Suzhou) Co. Ltd.Inventors: Yonghua Cui, Yong Luo, Long Zheng
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Publication number: 20240220541Abstract: An FPGA-based method and system for accelerating graph construction is provided, the method including: sampling neighborhood of each vertex in stored data and recording a traversal order of the vertices; according to the vertex traversal order, grouping the vertices into blocks and processing them by block-granularity, so as to at least obtain distance values between each two sampled neighbors of vertices in each block; according to the said distance values, updating neighborhoods of the two relevant vertices; and processing all of the blocks, starting a new iteration, until a satisfying precision or a predetermined limit of the number of iterations has been reached.Type: ApplicationFiled: October 30, 2023Publication date: July 4, 2024Inventors: Long ZHENG, Chaoqiang LIU, Xiaofei LIAO, Hai JIN, Yu HUANG, Zhaozeng AN
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Publication number: 20240184068Abstract: An optical module including a circuit board, a circuit adapter board disposed on and electrically connected to the circuit board, a silicon optical chip disposed on and electrically connected to the circuit adapter board, an optical fiber socket optically connected to the silicon optical chip through a first optical fiber ribbon, and a light source disposed on and electrically connected to the circuit board and optically connected to the silicon optical chip through a second optical fiber ribbon; wherein a thermal expansion coefficient of the circuit adapter board is lower than that of the circuit board, the silicon optical chip is provided with optical waveguide end facet on a side thereof configured to be butted with the first optical fiber ribbon and the second optical fiber ribbon, and the circuit adapter board has a notch on a side thereof proximate to the optical waveguide end facets.Type: ApplicationFiled: February 13, 2024Publication date: June 6, 2024Applicant: Hisense Broadband Multimedia Technologies Co., Ltd.Inventors: Long ZHENG, Sigeng YANG
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Publication number: 20240150470Abstract: Provided herein are antibodies and chimeric antigen receptor (CAR) cells comprising the antigen binding domains of these antibodies. Also provided are compositions comprising the same, vector or plasmid encoding the antibodies and CARs, and methods for producing the same, or using the same for detecting or treating cancer and kits for carrying out said methods.Type: ApplicationFiled: April 28, 2023Publication date: May 9, 2024Inventors: Alan L. Epstein, Peisheng Hu, Long Zheng
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Patent number: 11927818Abstract: An optical module has an optical port and an electrical port, and includes a shell, a circuit board, a circuit adapter board, a silicon optical chip, a light source and an optical fiber socket. The circuit board is disposed in the shell. One end of the circuit board is provided with a connecting finger located in the electrical port. The circuit adapter board is disposed on and electrically connected to the circuit board. A thermal expansion coefficient of the circuit adapter board is lower than that of the circuit board. The silicon optical chip is disposed on and electrically connected to the circuit adapter board. The light source is disposed on the circuit board, is electrically connected to the circuit board, and is optically connected to the silicon optical chip. The optical fiber socket is optically connected to the silicon optical chip, and is configured to form the optical port.Type: GrantFiled: June 30, 2021Date of Patent: March 12, 2024Assignee: HISENSE BROADBAND MULTIMEDIA TECHNOLOGIES CO., LTD.Inventors: Long Zheng, Sigeng Yang
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Publication number: 20240061779Abstract: The present invention relates to a hardware accelerator for hypergraph processing and its operating method, the hardware accelerator comprising: a data loader: for, in the presence of a data-centric load-trigger-reduce execution model, reading hypergraph partition data from an off-chip memory successively according to hypergraph data structure and an order of hypergraph partitions; an address translator, for deploying the hypergraph data into a private register of a processor and/or into a buffer memory according to a priority level of loaded data, and recording corresponding offset information; a task trigger, for generating computing tasks according to the loaded data, and scheduling the computing tasks into the processor; the processor, for receiving and executing the computing tasks; a reducer, for scheduling intermediate results into a first-priority-data reducer unit or a second-priority-data reducer unit depending on the priority level of the data so as to execute a reducing operation for the intermediType: ApplicationFiled: December 22, 2022Publication date: February 22, 2024Inventors: Long ZHENG, Qinggang WANG, Xiaofei LIAO, Ao HU, Hai JIN
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Publication number: 20240053892Abstract: The present invention relates to a dynamic memory management apparatus and method for HLS, the apparatus at least comprising: several searching and caching modules and several modifying and writing-back modules, wherein the searching and caching modules are in connection with a DRAM storing module and a BRAM buffer, respectively, and the modifying and writing-back modules are in connection with the DRAM storing module and the BRAM buffer, respectively, wherein the BRAM buffer is for caching information about nodes on a search path and registering information about modification made to the nodes; the searching and caching module is for reading node data from the DRAM storing module according to received operators and node addresses, and writing the node data into the BRAM buffer; and the modifying and writing-back module reads the node data from the BRAM buffer and writes the node data back into the DRAM storing module.Type: ApplicationFiled: December 22, 2022Publication date: February 15, 2024Inventors: Long ZHENG, Qinggang WANG, Xiaofei LIAO, Zhaozeng AN, Hai JIN
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Publication number: 20240019650Abstract: An optical module includes a circuit board, a circuit sub-board, a signal processing chip, a first light transceiver assembly, and a second light transceiver assembly. The circuit board is configured to be electrically connected to an outside of the optical module. The circuit sub-board is disposed on the circuit board and electrically connected to the circuit board. The circuit sub-board includes a first body and a connecting hole. The connecting hole runs through an upper surface and a lower surface of the first body. The signal processing chip is disposed on the circuit sub-board. The first light transceiver assembly is disposed on the circuit board and located in the connecting hole. The second light transceiver assembly is disposed on the circuit board and located outside the connecting hole.Type: ApplicationFiled: September 27, 2023Publication date: January 18, 2024Applicant: HISENSE BROADBAND MULTIMEDIA TECHNOLOGIES CO., LTD.Inventors: Long ZHENG, Yuting DONG, Sigeng YANG, Shicong HAO
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Patent number: 11667715Abstract: Provided herein are antibodies and chimeric antigen receptor (CAR) cells comprising the antigen binding domains of these antibodies. Also provided are compositions comprising the same, vector or plasmid encoding the antibodies and CARs, and methods for producing the same, or using the same for detecting or treating cancer and kits for carrying out said methods.Type: GrantFiled: August 13, 2021Date of Patent: June 6, 2023Assignee: University of Southern CaliforniaInventors: Alan L. Epstein, Peisheng Hu, Long Zheng
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Publication number: 20230116287Abstract: An optical module includes a circuit board, a substrate, a laser assembly, and a silicon photonic chip. The silicon photonic chip is electrically connected to the circuit board through the substrate so as to ground the silicon photonic chip. The substrate includes a body, a first support step, and a second support step. The first support step is disposed at an end of the body. The second support step is disposed at another end of the body. The circuit board includes a first metal layer and a second metal layer. The first metal layer is disposed on a surface of the circuit board proximate to the first support step and is electrically connected to the first support step. The second metal layer is disposed on a surface of the circuit board proximate to the second support step and is electrically connected to the second support step.Type: ApplicationFiled: December 13, 2022Publication date: April 13, 2023Applicant: HISENSE BROADBAND MULTIMEDIA TECHNOLOGIES CO., LTD.Inventors: Long ZHENG, Yuting DONG, JR., Shicong HAO, Sigeng YANG, Qian SHAO, Jihong HAN, Jingqi SU