Patents by Inventor Long Zheng
Long Zheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10886662Abstract: An electrical card connector includes an insulative housing, a plurality of contacts retained to the housing, a metallic shield attached to the housing and cooperating with the housing to form a receiving cavity for receiving therein an electrical card, and a card holding mechanism located beside the receiving cavity. The card holding mechanism includes a slider, a spring abutting against the slider and deformable in the front-to-back direction, and a resilient locking device. The locking device includes a securing part retained to the slider, a resilient arm extending from the securing part with a locking protrusion for engagement within a locking notch of the electrical card. The slider provides an abutment face. The free end of the locking arm is adapted to abut against the abutment face when the electrical card is inserted into or withdrawn from the receiving cavity to outwardly deflect the resilient arm.Type: GrantFiled: October 8, 2019Date of Patent: January 5, 2021Assignees: FUDING PRECISION COMPONENTS (SHENZHEN) CO., LTD., FOXCONN INTERCONNECT TECHNOLOGY LIMITEDInventors: Chang-Long Zheng, Fu-Jin Peng
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Patent number: 10788631Abstract: This disclosure relate to power control of an optical module. In one implementation, an optical module is disclosed. The optical module comprises a first edge connector pin, a microcontroller unit (MCU), and a power supply control unit disposed on a circuit board, wherein the first edge connector pin is configured to receive a control signal sent by a main-unit device during power up of the optical module; the MCU is electrically connected to the first edge connector pin and the power supply control unit, and is configured to read the control signal using the first edge connector pin, and when the control signal is a first-type control signal, send a corresponding type indication information to the power supply control unit; and the power supply control unit is configured to receive the type indication information sent by the MCU, and stop, according to the type indication information, supplying power.Type: GrantFiled: December 29, 2017Date of Patent: September 29, 2020Assignees: Hisense Broadband Multimedia Technologies Co., Ltd., Hisense Broadband Multimedia Technologies, Ltd.Inventor: Long Zheng
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Publication number: 20200272907Abstract: A deep learning heterogeneous computing method based on layer-wide memory allocation, at least comprises steps of: traversing a neural network model so as to acquire a training operational sequence and a number of layers L thereof; calculating a memory room R1 required by data involved in operation at the ith layer of the neural network model under a double-buffer configuration, where 1?i?L; altering a layer structure of the ith layer and updating the training operational sequence; distributing all the data across a memory room of the CPU and the memory room of the GPU according to a data placement method; performing iterative computation at each said layer successively based on the training operational sequence so as to complete neural network training.Type: ApplicationFiled: January 21, 2020Publication date: August 27, 2020Inventors: Hai JIN, Xiaofei LIAO, Long ZHENG, Haikun LIU, Xi GE
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Publication number: 20200242072Abstract: An FPGA-based graph data processing method is provided for executing graph traversals on a graph having characteristics of a small-world network by using a first processor being a CPU and a second processor that is a FPGA and is in communicative connection with the first processor, wherein the first processor sends graph data to be traversed to the second processor, and obtains result data of the graph traversals from the second processor for result output after the second processor has completed the graph traversals of the graph data by executing level traversals, and the second processor comprises a sparsity processing module and a density processing module, the sparsity processing module operates in a beginning stage and/or an ending stage of the graph traversals, and the density processing module with a higher degree of parallelism than the sparsity processing module operates in the intermediate stage of the graph traversals.Type: ApplicationFiled: December 20, 2019Publication date: July 30, 2020Inventors: Xiaofei LIAO, Hai JIN, Long ZHENG, Chengbo YANG
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Patent number: 10637577Abstract: An optical module includes a gold finger, a comparing unit and a voltage dividing unit. The gold finger includes a plurality of pins. A first pin of the plurality of pins is capable of being multiplexed. The comparing unit includes a first input, a second input and a first output. The first input is connected with the first pin. The second input is configured to receive a reference voltage. The first output is configured to output an output voltage. The voltage dividing unit includes a third input and a second output. The third input is configured to receive a voltage input. The second output is connected with the first pin and configured to regulate a voltage on the first pin, so that the first input of the comparing unit receives a regulated voltage. Voltages of different levels are output by the comparing unit based on a comparison result between an input voltage of the first input of the comparing unit and the reference voltage of the second input.Type: GrantFiled: July 3, 2019Date of Patent: April 28, 2020Assignee: HISENSE BROADBAND MULTIMEDIA TECHNOLOGIES CO., LTD.Inventor: Long Zheng
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Publication number: 20200112126Abstract: An electrical card connector includes an insulative housing, a plurality of contacts retained to the housing, a metallic shield attached to the housing and cooperating with the housing to form a receiving cavity for receiving therein an electrical card, and a card holding mechanism located beside the receiving cavity. The card holding mechanism includes a slider, a spring abutting against the slider and deformable in the front-to-back direction, and a resilient locking device. The locking device includes a securing part retained to the slider, a resilient arm extending from the securing part with a locking protrusion for engagement within a locking notch of the electrical card. The slider provides an abutment face. The free end of the locking arm is adapted to abut against the abutment face when the electrical card is inserted into or withdrawn from the receiving cavity to outwardly deflect the resilient arm.Type: ApplicationFiled: October 8, 2019Publication date: April 9, 2020Inventors: CHANG-LONG ZHENG, FU-JIN PENG
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Patent number: 10575382Abstract: The present disclosure generally relates to optical modules, and in particular, to an optical module comprising a printed circuit board for reducing crosstalk between differential signal lines. In one implementation, the printed circuit board comprises a top layer, a first intermediate signal transmission layer, a second intermediate signal transmission layer, a bottom layer and multiple ground layers between signal transmission layers. Each signal transmission layer comprises one or more differential signal line pairs. The top layer and the bottom layer each comprises an edge connector, and the top layer further comprises a laser driver chip. The signal transmission layers are connected to the edge connectors and laser driver chips via a combination of blind and through connection holes such that the interference between the differential signal line pairs of various signal transmission layers are reduced.Type: GrantFiled: March 11, 2019Date of Patent: February 25, 2020Assignees: Hisense Broadband Multimedia Technologies Co., Ltd., Hisense Broadband Multimedia Technologies, Ltd.Inventor: Long Zheng
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Publication number: 20200049873Abstract: The present disclosure describes an optical module. The optical module includes a housing comprising a first portion, a second portion, and protrusions, and the protrusions are configured to enclose the first portion to isolate the first portion from the second portion. The optical module includes a circuit board disposed inside the housing, the circuit board comprising a first area, a second area, and a metal strip attaching to the protrusions. The optical module further includes an indicator light configured to emit light and a laser driving chip. The first area of the circuit board is electrically connected to the indicator light to supply power to the indicator light. The second area of the circuit board is electrically connected to the laser driving chip. The metal strip encloses the first area to isolate the first area from the second area.Type: ApplicationFiled: September 11, 2019Publication date: February 13, 2020Applicant: Hisense Broadband Multimedia Technologies Co., Ltd.Inventor: Long ZHENG
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Patent number: 10516484Abstract: Some embodiments of the present application provide an optical module, including: a master control chip and a laser receiver; the laser receiver being connected to the master control chip; where the laser receiver includes: a PIN photodiode, a trans-impedance amplifier, a lens, and a shell; the PIN photodiode being electrically connected to the trans-impedance amplifier; and the lens being coated with an antireflection film; where the optical module further includes a bracket and a claw, where the laser receiver is fixed between a housing of the optical module and the bracket by the claw.Type: GrantFiled: August 17, 2018Date of Patent: December 24, 2019Assignees: HISENSE BROADBAND MULTIMEDIA TECHNOLOGIES CO., LTD., HISENSE BROADBAND MULTIMEDIA TECHNOLOGIES, LTD.Inventors: Yaqian Dong, Long Zheng, Hua Zhang
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Publication number: 20190326993Abstract: An optical module includes a gold finger, a comparing unit and a voltage dividing unit. The gold finger includes a plurality of pins. A first pin of the plurality of pins is capable of being multiplexed. The comparing unit includes a first input, a second input and a first output. The first input is connected with the first pin. The second input is configured to receive a reference voltage. The first output is configured to output an output voltage. The voltage dividing unit includes a third input and a second output. The third input is configured to receive a voltage input. The second output is connected with the first pin and configured to regulate a voltage on the first pin, so that the first input of the comparing unit receives a regulated voltage. Voltages of different levels are output by the comparing unit based on a comparison result between an input voltage of the first input of the comparing unit and the reference voltage of the second input.Type: ApplicationFiled: July 3, 2019Publication date: October 24, 2019Inventor: Long ZHENG
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Patent number: 10440799Abstract: The present disclosure discloses an optical module, and relates to the field of optical fiber communication technologies. A first sealing piece is configured to block the gap between the optical fiber ribbon and the blocking piece. For the optical module and an optical communication terminal provided in the present application, an electromagnetic wave generated by the optical module is directly radiated or is reflected several times until the electromagnetic wave enters a wave-absorbing pad. The wave-absorbing pad absorbs to the greatest extent an electromagnetic wave generated by a chip, and can reduce to the greatest extent electromagnetic interference (EMI) generated by the optical module. By means of the present disclosure, the sealing performance of a housing of the optical module can be improved, so that an EMI shielding effect is improved, thereby effectively reducing EMI.Type: GrantFiled: December 29, 2017Date of Patent: October 8, 2019Assignees: Hisense Broadband Multimedia Technologies Co., Ltd., Hisense Broadband Multimedia Technologies, Ltd.Inventor: Long Zheng
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Patent number: 10390409Abstract: This application discloses an optical module, including a circuit board, a lens assembly, a laser driver, and a limiting amplifier. Heat dissipation layers are disposed on the upper and lower surfaces of the circuit board. The laser driver and the limiting amplifier are mounted on the surface of the heat dissipation layer on the upper surface. Via holes are provided in projection regions of the laser driver and the limiting amplifier on the circuit board. Via holes penetrate the circuit board and are connected to the heat dissipation layers. Via holes are filled with a heat conductor, and the heat conductor is connected to the heat dissipation layers on the upper surface and the lower surface of the circuit board. The optical module disclosed in this application effectively dissipates heat generated by the laser driver and the limiting amplifier, thereby reducing the temperature in the optical module.Type: GrantFiled: December 29, 2017Date of Patent: August 20, 2019Assignees: Hisense Broadband Multimedia Technologies Co., Ltd., Hisense Broadband Multimedia Technologies, Ltd.Inventor: Long Zheng
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Publication number: 20190208601Abstract: The present disclosure generally relates to optical modules, and in particular, to an optical module comprising a printed circuit board for reducing crosstalk between differential signal lines. In one implementation, the printed circuit board comprises a top layer, a first intermediate signal transmission layer, a second intermediate signal transmission layer, a bottom layer and multiple ground layers between signal transmission layers. Each signal transmission layer comprises one or more differential signal line pairs. The top layer and the bottom layer each comprises an edge connector, and the top layer further comprises a laser driver chip. The signal transmission layers are connected to the edge connectors and laser driver chips via a combination of blind and through connection holes such that the interference between the differential signal line pairs of various signal transmission layers are reduced.Type: ApplicationFiled: March 11, 2019Publication date: July 4, 2019Applicants: Hisense Broadband Multimedia Technologies Co., Ltd ., Hisense Broadband Multimedia Technologies, Ltd.Inventor: Long Zheng
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Patent number: 10271403Abstract: This disclosure relates to optical module. In one implementation, the optical module includes a multi-layer circuit board, a first optical chip, a second optical chip, and a processor, wherein a surface layer on a same side of the circuit board comprises a first row of edge connector pins and a second row of edge connector pins; the first row of edge connector pins comprise a first power pin; the second row of edge connector pins comprise a second power pin; the first power pin is connected to the first optical chip; the second power pin connected to the second optical chip and the processor; the first power pin and the second power pin are aligned along a same direction and are arranged at a same position among the first row of edge connector pins and the second row of edge connector pins; and the first power pin is electrically connected to the second power pin.Type: GrantFiled: December 29, 2017Date of Patent: April 23, 2019Assignees: Hisense Broadband Multimedia Technologies Co., Ltd., Hisense Broadband Multimedia Technologies, Ltd.Inventor: Long Zheng
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Patent number: 10257910Abstract: The present disclosure generally relates to optical modules, and in particular, to an optical module comprising a printed circuit board for reducing crosstalk between differential signal lines. In one implementation, the printed circuit board comprises a top layer, a first intermediate signal transmission layer, a second intermediate signal transmission layer, a bottom layer and multiple ground layers between signal transmission layers. Each signal transmission layer comprises one or more differential signal line pairs. The top layer and the bottom layer each comprises an edge connector, and the top layer further comprises a laser driver chip. The signal transmission layers are connected to the edge connectors and laser driver chips via a combination of blind and through connection holes such that the interference between the differential signal line pairs of various signal transmission layers are reduced.Type: GrantFiled: December 29, 2017Date of Patent: April 9, 2019Assignees: Hisense Broadband Multimedia Technologies Co., Ltd., Hisense Broadband Multimedia Technologies, Ltd.Inventor: Long Zheng
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Patent number: 10236617Abstract: An electrical connector includes a pair of housing units side by side arranged with each other and equipped with the corresponding contacts, respectively. A pair of protection caps are assembled to the corresponding housing units horizontally in opposite directions, respectively. A linking part is mounted upon the pair of caps with a rigid suction region thereof in a symmetrical manner. The linking part is downwardly mounted upon the pair of caps with corresponding standoffs to space the main part of the linking part from the caps in the vertical direction so as not to block the related heat dissipation.Type: GrantFiled: June 13, 2018Date of Patent: March 19, 2019Assignee: FOXCONN INTERCONNECT TECHNOLOGY LIMITEDInventors: Shuo-Hsiu Hsu, Chang-Long Zheng, Qi-Jin Yi, Fu-Jin Peng
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Publication number: 20190031771Abstract: The present invention relates to compositions and methods of use of anti-ADAMTS13 autoantibodies and fragments thereof. In one aspect, the invention includes a composition comprising an isolated anti-ADAMTS13 autoantibody or fragment thereof. In other aspects, methods are described for generating an in vivo model of thrombotic thrombocytopenic purpura (TTP) comprising introducing at least one anti-ADAMTS13 autoantibody or fragment thereof into a model organism and identifying an anti-autoimmune reagent for treating TTP.Type: ApplicationFiled: April 6, 2016Publication date: January 31, 2019Inventors: Donald L. SIEGEL, Stephen KACIR, Eric OSTERTAG, X. Long ZHENG
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Patent number: 10177857Abstract: This disclosure discloses an optical module and a method for controlling optical module. The optical module includes a controller and a port, wherein the controller is configured to receive a state signal from an optical chip, the state signal is a continuous signal, and output a non-continuous signal to a port pin of the port according to the state signal; the port pin is configured to output the non-continuous signal, and receive a non-continuous response signal in an interval period of the non-continuous signal; and the controller further also configured to receive the response signal from the port pin, and control a power supply to supply power according to the response signal.Type: GrantFiled: March 28, 2017Date of Patent: January 8, 2019Assignees: Hisense Broadband Multimedia Technologies Co., Ltd., Hisense USA Corporation, Hisense International Co., Ltd.Inventors: Li Wang, Long Zheng, Chungang Zhang
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Patent number: 10169409Abstract: A system for transferring data from a Relational Database Management System (“RDBMS”) to a big data platform and methods for making and using the same. The system can acquire a partitioning execution scheme of a selected table from the RDBMS and submitting partitioned queries from the big data platform to each mapper of partitions. The partitioned queries are generated based on the partitioning execution scheme. The partitioning execution scheme can be acquired by submitting a query explain request to an optimizer of the RDBMS to generating a parallel query plan. The partitioning execution scheme can also be acquired by querying statistics from a statistics catalog of the RDBMS or by user inputs. The system can use RDBMS capabilities and statistics for parallel data fetching. Thereby, the system can increase efficiency of the fetching and can avoid straggling when target data is not evenly distributed and can avoid table query-in-serial.Type: GrantFiled: October 1, 2015Date of Patent: January 1, 2019Assignee: International Business Machines CorporationInventors: Serge Bourbonnais, Hong Min, Xiao Li, Gong Su, Ke Wei Wei, Xi Long Zheng
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Patent number: 10169429Abstract: An integrated data processing system with two-tier data caching system and techniques for use thereof in a hybrid RDBMS and BDS computing environment are provided. In one aspect, the system is RDBMS-centric and uses two caches, one on the RDBMS side (1st tier) and the other on the BDS side (2nd tier). In another aspect, a DRDA wrapper on the BDS side enables the RDBMS to communicate with the BDS as if the BDS is another RDBMS. This is advantageous because the RDBMS already supports the DRDA protocol standard. In yet another aspect, the DRDA wrapper performs the data transformation needed when transferring cached objects between the RDBMS cache and BDS cache because RDBMS and BDS save data objects in different formats. This is advantageous because it offloads the computation from RDBMS to BDS therefore reducing the performance impact on RDBMS for its normal query and transaction processing.Type: GrantFiled: November 11, 2015Date of Patent: January 1, 2019Assignee: International Business Machines CorporationInventors: Serge Bourbonnais, Zhen Hua Dong, Nan Jiang, Xiao Li, Hong Min, Gong Su, En Zhong Wang, Ke Wei Wei, Xi Long Zheng