Patents by Inventor Lu An
Lu An has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12149551Abstract: A computer-implemented method, a computer program product, and a computer system for log anomaly detection. A computer receives a windowed log of incoming raw log messages. A computer compares statistical distribution metrics of entities in the windowed log with a statistical distribution extracted from a real-time statistical model for the entities. In response to the statistical distribution metrics being statistically different from the statistical distribution extracted from the real-time statistical model for the entities, a computer tags the windowed log as an entity anomaly. A computer computes a distance between an average word embedding vector in the windowed log and a statistical distribution extracted form a real-time statistical model for word embeddings. In response to the distance being greater than a predetermined threshold, a computer tags the windowed log as a word embedding anomaly. A computer sends to a user an alert with an anomaly severity level.Type: GrantFiled: September 9, 2022Date of Patent: November 19, 2024Assignee: International Business Machines CorporationInventors: Lu An, An-Jie Andy Tu, Xiaotong Liu, Anbang Xu, Rama Kalyani T. Akkiraju, Neil H. Boyette
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Publication number: 20240345609Abstract: A linear power converter circuit comprising: an output transistor, wherein a gate of the output transistor is controlled by an error amplification signal for converting an input voltage into an output voltage; an error amplification circuit configured to amplify a difference between a reference voltage and a feedback voltage to generate the error amplification signal, thereby regulating the output voltage to a predetermined level, wherein the feedback voltage is related to the output voltage; and a first surge protection circuit configured to clamp the gate-source voltage of the output transistor when the slew rate of the input voltage exceeds a threshold, thereby limiting the current through the output transistor to not exceed a predetermined upper limit.Type: ApplicationFiled: April 9, 2024Publication date: October 17, 2024Inventors: Zhi-Xin Chen, Lu-An Chen
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Publication number: 20240089275Abstract: A computer-implemented method, a computer program product, and a computer system for log anomaly detection. A computer receives a windowed log of incoming raw log messages. A computer compares statistical distribution metrics of entities in the windowed log with a statistical distribution extracted from a real-time statistical model for the entities. In response to the statistical distribution metrics being statistically different from the statistical distribution extracted from the real-time statistical model for the entities, a computer tags the windowed log as an entity anomaly. A computer computes a distance between an average word embedding vector in the windowed log and a statistical distribution extracted form a real-time statistical model for word embeddings. In response to the distance being greater than a predetermined threshold, a computer tags the windowed log as a word embedding anomaly. A computer sends to a user an alert with an anomaly severity level.Type: ApplicationFiled: September 9, 2022Publication date: March 14, 2024Inventors: Lu An, An-Jie Andy Tu, Xiaotong LIU, ANBANG XU, Rama Kalyani T. Akkiraju, Neil H. Boyette
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Patent number: 11874730Abstract: Identifying an log anomaly resolution by generating a knowledge base linking each of a plurality of incidents with historical anomalous log lines, calculating a resolution specificity score for each knowledge base record, identifying a run-time anomalous log line using the knowledge base, predicting a category for the run-time anomalous log line, identifying resolutions according to the category, ranking the resolutions according to the resolution specificity scores, and recommending a resolution according to the ranking.Type: GrantFiled: February 26, 2022Date of Patent: January 16, 2024Assignee: International Business Machines CorporationInventors: Ruchi Mahindru, Harshit Kumar, Sahil Bansal, Anbang Xu, Lu An, Gargi B. Dasgupta
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Patent number: 11829338Abstract: One or more computer processors classify each log line in a plurality of unlabeled log lines as an erroneous log line or a non-erroneous log line. The one or more computer processors templatize each classified erroneous log line and non-erroneous log line in the plurality of unlabeled log lines. The one or more computer processors cluster erroneous log templates into erroneous log template clusters and the non-erroneous log templates into non-erroneous log template clusters. The one or more computer processors eliminate the erroneous log template clusters and the non-erroneous log template clusters that exceed a frequency threshold. The one or more computer processors train a log anomaly model utilizing=remaining erroneous log template clusters and remaining non-erroneous log template clusters. The one or more computer processors identify a subsequent log line as anomalous or non-anomalous utilizing the trained log anomaly model.Type: GrantFiled: December 7, 2021Date of Patent: November 28, 2023Assignee: International Business Machines CorporationInventors: Sahil Bansal, Harshit Kumar, Lu An, Xiaotong Liu, Anbang Xu
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Publication number: 20230273849Abstract: Identifying an log anomaly resolution by generating a knowledge base linking each of a plurality of incidents with historical anomalous log lines, calculating a resolution specificity score for each knowledge base record, identifying a run-time anomalous log line using the knowledge base, predicting a category for the run-time anomalous log line, identifying resolutions according to the category, ranking the resolutions according to the resolution specificity scores, and recommending a resolution according to the ranking.Type: ApplicationFiled: February 26, 2022Publication date: August 31, 2023Inventors: Ruchi Mahindru, Harshit Kumar, Sahil Bansal, ANBANG XU, Lu An, Gargi B. Dasgupta
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Publication number: 20230177380Abstract: One or more computer processors classify each log line in a plurality of unlabeled log lines as an erroneous log line or a non-erroneous log line; templatize each classified erroneous log line and non-erroneous log line in the plurality of unlabeled log lines; cluster erroneous log templates into erroneous log template clusters and non-erroneous log templates into non-erroneous log template clusters; identify one or more log lines as anomalous utilizing a plurality of factors including a log maturity, a number of encountered log template clusters, and a ratio of classified erroneous log lines to classified non-erroneous log lines; responsive to one or more identified anomalous log lines, validate the identified anomalous log lines utilizing a site reliability engineer and human-in-the-loop validation; train a log anomaly model utilizing one or more validated log lines; and identify a subsequent log line as anomalous utilizing the trained log anomaly model.Type: ApplicationFiled: December 7, 2021Publication date: June 8, 2023Inventors: Sahil Bansal, Harshit Kumar, Lu An, Xiaotong LIU, ANBANG XU
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Publication number: 20230177027Abstract: One or more computer processors classify each log line in a plurality of unlabeled log lines as an erroneous log line or a non-erroneous log line. The one or more computer processors templatize each classified erroneous log line and non-erroneous log line in the plurality of unlabeled log lines. The one or more computer processors cluster erroneous log templates into erroneous log template clusters and the non-erroneous log templates into non-erroneous log template clusters. The one or more computer processors eliminate the erroneous log template clusters and the non-erroneous log template clusters that exceed a frequency threshold. The one or more computer processors train a log anomaly model utilizing=remaining erroneous log template clusters and remaining non-erroneous log template clusters. The one or more computer processors identify a subsequent log line as anomalous or non-anomalous utilizing the trained log anomaly model.Type: ApplicationFiled: December 7, 2021Publication date: June 8, 2023Inventors: Sahil Bansal, Harshit Kumar, Lu An, Xiaotong LIU, Anbang XU
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Patent number: 11620581Abstract: Mechanisms are provided to implement an ensemble of unsupervised machine learning (ML) models. The ensemble of unsupervised ML models processes a portion of input data to generate an ensemble output and the ensemble output is output to an authorized user computing device to obtain user feedback from the authorized user via the user computing device. The user feedback indicates a correctness of the ensemble output. The mechanisms modify at least one feature of the ensemble of unsupervised ML models based on the obtained user feedback to thereby generate a modified ensemble of unsupervised ML models. Subsequent portions of input data are then processed using the modified ensemble of unsupervised ML models.Type: GrantFiled: March 6, 2020Date of Patent: April 4, 2023Assignee: International Business Machines CorporationInventors: Gary I. Givental, Aankur Bhatia, Lu An
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Publication number: 20230061063Abstract: Ceramic foam fiber composites, methods of making ceramic foam fiber composites, and uses of ceramic foam fiber composites. The ceramic foam fiber composites may be made by contacting one or more fiber(s); one or more ceramic precursor(s); one or more pore-forming gas-forming additive(s) (one or more inert gas-generating agent(s)); one or more catalyst(s); and, optionally, one or more additive(s), where the contacting is results in formation of an inert gas and the ceramic foam-fiber composite is formed. A ceramic foam-fiber composite may include a plurality of fibers, where at least a portion or all of the fibers individually comprise a ceramic foam disposed on at least a portion or all of a surface of the fiber. A ceramic foam-fiber composite may exhibit one or more or all of the following: thermal stability, mechanical strength, soundproof/acoustic insulation characteristics. A ceramic foam-fiber composite material may be used as a building material.Type: ApplicationFiled: January 11, 2021Publication date: March 2, 2023Inventors: Shenqiang REN, Lu AN
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Patent number: 11374953Abstract: Mechanisms are provided to implement a hybrid machine learning (ML) anomaly detector comprising an ensemble of unsupervised ML models and a semi-supervised ML model. The ensemble of unsupervised ML models are executed on log data to generate, for each entry in the log data, a predicted anomaly score and corresponding anomaly classification label of the entry. A partially labeled dataset is generated based on a selected subset of entries and other unlabeled log data in the log data. A similarity analysis of the unlabeled log data with entries in the selected subset of entries is performed and anomaly classification labels of the selected subset of entries are propagated to the other unlabeled log data based on the similarity analysis.Type: GrantFiled: March 6, 2020Date of Patent: June 28, 2022Assignee: International Business Machines CorporationInventors: Gary I Givental, Aankur Bhatia, Lu An
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Publication number: 20220072743Abstract: Systems for forming thermoplastic components are disclosed. A system may include a mold including a first portion and a second portion engaging the first portion. The first portion and/or the second portion may receive material for the component. The system may also include a compressive device positioned adjacent to and contacting the first portion of the mold. Additionally, the system may include a control system in communication with the compressive device. The control system may be configured to displace the compressive device to apply a compressive force to the first portion of the mold, and impose a predetermined pressure on the material for the component. The control system may also be configured to heat the first portion and/or the second portion of the mold.Type: ApplicationFiled: June 28, 2021Publication date: March 10, 2022Inventors: Shenqiang Ren, Lu aN
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Publication number: 20210281592Abstract: Mechanisms are provided to implement a hybrid machine learning (ML) anomaly detector comprising an ensemble of unsupervised ML models and a semi-supervised ML model. The ensemble of unsupervised ML models are executed on log data to generate, for each entry in the log data, a predicted anomaly score and corresponding anomaly classification label of the entry. A partially labeled dataset is generated based on a selected subset of entries and other unlabeled log data in the log data. A similarity analysis of the unlabeled log data with entries in the selected subset of entries is performed and anomaly classification labels of the selected subset of entries are propagated to the other unlabeled log data based on the similarity analysis.Type: ApplicationFiled: March 6, 2020Publication date: September 9, 2021Inventors: Gary I. Givental, Aankur Bhatia, Lu An
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Publication number: 20210279644Abstract: Mechanisms are provided to implement an ensemble of unsupervised machine learning (ML) models. The ensemble of unsupervised ML models processes a portion of input data to generate an ensemble output and the ensemble output is output to an authorized user computing device to obtain user feedback from the authorized user via the user computing device. The user feedback indicates a correctness of the ensemble output. The mechanisms modify at least one feature of the ensemble of unsupervised ML models based on the obtained user feedback to thereby generate a modified ensemble of unsupervised ML models. Subsequent portions of input data are then processed using the modified ensemble of unsupervised ML models.Type: ApplicationFiled: March 6, 2020Publication date: September 9, 2021Inventors: Gary I. Givental, Aankur Bhatia, Lu An
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Patent number: 10262987Abstract: The present invention provides an ESD protection circuit electrically connected between a high voltage power line and a low voltage power line, and the ESD protection circuit includes a bipolar junction transistor (BJT) and a trigger source. A collector of the BJT is electrically connected to the high voltage power line, and an emitter and a base of the BJT are electrically connected to the low voltage power line. The trigger source is electrically connected between the base of the BJT and the high voltage power line.Type: GrantFiled: April 6, 2017Date of Patent: April 16, 2019Assignee: UNITED MICROELECTRONICS CORP.Inventors: Li-Cih Wang, Lu-An Chen, Tien-Hao Tang
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Patent number: 9825021Abstract: A semiconductor device includes a substrate, a gate positioned on the substrate, a drain region and a source region formed at respective two sides of the gate in the substrate, at least a first doped region formed in the drain region, and at least a first well having the first doped region formed therein. The source region and the drain region include a first conductivity type, the first doped region and the first well include a second conductivity type, and the first conductivity type and the second conductivity type are complementary to each other.Type: GrantFiled: April 13, 2015Date of Patent: November 21, 2017Assignee: UNITED MICROELECTRONICS CORP.Inventors: Lu-An Chen, Tien-Hao Tang
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Publication number: 20170213818Abstract: The present invention provides an ESD protection circuit electrically connected between a high voltage power line and a low voltage power line, and the ESD protection circuit includes a bipolar junction transistor (BJT) and a trigger source. A collector of the BJT is electrically connected to the high voltage power line, and an emitter and a base of the BJT are electrically connected to the low voltage power line. The trigger source is electrically connected between the base of the BJT and the high voltage power line.Type: ApplicationFiled: April 6, 2017Publication date: July 27, 2017Inventors: Li-Cih Wang, Lu-An Chen, Tien-Hao Tang
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Patent number: 9692228Abstract: An electrostatic discharge (ESD) protection control circuit for an output pad of an integrated circuit includes an output driver and a control switch. The output driver, coupled to the output pad, includes a first output transistor for outputting power or signals to the output pad. The control switch, for improving ESD protection on the output pad when closed, includes a first connection terminal, coupled to a gate terminal of the first output transistor; a second connection terminal, coupled to a ground terminal; and a control terminal, coupled to a first power supply terminal.Type: GrantFiled: June 22, 2015Date of Patent: June 27, 2017Assignee: NOVATEK Microelectronics Corps.Inventors: Lu-An Chen, Tung-Hao Sung, Kun-Jheng Wu
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Patent number: 9660072Abstract: A laterally diffused metal oxide semiconductor (LDMOS) is provided. A substrate has a deep well with a second conductive type therein. A gate is disposed on the substrate. A first doped region of a second conductive type and a second doped region of a first conductive type are located in the deep well and at the corresponding two sides of the gate. A drain region of a second conductive type is located in the first doped region. A drain contact is disposed on the drain region. A doped region of a first conductive type is located in the first doped region and under the drain region but not directly below the drain contact. A source region is located in the second doped region. A field drift metal oxide semiconductor (FDMOS) which is similar to the laterally diffused metal oxide semiconductor (LDMOS) is also provided.Type: GrantFiled: February 24, 2014Date of Patent: May 23, 2017Assignee: UNITED MICROELECTRONICS CORP.Inventors: Lu-An Chen, Tien-Hao Tang
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Publication number: 20160372918Abstract: An electrostatic discharge (ESD) protection control circuit for an output pad of an integrated circuit includes an output driver and a control switch. The output driver, coupled to the output pad, includes a first output transistor for outputting power or signals to the output pad. The control switch, for improving ESD protection on the output pad when closed, includes a first connection terminal, coupled to a gate terminal of the first output transistor; a second connection terminal, coupled to a ground terminal; and a control terminal, coupled to a first power supply terminal.Type: ApplicationFiled: June 22, 2015Publication date: December 22, 2016Inventors: Lu-An Chen, Tung-Hao Sung, Kun-Jheng Wu