Patents by Inventor Lu An

Lu An has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240169488
    Abstract: Systems and methods for synthesizing images with increased high-frequency detail are described. Embodiments are configured to identify an input image including a noise level and encode the input image to obtain image features. A diffusion model reduces a resolution of the image features at an intermediate stage of the model using a wavelet transform to obtain reduced image features at a reduced resolution, and generates an output image based on the reduced image features using the diffusion model. In some cases, the output image comprises a version of the input image that has a reduced noise level compared to the noise level of the input image.
    Type: Application
    Filed: November 17, 2022
    Publication date: May 23, 2024
    Inventors: Nan Liu, Yijun Li, Michaƫl Yanis Gharbi, Jingwan Lu
  • Publication number: 20240169924
    Abstract: The embodiments of the present disclosure provides a display substrate, including: an active region and a peripheral region, the active region is provided therein with a plurality of pixel units arranged in an array, all the pixel units are divided into n pixel unit groups, the peripheral region is provided therein with a driver block including a first gate drive circuit having n+x first signal output terminals configured to sequentially output first gate drive signals in an active level and the first gate line provided for an ith pixel unit group is electrically connected to a (i+x)th first signal output terminal, and the reset signal line provided for the ith pixel unit group is electrically connected to an ith first signal output terminal, with i being a positive integer and i?n.
    Type: Application
    Filed: June 18, 2021
    Publication date: May 23, 2024
    Inventors: Guangliang SHANG, Libin LIU, Mengyang WEN, Jiangnan LU, Li WANG, Long HAN
  • Publication number: 20240170893
    Abstract: A ground conductive assembly includes a conductive housing and a first ground terminal. The conductive housing is provided with a first cavity and a second cavity. The conductive housing includes a first end and a second end that are opposite to each other in a first direction. The first end of the conductive housing is configured to be connected to a peer connector. The first ground terminal is disposed at the first end of the conductive housing, extends into the second cavity, and is electrically connected to an inner wall of the second cavity. The lead frame is disposed at the second end of the conductive housing. The lead frame includes a plurality of signal terminal groups and shield layers arranged on two sides of the plurality of signal terminal groups. A ground return path of the connector is significantly shortened, and a transmission rate is improved.
    Type: Application
    Filed: January 29, 2024
    Publication date: May 23, 2024
    Inventors: Kou XU, Yaohua TIAN, Zewen WANG, Xiangqian LU
  • Publication number: 20240169939
    Abstract: Provided are LED-display-screen drive chip and LED display screen, wherein the drive chip is configured such that: when a grayscale value R of a grayscale data is less than or equal to Q, the grayscale data is allocated to one display group in M display groups; and when the grayscale value R of the grayscale data is larger than Q, the grayscale value of one display group of the M display groups is P, wherein P>=Q, and a total grayscale value of remaining M?1 display groups is R?P, wherein in display groups in the remaining M?1 display groups whose grayscale value is not 0, a number of display groups whose grayscale value is less than L is not more than 1, wherein L?1, Q>L, and Q is a centralized display threshold. The present disclosure is capable of making the low-grayscale display effect smoother and improving the display effect.
    Type: Application
    Filed: October 30, 2023
    Publication date: May 23, 2024
    Inventors: Yongsheng TANG, Shilin SHEN, Aqiang LIU, Shixiong LU
  • Publication number: 20240170589
    Abstract: Provided are a photoelectric sensor and an electronic device. The photoelectric sensor includes a substrate, a plurality of photoelectric sensing elements, and a wall structure between two adjacent photoelectric sensing elements. The wall structure includes a first layer and a second layer stacked with the first layer. The first layer is arranged at a side of the second layer away from the substrate and includes a light-blocking material. At least one of the first layer or the second layer of the wall structure is arranged in a same layer as at least one layer of the photoelectric sensing element.
    Type: Application
    Filed: February 2, 2024
    Publication date: May 23, 2024
    Applicant: Shanghai Tianma Micro-Electronics Co., Ltd.
    Inventors: Fan XU, Bin ZHOU, Haotian LU, Kaidi ZHANG, Linzhi WANG, Zhen LIU, Baiquan LIN, Kerui XI
  • Publication number: 20240170070
    Abstract: A memory includes at least a target word line and a first word line group and a second word line group respectively stacked on both sides of the target word line. The first word line group includes first word lines, and the second word line group includes second word lines. A method for operating the memory includes, during a pre-charge operation, applying a first bias voltage signal to the plurality of first word lines, applying a second bias voltage signal to a target word line, and applying a third bias voltage signal to the plurality of second word lines. The method also includes, during a programming operation, applying a program voltage signal to a target word line.
    Type: Application
    Filed: December 27, 2022
    Publication date: May 23, 2024
    Inventors: Lu Qiu, Xueqing Huang, Junyao Zhu, Yao Chen
  • Publication number: 20240170223
    Abstract: A method for manufacturing a semiconductor structure is provided. A first plate, a second plate, and a third plate are sequentially formed over a substrate. The first plate includes a first top surface, first sidewalls and first transition regions, wherein the first transition regions connect the first sidewalls to the first top surface. The second plate includes a second top surface, second sidewalls and second transition regions, wherein the second transition regions connect the second sidewalls to the second top surface, and the first transition regions are covered by the second plate. The third plate includes a third top surface, third sidewalls and third transition regions, wherein the third transition regions connect the third sidewalls to the third top surface, and the second transition regions are exposed by the third plate. A semiconductor structure thereof is also provided.
    Type: Application
    Filed: January 18, 2023
    Publication date: May 23, 2024
    Inventors: LIANG-SHIUAN PENG, CHIH HUNG LU
  • Publication number: 20240170091
    Abstract: Described apparatuses and methods provide system error correction code (ECC) circuitry routing that segregates even sense amp (SA) line data sets and odd SA line data sets in a memory, such as a low-power dynamic random-access memory. A memory device may include one or more dies, and a die can have even SA line data sets and odd SA line data sets. The memory device may also include ECC circuitry comprising one or more ECC engines. By segregating the data sets, instead of coupling even and odd SA line data sets to a single ECC engine, double-bit errors on a single word line may be separated into two single-bit errors. Thus, by utilizing system ECC circuitry routing in this way, even a one-bit ECC algorithm may be used to correct double bits, which may increase data reliability.
    Type: Application
    Filed: November 16, 2023
    Publication date: May 23, 2024
    Applicant: Micron Technology, Inc.
    Inventors: Yoshiro Riho, Hyun Yoo Lee, Yang Lu
  • Publication number: 20240172116
    Abstract: Embodiments of the present invention disclose a communication method, apparatus, and system. The method includes: A first terminal device sends a wake-up signal to a second terminal device by using a first frequency domain resource, where the wake-up signal is used to activate a second frequency domain resource, the first frequency domain resource is used by two or more terminal devices to transmit wake-up signals, and the first frequency domain resource does not overlap the second frequency domain resource; and the first terminal device sends sidelink SL data to the second terminal device by using the second frequency domain resource. Embodiments of the present invention can reduce power consumption of the terminal devices in sidelink communication.
    Type: Application
    Filed: January 26, 2024
    Publication date: May 23, 2024
    Applicant: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Chunxu Jiao, Hongjia Su, Lei Lu
  • Publication number: 20240170109
    Abstract: The present disclosure provides systems and methods for assessing a mental state of a subject in a single session or over multiple different sessions, using for example an automated module to present and/or formulate at least one query based in part on one or more target mental states to be assessed. The query may be configured to elicit at least one response from the subject. The query may be transmitted in an audio, visual, and/or textual format to the subject to elicit the response. Data comprising the response from the subject can be received. The data can be processed using one or more individual, joint, or fused models. One or more assessments of the mental state associated with the subject can be generated for the single session, for each of the multiple different sessions, or upon completion of one or more sessions of the multiple different sessions.
    Type: Application
    Filed: February 1, 2024
    Publication date: May 23, 2024
    Inventors: Elizabeth Shriberg, Michael Aratow, Mainul Islam, Amir Hossein Harati, Tomasz Rutowski, David Lin, Yang Lu, Farshid Haque, Robert D. Rogers
  • Publication number: 20240170204
    Abstract: A magnetic device includes a base plate, a cover plate, a first winding column, a second winding column, a primary winding, a secondary winding and a supporting column. The base plate, having a first concave portion, is opposite to the cover plate. The first winding column and the second winding column are disposed between the bottom plate and the cover plate, respectively. The primary winding and the secondary winding are wound around the first winding column and the second winding column. The supporting column is disposed between the base plate and the cover plate. A first concave portion concaves from a first side of the base plate towards the first winding column and the second winding column along multiple directions. The primary winding and the secondary winding are wound and stacking along an extension direction of the first winding column and the second winding column.
    Type: Application
    Filed: July 20, 2023
    Publication date: May 23, 2024
    Inventors: Chen CHEN, De-Jia LU, Kai-De CHEN, Yong-Long SYU, Chao-Lin CHUNG
  • Publication number: 20240170584
    Abstract: A semiconductor structure includes a substrate including a recess indented into the substrate, a capacitor structure at least partially disposed within the recess, and an interconnect structure disposed over and electrically connected to the capacitor structure. The capacitor structure includes a first electrode layer, a second electrode layer over the first electrode layer, and a first dielectric between the first electrode layer and the second electrode layer. The first electrode layer includes a first body portion disposed in and conformal to the recess and a first extending portion disposed on the substrate, and the second electrode layer covers the first dielectric, the first body portion and the first extending portion of the first electrode layer.
    Type: Application
    Filed: January 16, 2023
    Publication date: May 23, 2024
    Inventors: CHIH-HSUAN TAI, HSIANG-TAI LU
  • Publication number: 20240170803
    Abstract: An electrochemical device including: an anode, a cathode, an electrolyte, and a separator separating the anode from the cathode. The separator includes a material that includes at least one of: a linear polymer; a kinetic friction coefficient of up to 2.0; an elongation of at least 240, elongation defined as elongation at break; a ratio of elongation to thickness of at least 10; and/or a modulus of elasticity of up to 270 MPa.
    Type: Application
    Filed: November 16, 2023
    Publication date: May 23, 2024
    Inventors: Wen-Qing Xu, Charan Masarapu, Xinyu Lu, Linze Du Hill, Zan Gao, Xiaoming Li
  • Publication number: 20240167832
    Abstract: A driving route planning method applied to an electronic device is provided. The method includes acquiring an image when a vehicle is driving. Target route information is obtained by inputting the image into a target route planning model. Once a first embedding vector of the target route information is extracted, a driving route corresponding to a driving style is obtained by inputting the first embedding vector into a target driving style model.
    Type: Application
    Filed: February 14, 2023
    Publication date: May 23, 2024
    Inventors: JUNG-HAO YANG, CHIN-PIN KUO, CHIH-TE LU
  • Publication number: 20240171246
    Abstract: Disclosed are a channel state information transmission and apparatus, a terminal device, a base station and a storage medium. The channel state information (CSI) transmission method may include: acquiring a CSI parameter, and generating first CSI and/or acquiring a network parameter set according to the CSI parameter; generating second CSI according to the first CSI and the network parameter set; and transmitting the second CSI.
    Type: Application
    Filed: November 24, 2021
    Publication date: May 23, 2024
    Inventors: Huahua XIAO, Hao WU, Zhaohua LU, Lun LI
  • Publication number: 20240170349
    Abstract: A method of manufacturing a semiconductor structure, comprising: disposing a dielectric layer over a semiconductive wafer defined with a plurality of active regions and a scribe line region surrounding each of the plurality of active regions; forming a plurality of interconnect structures within the dielectric layer, wherein the formation of the plurality of interconnect structures includes forming a plurality of first testing pads within the scribe line region and at least partially exposed through the dielectric layer; and sawing the semiconductive wafer along the scribe line region to form a first interposer and a second interposer, wherein each of the plurality of first testing pads is at least partially removed by the sawing of the semiconductive wafer.
    Type: Application
    Filed: January 15, 2023
    Publication date: May 23, 2024
    Inventors: CHIH-HSUAN TAI, YU-WEI CHIU, KUO WEN CHEN, HSIANG-TAI LU
  • Publication number: 20240171859
    Abstract: A sensor-stabilization assembly includes: a housing including a first portion of a first electromagnetic assembly and of a second electromagnetic assembly and defining a housing aperture; a first frame having first guides that permit relative motion between the first frame and the housing and defining a first frame aperture; and a second frame having second guides that permit relative motion between the second frame and the first frame. The second frame includes: a second portion of the first electromagnetic assembly adapted to interact with the first portion to cause the first frame and second frame to move relative to the housing; and a second portion of the second electromagnetic assembly adapted to interact with the first portion to cause the second frame to move relative to the first frame and housing. A sensor is coupled to the second frame to capture light through the housing aperture and first frame aperture.
    Type: Application
    Filed: August 19, 2021
    Publication date: May 23, 2024
    Inventors: Suyao Ji, Lu Gao
  • Publication number: 20240172544
    Abstract: A manufacturing method of an organic display panel and the organic display panel are provided by the present application and relate to a field of display technology. The present application mainly focuses on an evaporation process of an organic material on an array substrate to form an organic layer. An anode layer of the array substrate and the organic material after vaporization from an evaporation source are applied with different electric charges, so that the anode layer and the organic material after vaporization can attract each other under an action of an electric field during the evaporation process, thereby achieving a fixed-point deposition of the organic material on the anode layer, and preventing or hindering the organic material from depositing on the array substrate, such as the auxiliary electrode and other areas.
    Type: Application
    Filed: April 20, 2022
    Publication date: May 23, 2024
    Applicant: SHENZHEN CHINA STAR OPTOELECTONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Jiexin ZHENG, Wei LU
  • Publication number: 20240171648
    Abstract: An M2M Service Layer is expanded to access the services of third parties and exchange data with these third parties. The M2M Service Layer is then able to act as a proxy between M2M Devices and the third party services. The M2M Service Layer is able to present a single/consistent interface, or API, to the M2M Device and hide the details of the third party service provider from the M2M Device.
    Type: Application
    Filed: December 6, 2023
    Publication date: May 23, 2024
    Inventors: William Robert FLYNN, IV, Dale N. SEED, Xu LI, Guang LU, Lijun DONG, Hongkun LI, Phillip BROWN, Catalina M. MLADIN
  • Publication number: 20240171088
    Abstract: The present disclosure provides a filter system including N common mode chokes, N+1 first capacitors, N+1 second capacitors and N+1 third capacitors. Each common mode choke includes a first winding, a second winding, a third winding and an auxiliary winding. In the k-th common mode choke, a second terminal of the k-th first capacitor, a second terminal of the k-th second capacitor and a second terminal of the k-th third capacitor are all electrically connected to a k-th electrical midpoint, and two terminals of the auxiliary winding of the k-th common mode choke are electrically connected to the k-th electrical midpoint and a (k+1)-th electrical midpoint respectively, N is a positive integer and k is a positive integer less than or equal to N.
    Type: Application
    Filed: November 10, 2023
    Publication date: May 23, 2024
    Inventors: Bing Jiao, Yun Hua, Jun Chen, Yansong Lu