Patents by Inventor Luc Haspeslagh

Luc Haspeslagh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210247232
    Abstract: A method for calibrating an image sensor begins by illuminating a portion of the image sensor with an input light spectrum, where the input light spectrum includes light of known wavelength and intensity. The method continues by sampling an output for each optical sensor of the image sensor, where each optical sensor is associated with one or more optical filters and where each optical filter being associated with a group of optical filters of a plurality of groups of optical filters. Each optical filter of a group of optical filters is configured to pass light in a different wavelength range and at least some optical filters in different groups of the plurality of groups of optical filters are configured to pass light in substantially a same wavelength range.
    Type: Application
    Filed: April 27, 2021
    Publication date: August 12, 2021
    Applicant: IMEC
    Inventors: Nicolaas Tack, Andy Lambrechts, Luc Haspeslagh
  • Patent number: 11029207
    Abstract: An integrated circuit for an imaging system is disclosed. In one aspect, an integrated circuit has an array of optical sensors, an array of optical filters integrated with the sensors and configured to pass a band of wavelengths onto one or more of the sensors, and read out circuitry to read out pixel values from the sensors to represent an image. Different ones of the optical filters are configured to have a different thickness, to pass different bands of wavelengths by means of interference, and to allow detection of a spectrum of wavelengths. The read out circuitry can enable multiple pixels under one optical filter to be read out in parallel. The thicknesses may vary non-monotonically across the array. The read out, or later image processing, may involve selection or interpolation between wavelengths, to carry out spectral sampling or shifting, to compensate for thickness errors.
    Type: Grant
    Filed: March 10, 2020
    Date of Patent: June 8, 2021
    Assignee: IMEC
    Inventors: Nicolaas Tack, Andy Lambrechts, Luc Haspeslagh
  • Publication number: 20210111021
    Abstract: The present invent provides a method comprising forming a first wafer comprising a first substrate of a group IV semiconductor, and a group III-V semiconductor device structure formed by selective area epitaxial growth on a surface portion of a front side of the first substrate. The method further comprises forming a second wafer comprising a second substrate of a group IV semiconductor, and a group IV semiconductor device structure formed on a front side of the second substrate, and bonding the first wafer to the second wafer with the front side of the first substrate facing the front side of the second wafer.
    Type: Application
    Filed: October 12, 2020
    Publication date: April 15, 2021
    Inventors: Philippe SOUSSAN, Vasyl MOTSNYI, Luc HASPESLAGH, Stefano GUERRIERI, Olga SYSHCHYK, Bernardette KUNERT, Robert LANGER
  • Publication number: 20200278252
    Abstract: An integrated circuit for an imaging system is disclosed. In one aspect, an integrated circuit has an array of optical sensors, an array of optical filters integrated with the sensors and configured to pass a band of wavelengths onto one or more of the sensors, and read out circuitry to read out pixel values from the sensors to represent an image. Different ones of the optical filters are configured to have a different thickness, to pass different bands of wavelengths by means of interference, and to allow detection of a spectrum of wavelengths. The read out circuitry can enable multiple pixels under one optical filter to be read out in parallel. The thicknesses may vary non-monotonically across the array. The read out, or later image processing, may involve selection or interpolation between wavelengths, to carry out spectral sampling or shifting, to compensate for thickness errors.
    Type: Application
    Filed: March 10, 2020
    Publication date: September 3, 2020
    Inventors: Nicolaas Tack, Andy Lambrechts, Luc Haspeslagh
  • Patent number: 10620049
    Abstract: An integrated circuit for an imaging system is disclosed. In one aspect, an integrated circuit has an array of optical sensors, an array of optical filters integrated with the sensors and configured to pass a band of wavelengths onto one or more of the sensors, and read out circuitry to read out pixel values from the sensors to represent an image. Different ones of the optical filters are configured to have a different thickness, to pass different bands of wavelengths by means of interference, and to allow detection of a spectrum of wavelengths. The read out circuitry can enable multiple pixels under one optical filter to be read out in parallel. The thicknesses may vary non-monotonically across the array. The read out, or later image processing, may involve selection or interpolation between wavelengths, to carry out spectral sampling or shifting, to compensate for thickness errors.
    Type: Grant
    Filed: March 20, 2019
    Date of Patent: April 14, 2020
    Assignee: IMEC
    Inventors: Nicolaas Tack, Andy Lambrechts, Luc Haspeslagh
  • Publication number: 20190285474
    Abstract: An integrated circuit for an imaging system is disclosed. In one aspect, an integrated circuit has an array of optical sensors, an array of optical filters integrated with the sensors and configured to pass a band of wavelengths onto one or more of the sensors, and read out circuitry to read out pixel values from the sensors to represent an image. Different ones of the optical filters are configured to have a different thickness, to pass different bands of wavelengths by means of interference, and to allow detection of a spectrum of wavelengths. The read out circuitry can enable multiple pixels under one optical filter to be read out in parallel. The thicknesses may vary non-monotonically across the array. The read out, or later image processing, may involve selection or interpolation between wavelengths, to carry out spectral sampling or shifting, to compensate for thickness errors.
    Type: Application
    Filed: March 20, 2019
    Publication date: September 19, 2019
    Inventors: Nicolaas Tack, Andy Lambrechts, Luc Haspeslagh
  • Patent number: 10260945
    Abstract: An integrated circuit for an imaging system is disclosed. In one aspect, an integrated circuit has an array of optical sensors, an array of optical filters integrated with the sensors and configured to pass a band of wavelengths onto one or more of the sensors, and read out circuitry to read out pixel values from the sensors to represent an image. Different ones of the optical filters are configured to have a different thickness, to pass different bands of wavelengths by means of interference, and to allow detection of a spectrum of wavelengths. The read out circuitry can enable multiple pixels under one optical filter to be read out in parallel. The thicknesses may vary non-monotonically across the array. The read out, or later image processing, may involve selection or interpolation between wavelengths, to carry out spectral sampling or shifting, to compensate for thickness errors.
    Type: Grant
    Filed: March 3, 2016
    Date of Patent: April 16, 2019
    Assignee: IMEC
    Inventors: Nicolaas Tack, Andy Lambrechts, Luc Haspeslagh
  • Patent number: 10139280
    Abstract: An integrated circuit for an imaging system is disclosed. In one aspect, an integrated circuit has an array of optical sensors, an array of optical filters integrated with the sensors and configured to pass a band of wavelengths onto one or more of the sensors, and read out circuitry to read out pixel values from the sensors to represent an image. Different ones of the optical filters are configured to have a different thickness, to pass different bands of wavelengths by means of interference, and to allow detection of a spectrum of wavelengths. The read out circuitry can enable multiple pixels under one optical filter to be read out in parallel. The thicknesses may vary non-monotonically across the array. The read out, or later image processing, may involve selection or interpolation between wavelengths, to carry out spectral sampling or shifting, to compensate for thickness errors.
    Type: Grant
    Filed: March 3, 2016
    Date of Patent: November 27, 2018
    Assignee: IMEC
    Inventors: Nicolaas Tack, Andy Lambrechts, Luc Haspeslagh
  • Publication number: 20160252395
    Abstract: An integrated circuit for an imaging system is disclosed. In one aspect, an integrated circuit has an array of optical sensors, an array of optical filters integrated with the sensors and configured to pass a band of wavelengths onto one or more of the sensors, and read out circuitry to read out pixel values from the sensors to represent an image. Different ones of the optical filters are configured to have a different thickness, to pass different bands of wavelengths by means of interference, and to allow detection of a spectrum of wavelengths. The read out circuitry can enable multiple pixels under one optical filter to be read out in parallel. The thicknesses may vary non-monotonically across the array. The read out, or later image processing, may involve selection or interpolation between wavelengths, to carry out spectral sampling or shifting, to compensate for thickness errors.
    Type: Application
    Filed: March 3, 2016
    Publication date: September 1, 2016
    Inventors: Klaas Tack, Andy Lambrechts, Luc Haspeslagh
  • Publication number: 20160252396
    Abstract: An integrated circuit for an imaging system is disclosed. In one aspect, an integrated circuit has an array of optical sensors, an array of optical filters integrated with the sensors and configured to pass a band of wavelengths onto one or more of the sensors, and read out circuitry to read out pixel values from the sensors to represent an image. Different ones of the optical filters are configured to have a different thickness, to pass different bands of wavelengths by means of interference, and to allow detection of a spectrum of wavelengths. The read out circuitry can enable multiple pixels under one optical filter to be read out in parallel. The thicknesses may vary non-monotonically across the array. The read out, or later image processing, may involve selection or interpolation between wavelengths, to carry out spectral sampling or shifting, to compensate for thickness errors.
    Type: Application
    Filed: March 3, 2016
    Publication date: September 1, 2016
    Inventors: Klaas Tack, Andy Lambrechts, Luc Haspeslagh
  • Patent number: 9304039
    Abstract: An integrated circuit for an imaging system is disclosed. In one aspect, an integrated circuit has an array of optical sensors, an array of optical filters integrated with the sensors and configured to pass a band of wavelengths onto one or more of the sensors, and read out circuitry to read out pixel values from the sensors to represent an image. Different ones of the optical filters are configured to have a different thickness, to pass different bands of wavelengths by means of interference, and to allow detection of a spectrum of wavelengths. The read out circuitry can enable multiple pixels under one optical filter to be read out in parallel. The thicknesses may vary non monotonically across the array. The read out, or later image processing, may involve selection or interpolation between wavelengths, to carry out spectral sampling or shifting, to compensate for thickness errors.
    Type: Grant
    Filed: May 29, 2012
    Date of Patent: April 5, 2016
    Assignee: IMEC
    Inventors: Klaas Tack, Andy Lambrechts, Luc Haspeslagh
  • Patent number: 8643937
    Abstract: A DND device is disclosed. In one aspect, the device includes a nano-mirror (21), and an actuating module configured to move the nano-mirror in an upward and/or downward position. The actuating module has a cantilever mounted to a fixed structure, and at least one first electrode for moving the cantilever in an upward and/or downward position. Such DND devices may be arranged in a 2D array.
    Type: Grant
    Filed: November 15, 2011
    Date of Patent: February 4, 2014
    Assignee: IMEC
    Inventors: Luc Haspeslagh, Xavier Rottenberg, Veronique Rochus
  • Patent number: 8536662
    Abstract: A method is disclosed for manufacturing a semiconductor device, including providing a substrate comprising a main surface with a non flat topography, the surface comprising at least one substantial topography variation, forming a first capping layer over the main surface such that, during formation of the first capping layer, local defects in the first capping layer are introduced, the local defects being positioned at locations corresponding to the substantial topography variations and the local defects being suitable for allowing a predetermined fluid to pass through. Associated membrane layers, capping layers, and microelectronic devices are also disclosed.
    Type: Grant
    Filed: November 29, 2010
    Date of Patent: September 17, 2013
    Assignees: IMEC, Katholieke Universiteit Leuven, K.U. Leuven R&D
    Inventors: Ann Witvrouw, Luc Haspeslagh, Bin Guo, Simone Severi, Gert Claes
  • Publication number: 20120327248
    Abstract: An integrated circuit for an imaging system is disclosed. In one aspect, an integrated circuit has an array of optical sensors, an array of optical filters integrated with the sensors and configured to pass a band of wavelengths onto one or more of the sensors, and read out circuitry to read out pixel values from the sensors to represent an image. Different ones of the optical filters are configured to have a different thickness, to pass different bands of wavelengths by means of interference, and to allow detection of a spectrum of wavelengths. The read out circuitry can enable multiple pixels under one optical filter to be read out in parallel. The thicknesses may vary non monotonically across the array. The read out, or later image processing, may involve selection or interpolation between wavelengths, to carry out spectral sampling or shifting, to compensate for thickness errors.
    Type: Application
    Filed: May 29, 2012
    Publication date: December 27, 2012
    Applicant: IMEC
    Inventors: Klaas TACK, Andy Lambrechts, Luc Haspeslagh
  • Publication number: 20120127558
    Abstract: A DND device is disclosed. In one aspect, the device includes a nano-mirror (21), and an actuating module configured to move the nano-mirror in an upward and/or downward position. The actuating module has a cantilever mounted to a fixed structure, and at least one first electrode for moving the cantilever in an upward and/or downward position. Such DND devices may be arranged in a 2D array.
    Type: Application
    Filed: November 15, 2011
    Publication date: May 24, 2012
    Applicant: IMEC
    Inventors: Luc HASPESLAGH, Xavier ROTTENBERG, Veronique ROCHUS
  • Publication number: 20120013020
    Abstract: A MEMS device is disclosed comprising a cavity containing a MEMS component, the cavity being formed in a dielectric layer stack having a thickness td, whereby the cavity and the dielectric layer stack are sandwiched between a substrate and a sealing dielectric layer having a thickness ts, and whereby the MEMS component is enclosed by at least one trench extending over the thickness td of the dielectric layer stack and of the sealing dielectric ts.
    Type: Application
    Filed: July 13, 2011
    Publication date: January 19, 2012
    Applicant: IMEC
    Inventors: Bin Guo, Luc Haspeslagh
  • Publication number: 20110163399
    Abstract: A method is disclosed for manufacturing a sealed cavity in a microelectronic device, comprising forming a sacrificial layer at least at locations where the cavity is to be provided, depositing a membrane layer over the top of the sacrificial layer, patterning the membrane layer in at least two separate membrane layer blocks, removing the sacrificial layer through the membrane layer, and sealing the cavity by sealing the membrane layer, wherein patterning the membrane layer is performed after removal of the sacrificial layer.
    Type: Application
    Filed: November 29, 2010
    Publication date: July 7, 2011
    Applicant: IMEC
    Inventors: Ann Witvrouw, Luc Haspeslagh, Gert Claes
  • Publication number: 20110127650
    Abstract: A method is disclosed for manufacturing a semiconductor device, including providing a substrate comprising a main surface with a non flat topography, the surface comprising at least one substantial topography variation, forming a first capping layer over the main surface such that, during formation of the first capping layer, local defects in the first capping layer are introduced, the local defects being positioned at locations corresponding to the substantial topography variations and the local defects being suitable for allowing a predetermined fluid to pass through. Associated membrane layers, capping layers, and microelectronic devices are also disclosed.
    Type: Application
    Filed: November 29, 2010
    Publication date: June 2, 2011
    Applicants: IMEC, KATHOLIEKE UNIVERSITEIT LEUVEN, K.U. LEUVEN R&D
    Inventors: Ann Witvrouw, Luc Haspeslagh, Bin Guo, Simone Severi, Gert Claes
  • Publication number: 20100062224
    Abstract: The present invention provides a method for manufacturing micromachined devices on a substrate (10) comprising electrical circuitry, the micromachined devices comprising at least one micromachined structure, without affecting the underlying electrical circuitry. The method comprises providing a protection layer (15) on the substrate (10); providing on the protection layer (15) a plurality of patterned layers for forming the at least one micromachined structure, the plurality of patterned layers comprising at least one sacrificial layer (18); and thereafter removing at least a portion of the sacrificial layer (18) to release the at least one micromachined structure. The method furthermore comprises, before providing the protection layer (15), annealing the substrate (10) at a temperature higher than a highest temperature used during manufacturing of the micromachined device, annealing being for preventing gas formation underneath the protection layer (15) during subsequent manufacturing steps.
    Type: Application
    Filed: October 31, 2007
    Publication date: March 11, 2010
    Applicants: INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM, ASML NETHERLANDS BV
    Inventors: Ann Witvrouw, Luc Haspeslagh
  • Patent number: 7256247
    Abstract: The present invention includes a bimodal polyethylene polymerization process wherein metallocene catalyst to is used to adjust the hydrogen response of a Ziegler-Natta catalyst. The polymerization may be carried out in a single reactor or in two or more reactors in series, preferably two or more continuously stirred tank reactors in series. In an embodiment having two or more reactors, the Zeigler-Natta catalyst is added to a first reactor and the metallocene catalyst is added to a downstream reactor. In another embodiment having two or more reactors, the Zeigler-Natta catalyst and metallocene catalyst are added to the same reactor, preferably an upstream reactor. A preferred Zeigler-Natta catalyst comprises TiCl4, and a preferred metallocene catalyst comprises bis(cyclopentadienyl) titanium dichloride.
    Type: Grant
    Filed: March 4, 2004
    Date of Patent: August 14, 2007
    Assignee: Fina Technology, Inc.
    Inventors: Edwar S. Shamshoum, Luc Haspeslagh, Hong Chen