Abstract: A method of making a MEMS device is disclosed wherein anhydrous HF exposed silicon nitride is used as a temporary adhesion layer to permit the transfer of a layer from a carrier substrate to a receiving substrate.

Abstract: A method of making optical quality films is described. A silica film is deposited on a wafer by PECVD (Plasma Enhanced Chemical Vapor Deposition). The deposited film is then subjected to a first heat treatment to reduce optical absorption, wafer warp, and compressive stress. A second film is deposited. This step is then followed by a second heat treatment to reduce optical absorption, wafer warp and tensile stress. The two heat treatments have similar temperature profiles.

Abstract: A library of macrocyclic compounds of the formula (I) where part (A) is a bivalent radical, a —(CH2)y— bivalent radical or a covalent bond; where part (B) is a bivalent radical, a —(CH2)z— bivalent radical, or a covalent bond; where part (C) is a bivalent radical, a —(CH2)t— bivalent radical, or a covalent bond; and where part (T) is a —Y-L-Z- radical where in Y is CH2or CO, Z is NH or O and L is a bivalent radical. These compounds are useful for carrying out screening assays or as intermediates for the synthesis of other compounds of pharmaceutical interest. A process for the preparation of these compounds in a combinatorial manner, is also disclosed.

Abstract: A library of macrocyclic compounds of the formula (I) where part (A) is a ?bivalent radical, a —(CH2)y— bivalent radical or a covalent bond; where part (B) is a ?bivalent radical, a —(CH2)z— bivalent radical, or a covalent bond; where part (C) is a ?bivalent radical, a —(CH2)t— bivalent radical, or a covalent bond; and where part (T) is a —Y—L—Z— radical wherein number Y is CH2 or CO, Z is NH or O and L is a bivalent radical. These compounds are useful for carrying out screening assay or as intermediates for the synthesis of other compound of pharmaceutical interest. A process for their preparation of these compounds in a combinatorial manner, is also disclosed.

Abstract: A wafer level package for a MEMS device is made by bonding a MEMS wafer and a lid wafer together to form a hermetically sealed cavity. One or more vias filled with conductive or semiconductive material is etched one of the wafers to form one or more rods extending through the wafer. The rods provide electrical connection to components within the hermetically sealed cavity.

Abstract: A micro-electro-mechanical (MEM) device and an electronic device are fabricated on a common substrate by fabricating the electronic device comprising a plurality of electronic components on the common substrate, depositing a thermally stable interconnect layer on the electronic device, encapsulating the interconnected electronic device with a protective layer, forming a sacrificial layer over the protective layer, opening holes in the sacrificial layer and the protective layer to allow the connection of the MEM device to the electronic device, fabricating the MEM device by depositing and patterning at least one layer of amorphous silicon, and removing at least a portion of the sacrificial layer. In this way, the MEM device can be fabricated after the electronic device on the same substrate.

Abstract: A method of fabricating a silicon-based microstructure is disclosed, which involves depositing electrically conductive amorphous silicon doped with first and second dopants to produce a structure having a residual mechanical stress of less than +/=100 Mpa. The dopants can either be deposited in successive layers to produce a laminated structure with a residual mechanical stress of less than +/=100 Mpa or simultaneously to produce a laminated structure having a mechanical stress of less than +/=100 Mpa.

Abstract: A method is disclosed for fabricating a integrated device, such as a MEMS device. A first wafer is provided on an exposed surface with a layer of gold, gold alloy or gold compound. A second wafer is provided on its exposed surface with under-layer of gold, gold alloy or gold compound; and an over- of bismuth, bismuth alloy, a compound of bismuth, cadmium, cadmium alloy, a compound of cadmium compound, tin, tin alloy, or a compound of tin. The wafers are then brought into contact and bonded at their surfaces through the deposited layers.

Abstract: A method of etching a sacrificial oxide layer covering an etch-stop silicon nitride underlayer, involves exposing the sacrificial oxide to anhydrous HF at a temperature of less than about 100° C. and/or at vacuum level lower than 40 Torr; and subsequently performing an in-situ vacuum evaporation of etch by-products at a temperature of more than about 100° C. and at vacuum level lower than the 40 Torr without exposure to ambient air.

Abstract: A method of making a film with a high dielectric constant uses a spin-on sol-gel process to deposit the film on a substrate, the film having a composition (SiO2)x(TiO2)1?x, where 0.50<x<0.75. The resulting film is annealed in an oxygen-containing atmosphere at a temperature lying in the range of 500° C. to 700° C.

Abstract: A micro-electro-mechanical (MEM) device and an electronic device are fabricated on a common substrate by fabricating the electronic device comprising a plurality of electronic components on the common substrate, depositing a thermally stable interconnect layer on the electronic device, encapsulating the interconnected electronic device with a protective layer, forming a sacrificial layer over the protective layer, opening holes in the sacrificial layer and the protective layer to allow the connection of the MEM device to the electronic device, fabricating the MEM device by depositing and patterning at least one layer of amorphous silicon, and removing at least a portion of the sacrificial layer. In this way, the MEM device can be fabricated after the electronic device on the same substrate.

Abstract: A method of fabricating a silicon-based microstructure is disclosed, which involves depositing electrically conductive amorphous silicon doped with first and second dopants to produce a structure having a residual mechanical stress of less than +/=100 Mpa. The dopants can either be deposited in successive layers to produce a laminated structure with a residual mechanical stress of less than +/=100 Mpa or simultaneously to produce a laminated structure having a mechanical stress of less than +/=100 Mpa.

Abstract: In the manufacture of a MEMS device having a semiconductor-on-insulator substrate with a first portion closed by a lid to provide a hermetically sealed region and an second portion external to said hermetically sealed region, a method of providing electrical connections to said hermetically sealed region comprising forming at least one continuous deep trench in said semiconductor and extending down to said insulator, said at least one deep trench surrounding and isolating at least one block of semiconductor within said substrate, and said at least one block of semiconductor extending form within said first region to said second region; depositing an insulating layer in said trenches and over the surface of said substrate; depositing a metal ring around said first region; sealing said lid to said metal ring; and attaching a contact to said at least one block of semiconductor in said second region to provide one or more electrical connections through said at least one block of semiconductor to one or more compo

Abstract: A method of making a film with a high dielectric constant uses a spin-on sol-gel process to deposit the film on a substrate, the film having a composition (SiO2)x(TiO2)1-x, where 0.50<x<0.75. The resulting film is annealed in an oxygen-containing atmosphere at a temperature lying in the range of 500° C. to 700° C.

Abstract: In the manufacture of a MEMS device having a semiconductor-on-insulator substrate with a first portion closed by a lid to provide a hermetically sealed region and an second portion external to said hermetically sealed region, a method of providing electrical connections to said hermetically sealed region comprising forming at least one continuous deep trench in said semiconductor and extending down to said insulator, said at least one deep trench surrounding and isolating at least one block of semiconductor within said substrate, and said at least one block of semiconductor extending form within said first region to said second region; depositing an insulating layer in said trenches and over the surface of said substrate; depositing a metal ring around said first region; sealing said lid to said metal ring; and attaching a contact to said at least one block of semiconductor in said second region to provide one or more electrical connections through said at least one block of semiconductor to one or more compo

Abstract: A method of fabricating a silicon-based microstructure is disclosed, which involves depositing electrically conductive amorphous silicon doped with first and second dopants to produce a structure having a residual mechanical stress of less than +/=100 Mpa. The dopants can either be deposited in successive layers to produce a laminated structure with a residual mechanical stress of less than +/=100 Mpa or simultaneously to produce a laminated structure having a mechanical stress of less than +/=100 Mpa.

Abstract: A method of making a photonic device having at least two layers formed over a substrate, preferably by plasma enhanced chemical vapor deposition, involves depositing a thin spin-on glass (SOG) interlayer between at least one adjacent pair of layers to improve the roughness characteristics.

Abstract: A method of making an etched structure in the fabrication of a MEMS device involves depositing a bulk layer, typically of polysilicon, prone to surface roughness. At least one layer of photo-insensitive spin-on planarizing material, such as silicate-based spin-on glass, is formed on the bulk layer to reduce surface roughness. This is patterned with a photoresist layer. A deep etch is then performed through the photoresist layer into the bulk layer. This technique results in much more precise etch structures.

Abstract: A method is disclosed for making a wafer-level package for a plurality of MEMS devices. The method involves preparing a MEMS wafer and a lid wafer, each having respective bonding structures. The lid and MEMS wafers are then bonded together through the bonding structures. The wafers are substantially free of alkali metals and/or chlorine. IN a preferred embodiment, each wafer has a seed layer, a structural underlayer and an anti-oxidation layer. A solder layer, normally formed on the lid wafer, bonds the two wafers together.

Abstract: A process for making an integrated circuit is described wherein sequence of mask steps is applied to a substrate or epitaxial layer of p-type material.