Patents by Inventor Luc Ouellet

Luc Ouellet has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050137127
    Abstract: Novel spatially-defined macrocyclic compounds containing specific conformational control elements are disclosed. Libraries of these macrocycles are then used to select one or more macrocycle species that exhibit a specific interaction with a particular biological target. In particular, compounds according to the invention are disclosed as agonists or antagonists of a mammalian motilin receptor and a mammalian ghrelin receptor.
    Type: Application
    Filed: August 2, 2004
    Publication date: June 23, 2005
    Applicant: TRANZYME PHARMA INC
    Inventors: Pierre Deslongchamps, Yves Dory, Mark Peterson, Kamel Benakli, Eric Marsault, Luc Ouellet, Mahesh Ramaseshan, Martin Vezina, Daniel Fortin, Ruoxi Lan, Shigui Li, Gerald Villeneuve, Hamid Hoveyda, Sylvie Beaubien
  • Patent number: 6902656
    Abstract: A cavity forming formed in an encapsulation structure under a vacuum in a vacuum chamber is sealed with a capping layer. A stiff protective layer under tensile stress is deposited on the capping layer prior to venting the vacuum chamber to atmospheric pressure. The capping layer is preferably aluminum or an aluminum alloy, and the protective layer is preferably ?-TiN having a suitable high Young's modulus.
    Type: Grant
    Filed: May 24, 2002
    Date of Patent: June 7, 2005
    Assignee: DALSA Semiconductor Inc.
    Inventors: Luc Ouellet, Robert Antaki, Yves Tremblay
  • Publication number: 20050119169
    Abstract: Novel spatially-defined macrocyclic compounds incorporating peptide bond surrogates are disclosed. Libraries of these macrocycles are then used to select one or more macrocycle species that exhibit a specific interaction with a particular biological target. In particular, compounds according to the invention are disclosed as agonists or antagonists of a mammalian motilin receptor and a mammalian ghrelin receptor.
    Type: Application
    Filed: August 2, 2004
    Publication date: June 2, 2005
    Applicant: TRANZYME PHARMA INC.
    Inventors: Pierre Deslongchamps, Yves Dory, Luc Ouellet, Gerald Villeneuve, Mahesh Ramaseshan, Daniel Fortin, Mark Peterson, Hamid Hoveyda, Sylvie Beaubien, Eric Marsault
  • Patent number: 6887514
    Abstract: To deposit optical quality films by PECVD (Plasma Enhanced Chemical Vapor Deposition), a six-dimensional space wherein five dimensions thereof correspond to five respective independent variables of which a set of four independent variables relate to the flow-rate of respective gases, a fifth independent variable relates to total pressure, and a six dimension relates to observed FTIR characteristics is first created. Then an optical film is deposited while maintaining three of the set of four independent variables substantially constant as well as the fifth independent variable, and varying a fourth of the set of four independent variables to obtain desired characteristics in the sixth dimension.
    Type: Grant
    Filed: May 31, 2001
    Date of Patent: May 3, 2005
    Assignee: Dalsa Semiconductor Inc.
    Inventors: Luc Ouellet, Jonathan Lachance, Manuel Grondin, Stephane Blain
  • Publication number: 20050049234
    Abstract: A library of macrocyclic compounds of the formula (I) where part (A) is a (CH2)y—NH— bivalent radical, a —(CH2)y— bivalent radical or a covalent bond; where part (B) is a (CH2)z—NH— bivalent radical, a —(CH2)z— bivalent radical, or a covalent bond; where part (C) is a (CH2)t—NH— bivalent radical, a —(CH2)t— bivalent radical, or a covalent bond; and where part (T) is a —Y-L-Z— radical wherein Y is CH2 or CO, Z is NH or O and L is a bivalent radical. These compounds are useful for carrying out screening assays or as intermediates for the synthesis of other compounds of pharmaceutical interest. A process for their preparation of these compounds in a combinatorial manner, is also disclosed.
    Type: Application
    Filed: October 7, 2004
    Publication date: March 3, 2005
    Applicant: NEOKIMIA INC.
    Inventors: Pierre Deslongchamps, Yves Dory, Gilles Berthiaume, Luc Ouellet, Ruoxi Lan
  • Patent number: 6849491
    Abstract: A process for making a integrated circuits of different typed is described wherein sequence of mask steps is applied to a substrate or epitaxial layer of p-type material. The sequence is chosen from a predefined common set of mask steps according to the particular type of integrated circuit to be fabricated. In this way, various types of integrated circuit can be fabricated in a most efficient manner.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: February 1, 2005
    Assignee: DALSA Semiconductor Inc.
    Inventors: Stephane Martel, Yan Riopel, Sebastien Michel, Luc Ouellet
  • Patent number: 6825127
    Abstract: In a method of fabricating a microstructure for micro-fluidics applications, a mechanically stable support layer is formed over a layer of etchable material. An anisotropic etch is preformed through a mask to form a pattern of holes extending through the support layer into said etchable material. An isotropic etch is performed through each said hole to form a corresponding cavity in the etchable material under each hole and extending under the support layer. A further layer of depositable material is formed over the support layer until portions of the depositable layer overhanging each said hole meet and thereby close the cavity formed under each hole. The invention permits the formation of micro-channels and filters of varying configuration.
    Type: Grant
    Filed: July 24, 2001
    Date of Patent: November 30, 2004
    Assignee: Zarlink Semiconductor Inc.
    Inventors: Luc Ouellet, Heather Tyler
  • Publication number: 20040157426
    Abstract: A micro-electro-mechanical (MEM) device and an electronic device are fabricated on a common substrate by fabricating the electronic device comprising a plurality of electronic components on the common substrate, depositing a thermally stable interconnect layer on the electronic device, encapsulating the interconnected electronic device with a protective layer, forming a sacrificial layer over the protective layer, opening holes in the sacrificial layer and the protective layer to allow the connection of the MEM device to the electronic device, fabricating the MEM device by depositing and patterning at least one layer of amorphous silicon, and removing at least a portion of the sacrificial layer. In this way, the MEM device can be fabricated after the electronic device on the same substrate.
    Type: Application
    Filed: April 10, 2003
    Publication date: August 12, 2004
    Inventors: Luc Ouellet, Robert Antaki
  • Patent number: 6749893
    Abstract: A method for making an integrated photonic device involves depositing buffer, core and cladding layers on the front side of a wafer. A thick tensile stress layer is deposited on the back side of the wafer just prior to performing a high temperature thermal treatment above 600° C. on the cladding layer to prevent the cracking of the layers as a result of the thermal treatment.
    Type: Grant
    Filed: January 31, 2002
    Date of Patent: June 15, 2004
    Assignee: DALSA Semiconductor Inc.
    Inventors: Luc Ouellet, Jonathan Lachance, Sylvie Archambault
  • Patent number: 6724967
    Abstract: A method is disclosed for making a device having one or more deposited layers and subject to a post deposition high temperature anneal. Opposing films having similar mechanical properties are deposited on the front and back faces of a wafer, which is subsequently subjected a high temperature anneal. The opposing films tend to cancel out stress-induced warping of the wafer during the subsequent anneal.
    Type: Grant
    Filed: March 7, 2001
    Date of Patent: April 20, 2004
    Assignee: Dalsa Semiconductor Inc.
    Inventors: Luc Ouellet, Annie Dallaire
  • Publication number: 20040067604
    Abstract: A method is disclosed for fabricating a integrated device, such as a MEMS device. A first wafer is provided on an exposed surface with a layer of gold, gold alloy or gold compound. A second wafer is provided on its exposed surface with under-layer of gold, gold alloy or gold compound; and an over- of bismuth, bismuth alloy, a compound of bismuth, cadmium, cadmium alloy, a compound of cadmium compound, tin, tin alloy, or a compound of tin. The wafers are then brought into contact and bonded at their surfaces through the deposited layers.
    Type: Application
    Filed: December 6, 2002
    Publication date: April 8, 2004
    Inventors: Luc Ouellet, Jules J. Poisson
  • Patent number: 6716476
    Abstract: A method is disclosed for depositing an optical quality silica film on a wafer by PECVD. The flows rates for a raw material gas, an oxidation gas, a carrier gas, and a dopant gas are first set at predetermined levels. The total deposition pressure is set at a predetermined level. The deposited film is then subjected to a post deposition heat treatment at a temperature selected to optimize the mechanical properties without affecting the optical properties. Finally, the observed FTIR characteristics of the deposited film are monitored to produce a film having the desired optical and mechanical properties. This technique permits the production of high quality optical films with reduced stress.
    Type: Grant
    Filed: September 21, 2001
    Date of Patent: April 6, 2004
    Assignee: Dalsa Semiconductor Inc.
    Inventors: Luc Ouellet, Jonathan Lachance
  • Publication number: 20040035820
    Abstract: A method of making an etched structure in the fabrication of a MEMS device involves depositing a bulk layer, typically of polysilicon, prone to surface roughness. At least one layer of photo-insensitive spin-on planarizing material, such as silicate-based spin-on glass, is formed on the bulk layer to reduce surface roughness. This is patterned with a photoresist layer. A deep etch is then performed through the photoresist layer into the bulk layer. This technique results in much more precise etch structures.
    Type: Application
    Filed: August 23, 2002
    Publication date: February 26, 2004
    Inventor: Luc Ouellet
  • Patent number: 6656528
    Abstract: A method of making highly reflective mirrors on a wafer in the manufacture of photonic devices involves preheating a wafer to remove adsorbed volatile contaminants at a temperature between about 300 and 600° C. The wafer surface is etched at a temperature between about 300 and 600° C. to remove absorbed and chemically absorbed contaminants in the presence of a plasma to prevent poisoning. The wafer surface is thoroughly cooled so as to as reduce the surface mobility of the impinging atoms during the subsequent metallic deposition. A deposition is then carried out on the cooled wafer of a gettering layer for gettering hydrogen, oxygen and nitrogen. A metallic reflective layer is then deposited in a deposition chamber, and finally the wafer is removed from the deposition chamber to prevent excessive bulk oxidation.
    Type: Grant
    Filed: November 16, 2001
    Date of Patent: December 2, 2003
    Assignee: Dalsa Semiconductor Inc.
    Inventors: Luc Ouellet, Yves Tremblay
  • Publication number: 20030217915
    Abstract: A cavity forming formed in an encapsulation structure under a vacuum in a vacuum chamber is sealed with a capping layer. A stiff protective layer under tensile stress is deposited on the capping layer prior to venting the vacuum chamber to atmospheric pressure. The capping layer is preferably aluminum or an aluminum alloy, and the protective layer is preferably &dgr;-TiN having a suitable high Young's modulus.
    Type: Application
    Filed: May 24, 2002
    Publication date: November 27, 2003
    Inventors: Luc Ouellet, Robert Antaki, Yves Tremblay
  • Patent number: 6635509
    Abstract: A competitive, simple, single-substrate wafer-level packaging technique capable of creating a vacuum-sealed protective cavity around moving or other particular components of a MEMS is described. The technique uses common semiconductor materials, processing steps and equipment to provide a stable vacuum environment of, for example less than 1 Pa, in a sealed cavity. The environment protects components of the MEMS against micro-contamination from particles and slurry of a waver dicing process and against fluctuations of atmospheric condition to ensure long term reliability.
    Type: Grant
    Filed: April 12, 2002
    Date of Patent: October 21, 2003
    Assignee: Dalsa Semiconductor Inc.
    Inventor: Luc Ouellet
  • Publication number: 20030180021
    Abstract: A method of making a photonic device having at least two layers formed over a substrate, preferably by plasma enhanced chemical vapor deposition, involves depositing a thin spin-on glass (SOG) interlayer between at least one adjacent pair of layers to improve the roughness characteristics.
    Type: Application
    Filed: March 21, 2002
    Publication date: September 25, 2003
    Inventor: Luc Ouellet
  • Patent number: 6602791
    Abstract: In a method of fabricating a microstructure for microfluidics applications, a first layer of etchable material is formed on a suitable substrate. A mechanically stable support layer is formed over the etchable material. A mask is applied over the support to expose at least one opening in the mask. An anistropic etch is then performed through the opening to create a bore extending through the support layer to said layer of etchable material. After performing an isotropic etch through the bore to form a microchannel in the etchable material extending under the support layer, a further layer is deposited over the support layer until overhanging portions meet and thereby close the microchannel formed under the opening.
    Type: Grant
    Filed: April 27, 2001
    Date of Patent: August 5, 2003
    Assignee: Dalsa Semiconductor Inc.
    Inventors: Luc Ouellet, Heather Tyler
  • Publication number: 20030143334
    Abstract: A method is disclosed for making an integrated photonic device having buffer, core and cladding layers deposited on the front side of a wafer. A thick tensile stress layer is deposited on the back side of the wafer just prior to performing a high temperature thermal treatment above 600° C. on the cladding layer to prevent the cracking of the layers as a result of the thermal treatment.
    Type: Application
    Filed: January 31, 2002
    Publication date: July 31, 2003
    Inventors: Luc Ouellet, Jonathan Lachance, Sylvie Archambault
  • Publication number: 20030094433
    Abstract: A method of making highly reflective mirrors on a wafer in the manufacture of photonic devices involves preheating a wafer to remove adsorbed volatile contaminants at a temperature between about 300 and 600° C. The wafer surface is etched at a temperature between about 300 and 600° C. to remove absorbed and chemically absorbed contaminants in the presence of a plasma to prevent poisoning. The wafer surface is thoroughly cooled so as to as reduce the surface mobility of the impinging atoms during the subsequent metallic deposition. A deposition is then carried out on the cooled wafer of a gettering layer for gettering hydrogen, oxygen and nitrogen. A metallic reflective layer is then deposited in a deposition chamber, and finally the wafer is removed from the deposition chamber to prevent excessive bulk oxidation.
    Type: Application
    Filed: November 16, 2001
    Publication date: May 22, 2003
    Inventors: Luc Ouellet, Yves Tremblay