Patents by Inventor Luca Cafiero
Luca Cafiero has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9405698Abstract: This document discusses, among other things, an example system and methods for memory expansion. An example embodiment includes receiving a memory request from a memory controller over a channel. Based on the memory request, the example embodiment includes selecting a location in memory to couple to a sub-channel of the channel and configuring the set of field effect transistors to couple the channel with the sub-channel. In the example embodiment, data may be allowed to flow between the memory controller and the location in the memory over the channel and the sub-channel.Type: GrantFiled: July 21, 2014Date of Patent: August 2, 2016Assignee: Cisco Technology, Inc.Inventors: Mario Mazzola, Satyanarayana Nishtala, Luca Cafiero, Philip Manela
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Publication number: 20160156414Abstract: An apparatus, system and method for facilitating higher bandwidth communication in a data center using existing multi-mode fibers. A first transceiver within a first device transmits Ethernet traffic to a second device over first and second optical fibers and receives return optical signals over the same first and second optical devices. By varying the wavelengths between the transmitted and received optical signals, the same optical fibers can be used to both transmit and receive optical signals. A second transceiver within the same housing as the first transceiver performs the same function. In this fashion, one device can be coupled to four bidirectional optical fibers, each transmitting and receiving optical signals at 20 Gbps.Type: ApplicationFiled: December 1, 2014Publication date: June 2, 2016Inventors: Luca Cafiero, Franco Tomada
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Patent number: 9246834Abstract: The present invention provides methods and devices for implementing a Low Latency Ethernet (“LLE”) solution, also referred to herein as a Data Center Ethernet (“DCE”) solution, which simplifies the connectivity of data centers and provides a high bandwidth, low latency network for carrying Ethernet and storage traffic. Some aspects of the invention involve transforming FC frames into a format suitable for transport on an Ethernet. Some preferred implementations of the invention implement multiple virtual lanes (“VLs”) in a single physical connection of a data center or similar network. Some VLs are “drop” VLs, with Ethernet-like behavior, and others are “no-drop” lanes with FC-like behavior. Some preferred implementations of the invention provide guaranteed bandwidth based on credits and VL. Active buffer management allows for both high reliability and low latency while using small frame buffers. Preferably, the rules for active buffer management are different for drop and no drop VLs.Type: GrantFiled: September 15, 2014Date of Patent: January 26, 2016Assignee: CISCO TECHNOLOGY, INC.Inventors: Luca Cafiero, Silvano Gai
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Patent number: 9100313Abstract: A multi-stage network switch comprises a plurality of ingress port subsystems each comprising one or more ingress ports configured to receive packets. The switch also comprises a plurality of unscheduled crossbar switching elements connected to the ingress port subsystems that are configured to receive one or more packets from at least one of the ingress port subsystems. The switch further comprises a plurality of egress port subsystems each comprising a memory and a plurality of egress ports. The memory comprises at least one shared egress buffer configured to receive any packets forwarded by the crossbar switching elements from the ingress port subsystems directed to the egress port subsystem, and the egress ports are configured to transmit the packets received in the shared egress buffer.Type: GrantFiled: December 10, 2012Date of Patent: August 4, 2015Assignee: Cisco Technology, Inc.Inventors: Mario Mazzola, Luca Cafiero, Francis Matus, Georges Akis, Peter Newman
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Publication number: 20150124806Abstract: Systems, methods, and non-transitory computer-readable storage media for performing hierarchical routing are disclosed. The method includes identifying routes in a computer network and arranging those routes in two separate routing tables. The first routing table is stored on a first module and the second routing table is stored on a second module.Type: ApplicationFiled: September 4, 2014Publication date: May 7, 2015Inventors: Ayan Banerjee, Ramana Mellacheruvu, Abhishek Saxena, Vishal Jain, Luca Cafiero
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Patent number: 9027019Abstract: In one embodiment, a method includes defining a plurality of virtual drives in a physical drive in communication with a plurality of servers, assigning virtualization parameters to each of the virtual drives, and communicating the virtualization parameters to a drive manager located at the physical drive and operable to configure the virtual drives on the physical drive. An apparatus is also disclosed.Type: GrantFiled: September 22, 2011Date of Patent: May 5, 2015Assignee: Cisco Technology, Inc.Inventors: Satya Nishtala, Luca Cafiero
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Publication number: 20150036499Abstract: The present invention provides methods and devices for implementing a Low Latency Ethernet (“LLE”) solution, also referred to herein as a Data Center Ethernet (“DCE”) solution, which simplifies the connectivity of data centers and provides a high bandwidth, low latency network for carrying Ethernet and storage traffic. Some aspects of the invention involve transforming FC frames into a format suitable for transport on an Ethernet. Some preferred implementations of the invention implement multiple virtual lanes (“VLs”) in a single physical connection of a data center or similar network. Some VLs are “drop” VLs, with Ethernet-like behavior, and others are “no-drop” lanes with FC-like behavior. Some preferred implementations of the invention provide guaranteed bandwidth based on credits and VL. Active buffer management allows for both high reliability and low latency while using small frame buffers. Preferably, the rules for active buffer management are different for drop and no drop VLs.Type: ApplicationFiled: September 15, 2014Publication date: February 5, 2015Inventors: Luca Cafiero, Silvano Gai
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Publication number: 20140331095Abstract: This document discusses, among other things, an example system and methods for memory expansion. An example embodiment includes receiving a memory request from a memory controller over a channel. Based on the memory request, the example embodiment includes selecting a location in memory to couple to a sub-channel of the channel and configuring the set of field effect transistors to couple the channel with the sub-channel. In the example embodiment, data may be allowed to flow between the memory controller and the location in the memory over the channel and the sub-channel.Type: ApplicationFiled: July 21, 2014Publication date: November 6, 2014Inventors: Mario Mazzola, Satyanarayana Nishtala, Luca Cafiero, Philip Manela
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Publication number: 20140314425Abstract: Techniques are presented herein to facilitate higher bandwidth communications in a data center using existing multi-mode fibers and full-duplex optical communication techniques. A first device transmits to a second device a first optical signal at a first wavelength on a first optical fiber. The first optical signal carries a first portion of Ethernet traffic. The first device receives a second optical signal transmitted at a second wavelength on the first optical fiber from the second device. The second optical signal carries a first portion of Ethernet traffic. On a second optical fiber, the first device transmits to the second device a third optical signal at a third wavelength. The third optical signal carries a second portion of Ethernet traffic. The first device receives a fourth optical signal at a fourth wavelength on the second optical fiber, the fourth optical signal carrying a second portion of Ethernet.Type: ApplicationFiled: April 17, 2013Publication date: October 23, 2014Applicant: Cisco Technology, Inc.Inventor: Luca Cafiero
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Patent number: 8842694Abstract: The present invention provides methods and devices for implementing a Low Latency Ethernet (“LLE”) solution, also referred to herein as a Data Center Ethernet (“DCE”) solution, which simplifies the connectivity of data centers and provides a high bandwidth, low latency network for carrying Ethernet and storage traffic. Some aspects of the invention involve transforming FC frames into a format suitable for transport on an Ethernet. Some preferred implementations of the invention implement multiple virtual lanes (“VLs”) in a single physical connection of a data center or similar network. Some VLs are “drop” VLs, with Ethernet-like behavior, and others are “no-drop” lanes with FC-like behavior. Some preferred implementations of the invention provide guaranteed bandwidth based on credits and VL. Active buffer management allows for both high reliability and low latency while using small frame buffers. Preferably, the rules for active buffer management are different for drop and no drop VLs.Type: GrantFiled: April 11, 2012Date of Patent: September 23, 2014Assignee: Cisco Technology, Inc.Inventors: Luca Cafiero, Silvano Gai
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Patent number: 8825965Abstract: This document discusses, among other things, an example system and methods for memory expansion. An example embodiment includes receiving a memory request from a memory controller over a channel. Based on the memory request, the example embodiment includes selecting a location in memory to couple to a sub-channel of the channel and configuring the set of field effect transistors to couple the channel with the sub-channel. In the example embodiment, data may be allowed to flow between the memory controller and the location in the memory over the channel and the sub-channel.Type: GrantFiled: January 8, 2008Date of Patent: September 2, 2014Assignee: Cisco Technology, Inc.Inventors: Mario Mazzola, Satyanarayana Nishtala, Luca Cafiero, Philip Manela
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Patent number: 8788873Abstract: A failover input/output device and corresponding method are provided to manage failover events of input/output controller devices that operate in accordance with a computer expansion card standard, such as the Peripheral Component Interconnect Express (PCIe) standard. The failover input/output device connects to redundant first and second virtualized input/output controller devices each comprising multiple virtual network interfaces that are in an active or standby state at any given time, and to a computing device that hosts one or more processes. The failover input/output device broadcasts transactions in accordance with the computer expansion card standard initiated from the computing device to the first and second virtualized input/output controller devices.Type: GrantFiled: April 14, 2011Date of Patent: July 22, 2014Assignee: Cisco Technology, Inc.Inventors: Michael B. Galles, Luca Cafiero
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Patent number: 8727793Abstract: A small form-factor pluggable (SFP) module includes a board with an end portion to be inserted into a connector device. A first set of signal pads is arranged along an edge of a first surface of the SFP board at the end portion and a second set of signal pads along an edge of a second surface of the SFP board at the end portion. A third set of signal pads is disposed on the second surface at the end portion, offset from the edge of the second surface. A transceiver, coupled to the signal pads of the first, second, and third sets of signal pads, is configured to transmit and receive signals via the third set of signal pads and to transmit and receive signals via at least one of the first and second sets of signal pads.Type: GrantFiled: March 11, 2011Date of Patent: May 20, 2014Assignee: Cisco Technology, Inc.Inventors: Luca Cafiero, Zhiping Yang, Victor Odisho, Francisco Matus
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Patent number: 8621132Abstract: This document discusses, among other things, an example system and methods for memory expansion. An example embodiment includes receiving first initialization data from a physical dual inline memory module (DIMM) and converting the first initialization data to second initialization data of a logical DIMM mapped to the physical DIMM. The example embodiment may further include programming a memory controller based on the second initialization data.Type: GrantFiled: January 8, 2008Date of Patent: December 31, 2013Assignee: Cisco Technology, Inc.Inventors: Mario Mazzola, Satyanarayana Nishtala, Luca Cafiero, Dmitry Barsky
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Patent number: 8565231Abstract: The present invention provides methods and devices for implementing a Low Latency Ethernet (“LLE”) solution, also referred to herein as a Data Center Ethernet (“DCE”) solution, which simplifies the connectivity of data centers and provides a high bandwidth, low latency network for carrying Ethernet and storage traffic. Some aspects of the invention involve transforming FC frames into a format suitable for transport on an Ethernet. Some preferred implementations of the invention implement multiple virtual lanes (“VLs”) in a single physical connection of a data center or similar network. Some VLs are “drop” VLs, with Ethernet-like behavior, and others are “no-drop” lanes with FC-like behavior. Some preferred implementations of the invention provide guaranteed bandwidth based on credits and VL. Active buffer management allows for both high reliability and low latency while using small frame buffers. Preferably, the rules for active buffer management are different for drop and no drop VLs.Type: GrantFiled: May 20, 2011Date of Patent: October 22, 2013Assignee: Cisco Technology, Inc.Inventors: Silvano Gai, Thomas Edsall, Luca Cafiero, Davide Bergamasco, Dinesh Dutt, Flavio Bonomi
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Patent number: 8549331Abstract: Redundancy of data and/or inline power in a wired data telecommunications network from a pair of network devices via a selection device is provided by communicating redundant signals with each of the pair of network devices and coupling ports of the first network device and corresponding ports of the second network device to paired inputs of the selection device. The selection device operates: 1) under the control of the pair of network devices, one acting as master and one as slave, the master selecting (for each port or for all ports) one of the two paired inputs and causing the selection device to communicate data and/or inline power via a third port of the selection device to a third network device receiving data connectivity and/or inline power from the selection device; or 2) to route two redundant signals to a third network device which then selects one for use.Type: GrantFiled: September 3, 2010Date of Patent: October 1, 2013Assignee: Cisco TechnologyInventors: Roger A. Karam, Luca Cafiero
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Publication number: 20130081012Abstract: In one embodiment, a method includes defining a plurality of virtual drives in a physical drive in communication with a plurality of servers, assigning virtualization parameters to each of the virtual drives, and communicating the virtualization parameters to a drive manager located at the physical drive and operable to configure the virtual drives on the physical drive. An apparatus is also disclosed.Type: ApplicationFiled: September 22, 2011Publication date: March 28, 2013Applicant: CISCO TECHNOLOGY, INC.Inventors: Satya Nishtala, Luca Cafiero
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Patent number: 8407394Abstract: This document discusses, among other things, an example system and methods for memory expansion. An example embodiment includes detecting a memory command directed to a logical rand and a number of physical ranks mapped to the logical rank. The example embodiment may also include issuing the memory command to the number of physical ranks based on determining that the memory command is to be issued to the number of physical ranks.Type: GrantFiled: January 8, 2008Date of Patent: March 26, 2013Assignee: Cisco Technology, Inc.Inventors: Mario Mazzola, Satyanarayana Nishtala, Luca Cafiero, Philip Manela
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Patent number: 8386832Abstract: Redundancy of data and/or Inline Power in a wired data telecommunications network from a first network device and a second network device configured as power sourcing equipment (PSE) devices and coupled together and to a third network device (such as a PD) via a Y device is provided by providing redundant signaling to/from each of the pair of network devices, and coupling a port of each of the network devices to the Y device and from there to a third port where a third network device such as a PD may be coupled. Because the Y device is essentially passive, communications paths between the PSE devices and the PD are provided for negotiating master/slave status and other status and related information among the respective network devices. Dynamic impedance matching is provided to handle situations where not all devices are plugged in and as a communications technique among the devices.Type: GrantFiled: October 28, 2010Date of Patent: February 26, 2013Assignee: Cisco Technology, Inc.Inventors: Roger A. Karam, Luca Cafiero
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Publication number: 20120265910Abstract: A failover input/output device and corresponding method are provided to manage failover events of input/output controller devices that operate in accordance with a computer expansion card standard, such as the Peripheral Component Interconnect Express (PCIe) standard. The failover input/output device connects to redundant first and second virtualized input/output controller devices each comprising multiple virtual network interfaces that are in an active or standby state at any given time, and to a computing device that hosts one or more processes. The failover input/output device broadcasts transactions in accordance with the computer expansion card standard initiated from the computing device to the first and second virtualized input/output controller devices.Type: ApplicationFiled: April 14, 2011Publication date: October 18, 2012Applicant: CISCO TECHNOLOGY, INC.Inventors: Michael B. Galles, Luca Cafiero