Patents by Inventor Luca Cafiero

Luca Cafiero has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7256684
    Abstract: A network node determines the suitability of coupled devices for being remotely line powered before actually powering them. The node scan its ports to determine which ports are coupled to devices. The node then interrogates the coupled devices. A unique discovery tone or bit pattern is generated and sent to devices coupled to ports. The node then monitors the port for a return signal. If there is a return signal, it is compared to the transmitted discovery signal. The signal will be identical after allowing for line losses if the coupled device is suitable for remote line powering. If the comparison yields a match, the network node supplies remote line power to the device.
    Type: Grant
    Filed: April 29, 2004
    Date of Patent: August 14, 2007
    Assignee: Cisco Technology, Inc.
    Inventors: Luca Cafiero, Maurilio De Nicolo, Thomas Edsall, Karl Nakamura, Soei-Shin Hang
  • Patent number: 7185821
    Abstract: An electronic interconnection system for delivering high-current power and ground voltages using a non-bottom side of a chip package substrate. The system includes a printed wiring board (PWB), a chip package, and a bridge lead. The PWB has at least a first and a second contact pad. The chip package includes a chip and a package substrate. The chip is mounted onto the package substrate and the package substrate has a bottom surface having at least a first contact pad and a second surface having at least a second contact pad. The first contact pad of the PWB and the first contact pad of the package substrate are coupled together. The bridge lead couples the second contact pad of the PWB with the second contact pad of the package substrate. The bridge lead may be selected from styles including flying lead, edge wiping, top wiping, and double wiping.
    Type: Grant
    Filed: July 7, 2003
    Date of Patent: March 6, 2007
    Assignee: Cisco Technology, Inc.
    Inventors: Sergio Camerlo, Yida Zou, Luca Cafiero, Gary L. Myers, Bobby Parizi, Hsing-Sheng Liang
  • Publication number: 20060101140
    Abstract: The present invention provides methods and devices for implementing a Low Latency Ethernet (“LLE”) solution, also referred to herein as a Data Center Ethernet (“DCE”) solution, which simplifies the connectivity of data centers and provides a high bandwidth, low latency network for carrying Ethernet and storage traffic. Some aspects of the invention involve transforming FC frames into a format suitable for transport on an Ethernet. Some preferred implementations of the invention implement multiple virtual lanes (“VLs”) in a single physical connection of a data center or similar network. Some VLs are “drop” VLs, with Ethernet-like behavior, and others are “no-drop” lanes with FC-like behavior. Some preferred implementations of the invention provide guaranteed bandwidth based on credits and VL. Active buffer management allows for both high reliability and low latency while using small frame buffers. Preferably, the rules for active buffer management are different for drop and no drop VLs.
    Type: Application
    Filed: March 18, 2005
    Publication date: May 11, 2006
    Applicant: Cisco Technology, Inc.
    Inventors: Silvano Gai, Thomas Edsall, Luca Cafiero, Davide Bergamasco, Dinesh Dutt, Flavio Bonomi
  • Publication number: 20060098681
    Abstract: The present invention provides methods and devices for implementing a Low Latency Ethernet (“LLE”) solution, also referred to herein as a Data Center Ethernet (“DCE”) solution, which simplifies the connectivity of data centers and provides a high bandwidth, low latency network for carrying Ethernet and storage traffic. Some aspects of the invention involve transforming FC frames into a format suitable for transport on an Ethernet. Some preferred implementations of the invention implement multiple virtual lanes (“VLs”) in a single physical connection of a data center or similar network. Some VLs are “drop” VLs, with Ethernet-like behavior, and others are “no-drop” lanes with FC-like behavior. Some preferred implementations of the invention provide guaranteed bandwidth based on credits and VL. Active buffer management allows for both high reliability and low latency while using small frame buffers. Preferably, the rules for active buffer management are different for drop and no drop VLs.
    Type: Application
    Filed: March 10, 2005
    Publication date: May 11, 2006
    Applicant: Cisco Technology, Inc.
    Inventors: Luca Cafiero, Silvano Gai
  • Publication number: 20060092826
    Abstract: Redundancy of data and/or Inline Power in a wired data telecommunications network from a pair of power sourcing equipment (PSE) devices via an automatic selection device is provided by providing redundant signaling to/from each of the pair of PSE devices, and coupling a port of one PSE device and a redundant port of the second PSE device to respective first and second interfaces of a port of the selection device. The selection device initially selects one of the two PSE devices and communicates data and/or Inline Power to a third interface of the selection device. A powered device (PD) coupled to that third interface communicates data and/or Inline Power with the selected one of the first and second PSE device through the selection device. Upon detection of a condition, such as a failure condition, the selection device may select the other of the two interfaces.
    Type: Application
    Filed: October 7, 2004
    Publication date: May 4, 2006
    Inventors: Roger Karam, Luca Cafiero
  • Publication number: 20060078093
    Abstract: Redundancy of data and/or Inline Power in a wired data telecommunications network from a first network device and a second network device configured as power sourcing equipment (PSE) devices and coupled together and to a third network device (such as a PD) via a Y device is provided by providing redundant signaling to/from each of the pair of network devices, and coupling a port of each of the network devices to the Y device and from there to a third port where a third network device such as a PD may be coupled. Because the Y device is essentially passive, communications paths between the PSE devices and the PD are provided for negotiating master/slave status and other status and related information among the respective network devices. Dynamic impedance matching is provided to handle situations where not all devices are plugged in and as a communications technique among the devices.
    Type: Application
    Filed: November 30, 2004
    Publication date: April 13, 2006
    Inventors: Roger Karam, Luca Cafiero
  • Publication number: 20060077888
    Abstract: Redundancy of data and/or inline power in a wired data telecommunications network from a pair of network devices via a selection device is provided by communicating redundant signals with each of the pair of network devices and coupling ports of the first network device and corresponding ports of the second network device to paired inputs of the selection device. The selection device operates: 1) under the control of the pair of network devices, one acting as master and one as slave, the master selecting (for each port or for all ports) one of the two paired inputs and causing the selection device to communicate data and/or inline power via a third port of the selection device to a third network device receiving data connectivity and/or inline power from the selection device; or 2) to route two redundant signals to a third network device which then selects one for use.
    Type: Application
    Filed: December 23, 2004
    Publication date: April 13, 2006
    Inventors: Roger Karam, Luca Cafiero
  • Patent number: 6842453
    Abstract: A shortcut technique implements forwarding decision shortcuts at a switch for frames routed between subnetworks of a computer network. The switch monitors the flow of a first frame of a particular type to and from the router, which renders a forwarding decision for routing the frame. The switch records information stored in network layer header of a packet encapsulated within the first frame, and then compares that information with the information stored in network layer headers of packets contained within subsequent frames of that particular type. Forwarding decisions for these subsequent frames are then rendered by hardware logic circuits of the switch rather than by the router.
    Type: Grant
    Filed: July 14, 2000
    Date of Patent: January 11, 2005
    Assignee: Cisco Technology
    Inventors: Ray Kloth, Thomas J. Edsall, Luca Cafiero
  • Publication number: 20040139167
    Abstract: An apparatus and method for a scalable network attached storage system. The apparatus includes a scalable network attached storage system, the network attached storage system including one or more termination nodes, one or more file server nodes for maintaining file systems, one or more disk controller nodes for accessing storage disks respectively, and a switching fabric coupling the one or more termination node, file server nodes, and disk controller nodes. The one or more termination nodes, file server nodes and disk controller nodes can be scaled as needed to meet user demands.
    Type: Application
    Filed: December 6, 2002
    Publication date: July 15, 2004
    Applicant: Andiamo Systems Inc., A Delaware Corporation
    Inventors: Thomas James Edsall, Mario Mazzola, Prem Jain, Silvano Gai, Luca Cafiero, Maurilio De Nicolo
  • Patent number: 6762675
    Abstract: A network node determines the suitability of coupled devices for being remotely line powered before actually powering them. The node scan its ports to determine which ports are coupled to devices. The node then interrogates the coupled devices. A unique discovery tone or bit pattern is generated and sent to devices coupled to ports. The node then monitors the port for a return signal. If there is a return signal, it is compared to the transmitted discovery signal. The signal will be identical after allowing for line losses if the coupled device is suitable for remote line powering. If the comparison yields a match, the network node supplies remote line power to the device.
    Type: Grant
    Filed: September 27, 1999
    Date of Patent: July 13, 2004
    Assignee: Cisco Technology, Inc.
    Inventors: Luca Cafiero, Maurilio De Nicolo, Thomas Edsall, Karl Nakamura, Soei-Shin Hang
  • Patent number: 6147993
    Abstract: A shortcut technique implements forwarding decision shortcuts at a switch for frames routed between subnetworks of a computer network. The switch monitors the flow of a first frame of a particular type to and from the router, which renders a forwarding decision for routing the frame. The switch records information stored in network layer header of a packet encapsulated within the first frame, and then compares that information with the information stored in network layer headers of packets contained within subsequent frames of that particular type. Forwarding decisions for these subsequent frames are then rendered by hardware logic circuits of the switch rather than by the router.
    Type: Grant
    Filed: October 14, 1997
    Date of Patent: November 14, 2000
    Assignee: Cisco Technology, Inc.
    Inventors: Ray Kloth, Thomas J. Edsall, Luca Cafiero
  • Patent number: 5796732
    Abstract: A switching bus architecture enables efficient transfer of data within a network switch having a plurality of ports interconnected by a high-performance switching bus. The architecture is preferably implemented as novel port interface and forwarding engine circuitry that cooperate to efficiently transmit data to, and receive data from, the switching bus in accordance with a 2-tier arbitration policy that ensures adequate port access to the bus. As a result of such a cooperating arrangement, the architecture improves the transfer efficiency of the switch by providing all ports sufficient bus access to convey accurate data throughout the switch.
    Type: Grant
    Filed: March 28, 1996
    Date of Patent: August 18, 1998
    Assignee: Cisco Technology, Inc.
    Inventors: Mario Mazzola, Tom Edsall, Massimo Prati, Luca Cafiero
  • Patent number: 5740171
    Abstract: An address translation mechanism quickly and efficiently renders forwarding decisions for data flames transported among ports of a high-performance switch on the basis of, inter alia, virtual local area network (VLAN) associations among the ports. The translation mechanism comprises a plurality of forwarding tables, each of which contains entries having unique index values that translate to selection signals for ports destined to received the data frames. Each port is associated with a unique index value and a VLAN identifier to facilitate multicast data transfers within the switch at accelerated speeds and addressing capabilities.
    Type: Grant
    Filed: March 28, 1996
    Date of Patent: April 14, 1998
    Assignee: Cisco Systems, Inc.
    Inventors: Mario Mazzola, Tom Edsall, Luca Cafiero
  • Patent number: 5280500
    Abstract: A multilevel encoding scheme for transmitted data that encodes data in a multilevel code wherein the amplitude of any transition is always exactly one level during any time interval. A single-level transition between any two adjacent levels during a time interval represents a logical "1"; no transition during a time interval represents a logical "0". In a specific embodiment, modulation is limited to three defined amplitude levels equally space in amplitude and encoding is according to a three-level code. A four-bit to five-bit encoding scheme may be used to distribute bits for minimizing d.c. offset. The input data is preferably further scrambled to minimize aberrations in the emissions spectrum of signal carried over unshielded media.
    Type: Grant
    Filed: October 10, 1991
    Date of Patent: January 18, 1994
    Assignee: Crescendo Communications, Inc.
    Inventors: Mario Mazzola, Luca Cafiero, Maurilio DeNicolo
  • Patent number: 4584690
    Abstract: A high-speed digital transceiver is provided for use in a PBX environment comprising twisted-pair wire cables interconnecting like transceivers, each transceiver being operative to exchange voice, data and control information in a packetized format over a common twisted-pair cable. Specifically, each transceiver communicates packetized pulse code modulated information in pure Alternate Mark Inverted (AMI) coding, that is, without the introduction of bipolar violation pulses to provide timing. Frame synchronization is acquired on the first pulse by the use of a digital circuit deriving synchronization from a local high-speed clock. The use of a high-speed clock-driven digital circuit for synchronization acquisition eliminates the need for a phase-locked loop synchronization scheme and its concomitant finite acquisition delay.
    Type: Grant
    Filed: May 7, 1984
    Date of Patent: April 22, 1986
    Assignee: D.A.V.I.D. Systems, Inc.
    Inventors: Luca Cafiero, Mario Mazzola, Massimo Prati