Abstract: A method of digital BTSC (Broadcast Television Systems Committee) encoding featuring integrated digital FM modulation comprises digitally encoding and FM modulating. A left audio input signal (64) and a right audio input signal (66) are digitally encoded into a digital composite audio signal (79) via a digital BTSC audio processor (78). Responsive to the digital composite audio signal (79), a digital FM modulator (82) digitally FM modulates the digital composite audio signal (79) into a digital FM modulated composite audio signal (83).

Abstract: A digital BTSC (Broadcast Television Systems Committee) encoder (52) featuring integrated digital FM modulation comprises a digital BTSC audio processor (78) and a digital FM modulator (82). The digital BTSC audio processor module (78) is responsive to a left audio input signal (64) and a right audio input signal (66) for digitally encoding the left and right audio input signals into a digital composite audio signal (79). The digital FM modulator (82) is responsive to the digital composite audio signal (79) for FM modulating the digital composite audio signal into a digital FM modulated composite audio signal (83) and outputting the digital FM modulated composite audio signal.

Abstract: A BTSC encoder includes a sum channel (L+R), a difference channel (L?R), and one or more of a phase compensator and an amplitude compensator. The sum channel (L+R) has a L audio input for receiving a digital L audio signal, a right (R) audio input for receiving a digital R audio signal, and an output for providing a digital L+R signal. The difference channel (L?R) has a L audio input for receiving the digital L audio signal, a right (R) audio input for receiving the digital R audio signal, and an output for providing a digital L?R signal. The phase compensator is coupled to the sum channel and/or the difference channel, and is for compensating for a phase difference between the digital L+R signal and the digital L?R signal. The amplitude compensator is coupled to the sum channel and/or the difference channel, for compensating for an amplitude difference between the digital L+R signal and the digital L?R signal.

Abstract: A BTSC encoder includes dual channel ADC, sync separator, audio processor, filtering device, and a composite audio signal generating device. The filtering device includes a first filter for providing a filtered L+R signal, and a second filter for providing at least one of: i) a filtered and combined pilot and modulated L?R signal and ii) separately filtered pilot and modulated L?R signals. The composite audio signal generating device is responsive to the filtered L+R signal, and at least one of i) the filtered and combined pilot and modulated L?R signal and ii) the separately filtered pilot and modulated L?R signals for generating and outputting a composite analog audio signal. In all embodiments, the modulated L?R signal is filtered via an anti-splatter filter.

Abstract: A circuit for performing an arithmetic function on a number performs the function using successive approximation. Each approximation produces an estimate of the result. A determination of the utility of this estimate is made by comparing the inverse function of a given estimate to the number. The current estimate is updated based on this comparison and the inverse function of the current estimate is stored. The next estimate is an incremental change from the previous estimate and there is a corresponding incremental change in the inverse function from the current estimate to the next estimate. Rather than calculating the whole inverse function, which would typically require a multiplier, only the incremental change in the inverse function is provided simply. The incremental change in the inverse function is then added to the inverse function of the current estimate and compared to the number for determining the utility of the next estimate.

Abstract: A digital video encoder (16) receives a reference clock signal (REF_CLK27) for determining both a short term and a long term phase correction factor. A pulse detector (46) determines a number of sample clock (CLK324) time periods between the reference clock signal (REF_CLK27) and a clock signal (CLK27) that is derived from the data received by the digital video encoder (16). A phase increment generator (56) supplies an accumulator circuit (58) with a long term phase increment value based on the number of sample clocks and a TV_standard signal. A counter (60) and a phase look-up table (62) supply a short term increment value. The combined short term and long term increment values provide phase and frequency accuracy for the video subcarrier signal.