Patents by Inventor Ludovic Ecarnot
Ludovic Ecarnot has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20250140601Abstract: A method for fabricating a double semiconductor-on-insulator structure comprising the steps of: providing a first donor substrate and a handle substrate, forming a weakened zone in the donor substrate so as to delimit a first semiconductor layer to be transferred, bonding the first donor substrate to the handle substrate, a first electrically insulating layer being at the interface, and detaching at the weakened zone, treating the surface of the first transferred semiconductor layer comprising: a rapid thermal annealing, a thermal oxidation followed by a deoxidation, a smoothing heat treatment at a temperature of above 1000° C. in a non-oxidizing atmosphere, chemical-mechanical polishing, providing a second donor substrate of a second semiconductor layer to be transferred, transferring the second semiconductor layer, a second electrically insulating layer being at the interface.Type: ApplicationFiled: January 30, 2023Publication date: May 1, 2025Inventors: Carine Duret, Ludovic Ecarnot, Charlene Porta
-
Publication number: 20250140600Abstract: A method is used to fabricate a double semiconductor-on-insulator structure comprising, from a back side to a front side of the structure: a handle substrate, a first electrically insulating layer, a first single-crystal semiconductor layer, a second electrically insulating layer and a second single-crystal semiconductor layer. The method comprises:—a first step of formation of an oxide layer on the front and back sides of the handle substrate, to form the first electrically insulating layer and an oxide layer on the back side of the handle substrate, —a first step of layer transfer, to transfer the first single-crystal semiconductor layer, —a second step of formation of an oxide layer, to form the second electrically insulating layer, and —a second step of layer transfer, to transfer the second single-crystal semiconductor layer.Type: ApplicationFiled: January 30, 2023Publication date: May 1, 2025Inventors: Carine Duret, Ludovic Ecarnot, Charlene Porta
-
Publication number: 20250072111Abstract: The invention relates to a front-side imager comprising in succession: a semiconductor carrier substrate, a first electrically insulating separating layer, and a single-crystal semiconductor layer, called the active layer, comprising a matrix array of photodiodes, wherein the imager further comprises, between the carrier substrate and the first electrically insulating layer: a second electrically insulating separating layer, and a second semiconductor or electrically conductive layer, called the intermediate layer, arranged between the second separating layer and the first separating layer, the second separating layer being thicker than the first separating layer.Type: ApplicationFiled: November 5, 2024Publication date: February 27, 2025Inventors: Walter Schwarzenbach, Manuel Sellier, Ludovic Ecarnot
-
Patent number: 12198975Abstract: A semiconductor on insulator type structure, which may be used for a front side type imager, successively comprises, from its rear side to its front side, a semiconductor support substrate, an electrically insulating layer and an active layer comprising a monocrystalline semiconductor material. The active layer is made of a semiconductor material having a state of mechanical stress with respect to the support substrate, and the support substrate comprises, on its rear side, a silicon oxide layer, the thickness of the oxide layer being chosen to compensate bow induced by the mechanical stress between the active layer and the support substrate during cooling of the structure after the formation by epitaxy of at least a part of the active layer on the support substrate.Type: GrantFiled: August 2, 2021Date of Patent: January 14, 2025Assignee: SoitecInventors: Walter Schwarzenbach, Oleg Kononchuk, Ludovic Ecarnot
-
Publication number: 20250015122Abstract: A structure for a front-side image sensor comprises a semiconductor substrate, an electrically insulating layer overlying the semiconductor substrate, and an active layer overlying the electrically insulating layer. The semiconductor substrate comprises a trapping layer, the trapping layer including cavities therein. The structure further comprises a plurality of electrically isolating trenches extending vertically through the active layer to the electrically insulating layer. The plurality of electrically isolating trenches define a plurality of pixels. Also disclosed is a structure comprises a carrier substrate, an electrically insulating layer overlying the carrier substrate and a trapping layer, and a semiconductive layer overlying the electrically insulating layer. The trapping layer comprises cavities therein. The structure further comprises a plurality of electrically isolating trenches extending vertically through the semiconductive layer to the electrically insulating layer.Type: ApplicationFiled: September 18, 2024Publication date: January 9, 2025Inventors: Walter Schwarzenbach, Ludovic Ecarnot, Damien Massy, Nadia Ben Mohamed, Nicolas Daval, Christophe Girard, Christophe Maleville
-
Patent number: 12148755Abstract: The invention relates to a front-side imager comprising in succession: —a semiconductor carrier substrate, a first electrically insulating separating layer, and a single-crystal semiconductor layer, called the active layer, comprising a matrix array of photodiodes, wherein the imager further comprises between the carrier substrate and the first electrically insulating layer: —a second electrically insulating separating layer, and —a second semiconductor or electrically conductive layer, called the intermediate layer, arranged between the second separating layer and the first separating layer, the second separating layer being thicker than the first separating layer.Type: GrantFiled: June 21, 2019Date of Patent: November 19, 2024Assignee: SoitecInventors: Walter Schwarzenbach, Manuel Sellier, Ludovic Ecarnot
-
Patent number: 12100727Abstract: A method of manufacturing a substrate for a front-facing image sensor, comprises:—providing a donor substrate comprising a semiconductor layer to be transferred,—providing a semiconductor carrier substrate,—bonding the donor substrate to the carrier substrate, an electrically insulating layer being at the bonding interface,—transferring the semiconductor layer to the carrier substrate,—implanting gaseous ions in the carrier substrate via the transferred semiconductor layer and the electrically insulating layer, and—after the implantation, epitaxially growing an additional semiconductor layer on the transferred semiconductor layer.Type: GrantFiled: December 23, 2019Date of Patent: September 24, 2024Assignee: SoitecInventors: Walter Schwarzenbach, Ludovic Ecarnot, Damien Massy, Nadia Ben Mohamed, Nicolas Daval, Christophe Girard, Christophe Maleville
-
Publication number: 20240145314Abstract: A method for manufacturing a CFET device comprises forming a substrate of the double semi-conductor on insulator type, successively comprising, from the base to the surface thereof: a carrier substrate, a first electrically insulating layer, a first single-crystal semiconductor layer, a second electrically insulating layer and a second single-crystal semiconductor layer. Slices are formed into the substrate to the first electrically insulating layer so as to form at least one fin (F). A channel of a first transistor is formed in the first semiconductor layer and a channel of a second transistor is formed opposite the first transistor in the second semiconductor layer. Formation of the substrate of the double semi-conductor on insulator type comprises: a first and a second step of transferring a layer and thermal processing at a temperature that is sufficiently high to smooth the first single-crystal semiconductor layer to a roughness lower than 0.1 nm RMS.Type: ApplicationFiled: January 2, 2024Publication date: May 2, 2024Inventors: Walter Schwarzenbach, Ludovic Ecarnot, Nicolas Daval, Bich-Yen Nguyen, Guillaume Besnard
-
Publication number: 20240030061Abstract: A donor substrate for transferring a single-crystal thin layer made of a first material, onto a receiver substrate. The donor substrate comprises: —a buried weakened plane delimiting an upper portion and a lower portion of the donor substrate, —in the upper portion, a first layer, a second layer adjacent to the buried weakened plane, and a stop layer between the first layer and the second layer the first layer composed of the first material, the stop layer being formed of a second material, —an amorphized sub-portion, made amorphous by ion implantation, having a thickness less than that of the upper portion, and including at least the first layer; the second layer comprising at least one single-crystal sub-layer, adjacent to the buried weakened plane. Two embodiments of a method may be used for transferring a single-crystal thin layer from the donor substrate.Type: ApplicationFiled: November 19, 2021Publication date: January 25, 2024Inventors: Larry Vincent, Shay Reboh, Lucie Le Van-Jodin, Frédéric Milesi, Ludovic Ecarnot, Gweltaz Gaudin, Didier Landru
-
Patent number: 11876020Abstract: A method for manufacturing a CFET device comprises forming a substrate of the double semi-conductor on insulator type, successively comprising, from the base to the surface thereof: a carrier substrate, a first electrically insulating layer, a first single-crystal semiconductor layer, a second electrically insulating layer and a second single-crystal semiconductor layer. Slices are formed into the substrate to the first electrically insulating layer so as to form at least one fin (F). A channel of a first transistor is formed in the first semiconductor layer and a channel of a second transistor is formed opposite the first transistor in the second semiconductor layer. Formation of the substrate of the double semi-conductor on insulator type comprises: a first and a second step of transferring a layer and thermal processing at a temperature that is sufficiently high to smooth the first single-crystal semiconductor layer to a roughness lower than 0.1 nm RMS.Type: GrantFiled: September 3, 2019Date of Patent: January 16, 2024Assignee: SOITECInventors: Walter Schwarzenbach, Ludovic Ecarnot, Nicolas Daval, Bich-Yen Nguyen, Guillaume Besnard
-
Patent number: 11855120Abstract: A substrate for a front-side type image sensor includes a supporting semiconductor substrate, an electrically insulating layer, and a silicon-germanium semiconductor layer, known as the active layer. The electrically insulating layer includes a stack of dielectric and metallic layers selected such that the reflectivity of the stack in a wavelength range of between 700 nm and 3 ?m is greater than the reflectivity of a silicon oxide layer having a thickness equal to that of the stack. The substrate also comprises a silicon layer between the electrically insulating layer and the silicon-germanium active layer. The disclosure also relates to a method for the production of such a substrate.Type: GrantFiled: February 4, 2022Date of Patent: December 26, 2023Assignee: SOITECInventors: Walter Schwarzenbach, Oleg Kononchuk, Ludovic Ecarnot, Christelle Michau
-
Publication number: 20230230874Abstract: A method for transferring a thin layer onto a carrier substrate comprises preparing a carrier substrate using a preparation method involving supplying a base substrate having, on a main face, a charge-trapping layer and forming a dielectric layer having a thickness greater than 200 nm on the charge-trapping layer. Once the dielectric layer is formed, the ionized deposition and sputtering of the dielectric layer are simultaneously performed. The transfer method also comprises assembling, by way of molecular adhesion and with an unpolished free face of the dielectric layer, a donor substrate to the dielectric layer of the carrier substrate, the donor substrate having an embrittlement plane defining the thin layer. Finally, the method comprises splitting the donor substrate at the embrittlement plane to release the thin layer and to transfer it onto the carrier substrate.Type: ApplicationFiled: June 23, 2021Publication date: July 20, 2023Inventors: Bruno Clemenceau, Ludovic Ecarnot, Aymen Ghorbel, Marcel Broekaart, Daniel Delprat, Séverin Rouchier, Stephane Thieffry, Carine Duret
-
Publication number: 20220319910Abstract: A process for hydrophilic bonding first and second substrates, comprising: —bringing the first and second substrates into contact to form a bonding interface between main surfaces of the first and second substrates, and —applying a heat treatment to close the bonding interface. The process further comprises, before the step of bringing into contact, depositing, on the main surface of the first and/or second substrate, a bonding layer comprising a non-metallic material that is permeable to dihydrogen and that has, at the temperature of the heat treatment, a yield strength lower than that of at least one of the materials of the first substrate and of the second substrate located at the bonding interface. The layer has a thickness between 1 and 6 nm, and the heat treatment is carried out at a temperature lower than or equal to 900° C., and preferably lower than or equal to 600° C.Type: ApplicationFiled: July 13, 2020Publication date: October 6, 2022Inventors: Vincent Larrey, François Rieutord, Jean-Michel Hartmann, Frank Fournel, Didier Landru, Oleg Kononchuk, Ludovic Ecarnot
-
Publication number: 20220157882Abstract: A substrate for a front-side type image sensor includes a supporting semiconductor substrate, an electrically insulating layer, and a silicon-germanium semiconductor layer, known as the active layer. The electrically insulating layer includes a stack of dielectric and metallic layers selected such that the reflectivity of the stack in a wavelength range of between 700 nm and 3 ?m is greater than the reflectivity of a silicon oxide layer having a thickness equal to that of the stack. The substrate also comprises a silicon layer between the electrically insulating layer and the silicon-germanium active layer. The disclosure also relates to a method for the production of such a substrate.Type: ApplicationFiled: February 4, 2022Publication date: May 19, 2022Inventors: Walter Schwarzenbach, Oleg Kononchuk, Ludovic Ecarnot, Christelle Michau
-
Patent number: 11282889Abstract: A substrate for a front-side type image sensor includes a supporting semiconductor substrate, an electrically insulating layer, and a silicon-germanium semiconductor layer, known as the active layer. The electrically insulating layer includes a stack of dielectric and metallic layers selected such that the reflectivity of the stack in a wavelength range of between 700 nm and 3 ?m is greater than the reflectivity of a silicon oxide layer having a thickness equal to that of the stack. The substrate also comprises a silicon layer between the electrically insulating layer and the silicon-germanium active layer. The disclosure also relates to a method for the production of such a substrate.Type: GrantFiled: January 10, 2018Date of Patent: March 22, 2022Assignee: SoitecInventors: Walter Schwarzenbach, Oleg Kononchuk, Ludovic Ecarnot, Christelle Michau
-
Publication number: 20220059603Abstract: A method of manufacturing a substrate for a front-facing image sensor, comprises:—providing a donor substrate comprising a semiconductor layer to be transferred,—providing a semiconductor carrier substrate,—bonding the donor substrate to the carrier substrate, an electrically insulating layer being at the bonding interface,—transferring the semiconductor layer to the carrier substrate,—implanting gaseous ions in the carrier substrate via the transferred semiconductor layer and the electrically insulating layer, and—after the implantation, epitaxially growing an additional semiconductor layer on the transferred semiconductor layer.Type: ApplicationFiled: December 23, 2019Publication date: February 24, 2022Inventors: Walter Schwarzenbach, Ludovic Ecarnot, Damien Massy, Nadia Ben Mohamed, Nicolas Daval, Christophe Girard, Christophe Maleville
-
Patent number: 11205702Abstract: A method for manufacturing a structure comprising a first substrate comprising at least one electronic component likely to be damaged by a temperature higher than 400° C. and a semiconductor layer extending on the first substrate comprises: (a) providing a first bonding metal layer on the first substrate, (b) providing a second substrate comprising successively: a semiconductor base substrate, a stack of a plurality of semiconductor epitaxial layers, a layer of SixGe1-x, with 0?x?1 being located at the surface of said stack opposite to the base substrate, and a second bonding metal layer, (c) bonding the first substrate and the second substrate through the first and second bonding metal layers at a temperature lower than or equal to 400° C., and (d) removing a part of the second substrate so as to transfer the layer of SixGe1-x on the first substrate using a selective etching process.Type: GrantFiled: March 31, 2017Date of Patent: December 21, 2021Assignee: SoitecInventors: Christophe Figuet, Ludovic Ecarnot, Bich-Yen Nguyen, Walter Schwarzenbach, Daniel Delprat, Ionut Radu
-
Publication number: 20210384223Abstract: The invention relates to a front-side imager comprising in succession: —a semiconductor carrier substrate, a first electrically insulating separating layer, and a single-crystal semiconductor layer, called the active layer, comprising a matrix array of photodiodes, wherein the imager further comprises between the carrier substrate and the first electrically insulating layer: —a second electrically insulating separating layer, and —a second semiconductor or electrically conductive layer, called the intermediate layer, arranged between the second separating layer and the first separating layer, the second separating layer being thicker than the first separating layer.Type: ApplicationFiled: June 21, 2019Publication date: December 9, 2021Inventors: Walter Schwarzenbach, Manuel Sellier, Ludovic Ecarnot
-
Publication number: 20210366763Abstract: A semiconductor on insulator type structure, which may be used for a front side type imager, successively comprises, from its rear side to its front side, a semiconductor support substrate, an electrically insulating layer and an active layer comprising a monocrystalline semiconductor material. The active layer is made of a semiconductor material having a state of mechanical stress with respect to the support substrate, and the support substrate comprises, on its rear side, a silicon oxide layer, the thickness of the oxide layer being chosen to compensate bow induced by the mechanical stress between the active layer and the support substrate during cooling of the structure after the formation by epitaxy of at least a part of the active layer on the support substrate.Type: ApplicationFiled: August 2, 2021Publication date: November 25, 2021Inventors: Walter Schwarzenbach, Oleg Kononchuk, Ludovic Ecarnot
-
Patent number: 11127624Abstract: A semiconductor on insulator type structure, which may be used for a front side type imager, successively comprises, from its rear side to its front side, a semiconductor support substrate, an electrically insulating layer and an active layer comprising a monocrystalline semiconductor material. The active layer is made of a semiconductor material having a state of mechanical stress with respect to the support substrate, and the support substrate comprises, on its rear side, a silicon oxide layer, the thickness of the oxide layer being chosen to compensate bow induced by the mechanical stress between the active layer and the support substrate during cooling of the structure after the formation by epitaxy of at least a part of the active layer on the support substrate.Type: GrantFiled: March 21, 2018Date of Patent: September 21, 2021Assignee: SoitecInventors: Walter Schwarzenbach, Oleg Kononchuk, Ludovic Ecarnot