Abstract: The invention relates to a finishing method for a silicon-on-insulator (SOI) substrate that includes an oxide layer buried between an active silicon layer and a support layer of silicon. The method includes applying the following steps in succession: a first rapid thermal annealing (RTA) of the SOI substrate; a sacrificial oxidation of the active silicon layer of the substrate conducted to remove a first oxide thickness; a second RTA of the substrate; and a second sacrificial oxidation of the active silicon layer conducted to remove a second oxide thickness that is thinner than the first oxide thickness.

Abstract: The invention concerns a method to thin an initial silicon-on-insulator substrate that has a layer of silicon oxide buried between a silicon carrier substrate and a silicon surface layer.

Abstract: The present invention provides improved methods for fabricating compound-material wafers, in particular a silicon on insulator type wafer. The improved methods lead to reduced numbers of deflects arising on or near the periphery of the wafers. In a first method, wafers are selected in dependence on edge roll off values determined at about 0.5-2.5 mm away from the edge of the wafer, where edge roll off values are determined in dependence on the second derivative of the wafer height profiles. In a second method, wafers selected according to the first method are further processed by bonding, forming a splitting layer, and detaching the two wafers at the splitting layer.

Abstract: A method for reducing the roughness of a free surface of a semiconductor wafer that includes establishing a first atmosphere in an annealing chamber, replacing the first atmosphere with a second atmosphere that includes a gas selected to and in an amount to substantially eliminate or reduce pollutants on a wafer, and exposing the free surface of the wafer to the second atmosphere to substantially eliminate or reduce pollutants thereon. The second atmosphere is then replaced with a third atmosphere that includes pure, and rapid thermal annealing is performed on the wafer exposed to the third atmosphere in the annealing chamber to substantially reduce the roughness of the free surface of the wafer.

Abstract: The invention provides a method for reducing the roughness of a free surface of a semiconductor wafer that includes removing material from the free surface of the wafer to provide a treated wafer, and performing a first rapid thermal annealing on the treated wafer in a pure argon atmosphere to substantially reduce the roughness of the free surface of the treated wafer. The material removal is selected and conducted to improve the effectiveness of the subsequent rapid thermal annealing in reducing the roughness of the free surface of the treated wafer.

Abstract: The present invention provides improved methods for fabricating compound-material wafers, in particular a silicon on insulator type wafer. The improved methods lead to reduced numbers of deflects arising on or near the periphery of the wafers. In a first method, wafers are selected in dependence on edge roll off values determined at about 0.5-2.5 mm away from the edge of the wafer, where edge roll off values are determined in dependence on the second derivative of the wafer height profiles. In a second method, wafers selected according to the first method are further processed by bonding, forming a splitting layer, and detaching the two wafers at the splitting layer.

Abstract: A method for minimizing slip line faults on a surface of a semiconductor wafer that has been obtained using a transfer technique. The method includes heating the semiconductor wafer from an ambient temperature to a first higher temperature and pausing the heating at the first higher temperature for a time sufficient to stabilize the wafer. Then the wafer is heated further from the first higher temperature to a target higher temperature during a predetermined time interval. The further heating during an initial portion of the time interval is conducted at a relatively low heating rate and the heating during a final portion of the time interval is conducted at a relatively higher heating rate to thus minimize slip line faults in the surface of the wafer.

Abstract: The invention provides a method for reducing the roughness of a free surface of a semiconductor wafer that includes removing material from the free surface of the wafer to provide a treated wafer, and performing a first rapid thermal annealing on the treated wafer in a pure argon atmosphere to substantially reduce the roughness of the free surface of the treated wafer. The material removal is selected and conducted to improve the effectiveness of the subsequent rapid thermal annealing in reducing the roughness of the free surface of the treated wafer.

Abstract: A method for reducing the roughness of a free surface of a semiconductor wafer that includes establishing a first atmosphere in an annealing chamber, replacing the first atmosphere with a second atmosphere that includes a gas selected to and in an amount to substantially eliminate or reduce pollutants on a wafer, and exposing the free surface of the wafer to the second atmosphere to substantially eliminate or reduce pollutants thereon. The second atmosphere is then replaced with a third atmosphere that includes pure, and rapid thermal annealing is performed on the wafer exposed to the third atmosphere in the annealing chamber to substantially reduce the roughness of the free surface of the wafer.

Abstract: The invention provides a method of reducing the roughness of the free surface of a wafer of semiconductor material by applying a rapid thermal annealing process under a pure argon atmosphere for a time sufficient to uniformly heat and smooth the free surface of the wafer.

Abstract: The invention provides a method of reducing the roughness of the free surface of a wafer of semiconductor material by applying a rapid thermal annealing process under a pure argon atmosphere for a time sufficient to uniformly heat and smooth the free surface of the wafer.

Abstract: A method for minimizing slip line faults on a surface of a semiconductor wafer that has been obtained using a transfer technique. The method includes heating the semiconductor wafer from an ambient temperature to a first higher temperature and pausing the heating at the first higher temperature for a time sufficient to stabilize the wafer. Then the wafer is heated further from the first higher temperature to a target higher temperature during a predetermined time interval. The further heating during an initial portion of the time interval is conducted at a relatively low heating rate and the heating during a final portion of the time interval is conducted at a relatively higher heating rate to thus minimize slip line faults in the surface of the wafer.