Patents by Inventor Luis-Felipe Giles

Luis-Felipe Giles has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080197383
    Abstract: A method of manufacturing a semiconductor element. A dislocation region is formed between a first layer and a second layer, the dislocation region including a plurality of dislocations. First interstitials in the first layer are at least partially eliminated using the dislocations in the dislocation region. Vacancies are formed in the second layer. Second interstitials in the second layer are at least partially eliminated using the vacancies in the second layer.
    Type: Application
    Filed: February 16, 2007
    Publication date: August 21, 2008
    Applicant: INFINEON TECHNOLOGIES AG
    Inventor: Luis-Felipe Giles
  • Publication number: 20080149929
    Abstract: In a method of producing a semiconductor element in a substrate, a plurality of carbide precipitates is formed in the substrate, doping atoms are implanted into the substrate, thereby forming crystal defects in the substrate, the substrate is heated, such that at least a part of the crystal defects is eliminated using the carbide precipitates, and the semiconductor element is formed using the doping atoms.
    Type: Application
    Filed: December 22, 2006
    Publication date: June 26, 2008
    Applicant: INFINEON TECHNOLOGIES AG
    Inventor: Luis-Felipe Giles
  • Publication number: 20070161219
    Abstract: In a method for fabricating a semiconductor element in a substrate, micro-cavities are formed in the substrate. Furthermore, doping atoms are implanted into the substrate, whereby crystal defects are produced in the substrate. The substrate is heated, so that at least some of the crystal defects are eliminated using the micro-cavities, and the semiconductor element is formed using the doping atoms.
    Type: Application
    Filed: November 14, 2006
    Publication date: July 12, 2007
    Applicant: INFINEON TECHNOLOGIES AG
    Inventor: Luis-Felipe Giles
  • Publication number: 20070117296
    Abstract: In a method for fabricating a field effect transistor, a first source/drain region and a second source/drain region are formed in a substrate. A channel region is formed between the first source/drain region and the second source/drain region. A gate region is formed on the channel region. Micro-cavities are formed in the substrate at least below the channel region, and the micro-cavities are oxidized.
    Type: Application
    Filed: November 14, 2006
    Publication date: May 24, 2007
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Luis-Felipe Giles, Frank Lau, Rainer Liebmann