Patents by Inventor Luis Flores

Luis Flores has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160357211
    Abstract: This invention is an electronic circuit with a low power retention mode. A single integrated circuit includes a circuit module and a droop switch circuit supplied by a voltage regulator. In a normal mode a PMOS source-drain channel connects the voltage regulator power to the circuit module power input or isolates them dependent upon a power switch input. In a low power mode a second PMOS connected between the first PMOS gate and output diode connects the first PMOS. This supplied the circuit module from the voltage regulator power as reduced in voltage by a diode forward bias drop. This lower voltage should be sufficient for flip-flops in the circuit module to retain their state while not guaranteeing logic operation. There may be a plurality of chain connected droop switch each powering a corresponding circuit module.
    Type: Application
    Filed: August 15, 2016
    Publication date: December 8, 2016
    Inventors: Ramakrishnan Venkatasubramanian, Shane Stelmach, Soman Purushotaman, Michael Gill, Jose Luis Flores
  • Publication number: 20160357210
    Abstract: A power supply for an electronic circuit enables a low effort retention mode. During a normal mode a circuit module is supplied a first voltage sufficient for a controlled circuit to operate. During the low effort retention mode the circuit module is supplied with a second voltage lower than the first voltage. The second voltage is sufficient for flop-flops to retain their state but not sufficient to guarantee proper circuit operation. The second voltage is produced by a voltage drop (droop) from the first voltage. The preferred embodiment includes a System On Chip and one external voltage regulator and an on-chip droop circuit for each circuit module.
    Type: Application
    Filed: June 8, 2015
    Publication date: December 8, 2016
    Inventors: Michael Gill, Ramakrishnan Venkatasubramanian, Shane Stelmach, Jose Luis Flores
  • Patent number: 9417648
    Abstract: This invention is an electronic circuit with a low power retention mode. A single integrated circuit includes a circuit module and a droop switch circuit supplied by a voltage regulator. In a normal mode a PMOS source-drain channel connects the voltage regulator power to the circuit module power input or isolates them dependent upon a power switch input. In a low power mode a second PMOS connected between the first PMOS gate and output diode connects the first PMOS. This supplied the circuit module from the voltage regulator power as reduced in voltage by a diode forward bias drop. This lower voltage should be sufficient for flip-flops in the circuit module to retain their state while not guaranteeing logic operation. There may be a plurality of chain connected droop switch each powering a corresponding circuit module.
    Type: Grant
    Filed: June 8, 2015
    Date of Patent: August 16, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Ramakrishnan Venkatasubramanian, Shane Stelmach, Soman Purushotaman, Michael Gill, Jose Luis Flores
  • Patent number: 9246325
    Abstract: The present invention relates to a transformer substation (6) comprising high-voltage switchgear (1), a low-voltage switchboard (3) and a transformer (2) which are electrically interconnected on the upper cover (5) of the transformer (2) through a shielded direct single-pole connection. The high-voltage electric connection (4) is carried out by means of a connection device (8) which, in combination with a control/protection device (10), allows carrying out the safe and integral protection of people and property against possible malfunctions in the transformer substation (6), limiting said malfunctions and preventing disturbances of the high-voltage and low-voltage network.
    Type: Grant
    Filed: July 28, 2010
    Date of Patent: January 26, 2016
    Assignee: ORMAZABAL Y CIA, S.L.U.
    Inventors: Carlos Coca Figuerola, Jose Ignacio Carmona Ruiz, Luis Flores Losada, Jose Antonio Sanchez Ruiz, Jose Luis Sabas Fernandez, Miguel Rubio Chuan
  • Patent number: 9098438
    Abstract: A method is provided for scaling voltage in an integrated circuit. A calibration operation is performed on a functional module on the integrated circuit periodically at a rate T1. At least one parameter on the integrated circuit in monitored to determine when a performance threshold is reached. A change is initiated to an operating voltage for a portion of the integrated circuit in response to reaching the threshold. The rate of performing calibration operation is increased to a higher rate T2 for a window of time W in response to initiating the change in operating voltage, after which the rate of performing calibration is returned to the rate T1.
    Type: Grant
    Filed: August 25, 2011
    Date of Patent: August 4, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Jose Luis Flores, Lewis Nardini, Ritesh Sojitra, Denis Roland Beaudoin
  • Publication number: 20140159800
    Abstract: A method of adaptive voltage scaling is shown incorporating a lookup table holding manufacturing characterization data in conjunction with one or more precision analog temperature sensors used for correcting for temperature effects.
    Type: Application
    Filed: December 11, 2013
    Publication date: June 12, 2014
    Inventors: Jose Luis Flores, Anthony Martin Hill, Francisco Adolfo Cano
  • Publication number: 20140159801
    Abstract: Power consumption is reduced by the use of a plurality of parameter reference targets, optimized for a subset of the complete temperature range. The prediction accuracy of the performance tracking sensor is optimized by using small segments of the operating temperature range.
    Type: Application
    Filed: December 11, 2013
    Publication date: June 12, 2014
    Inventors: Jose Luis Flores, Anthony Martin Hill, Francisco Adolfo Cano
  • Patent number: 8721441
    Abstract: A competitive music related video game including game play interaction between game players.
    Type: Grant
    Filed: January 15, 2008
    Date of Patent: May 13, 2014
    Assignee: Activision Publishing, Inc.
    Inventors: Travis Andrew Chen, Alan Luis Flores
  • Patent number: 8547164
    Abstract: An integrated circuit is provided with a set of sensors for scaling voltage based on performance of the integrated circuit. The set of sensors are monitored, and sensor provides an output value indicative of a performance metric of the integrated circuit. The output values from the set of sensors are combined using a calibrated model to determine when a threshold value is reached. A change to an operating voltage for a portion of the integrated circuit is initiated in response to reaching the threshold.
    Type: Grant
    Filed: August 25, 2011
    Date of Patent: October 1, 2013
    Assignee: Texas Instruments Incorporated
    Inventors: Jose Luis Flores, Anthony M. Hill
  • Patent number: 8512475
    Abstract: This invention refers to a process for purifying sugar syrup, usually called liquid sugar, prepared with raw granulated cane sugar, in order to obtain a product called purified liquid sugar, with a degree of purity, referred to the content of ashes and color, similar or greater that the purity of a syrup prepared from refined granulated cane sugar, which is equivalent to a content of ICUMSA conductimetric ashes below 0.04% and a color of less than 45 ICUMSA units. The increase in direct reducing sugars content in the product is less than 0.2% with respect to the content of reducing sugars present in raw granulated cane sugar used as raw material for this process, and the pH is kept in the range of 6.0 to 7.5.
    Type: Grant
    Filed: October 13, 2008
    Date of Patent: August 20, 2013
    Assignee: Comercializador de Productos Basicos de Mexico, S.A. de C.V.
    Inventors: Mario Cesar Bojorquez Valenzuela, Francisco Javier Perez Martinez, Jose Luis Flores Montano
  • Publication number: 20130182355
    Abstract: The present invention relates to a transformer substation (6) comprising high-voltage switchgear (1), a low-voltage switchboard (3) and a transformer (2) which are electrically interconnected on the upper cover (5) of the transformer (2) through a shielded direct single-pole connection. The high-voltage electric connection (4) is carried out by means of a connection device (8) which, in combination with a control/protection device (10), allows carrying out the safe and integral protection of people and property against possible malfunctions in the transformer substation (6), limiting said malfunctions and preventing disturbances of the high-voltage and low-voltage network.
    Type: Application
    Filed: July 28, 2010
    Publication date: July 18, 2013
    Applicant: ORMAZABAL Y CIA, S.L.U
    Inventors: Carlos Coca Figuerola, Jose Ignacio Carmona Ruiz, Luis Flores Losada, Jose Antonio Sanchez Ruiz, Jose Luis Sabas Fernandez, Miguel Rubio Chuan
  • Patent number: 8452968
    Abstract: Systems, methods, apparatus and computer-executable instructions stored on computer-readable media for communicating a modified hash message authentication code (HMAC) signed message between two endpoints are provided. The HMAC signature of the message may include a plurality of components. In some cases, the HMAC signature is a Server Message Block (SMB) signature. The first and/or second endpoint may be a client, server, or host. Some embodiments of the present application utilize a proxy, such as a CIFS proxy. In one embodiment, HMAC signature information sent from the first endpoint to the second endpoint may be intercepted. A value for a component of the HMAC signature may be determined by, for example, using the intercepted HMAC signature information. The intercepted message may be modified, resigned using the intercepted HMAC signature information, and transmitted to a receiving endpoint.
    Type: Grant
    Filed: September 15, 2008
    Date of Patent: May 28, 2013
    Assignee: Blue Coat Systems, Inc.
    Inventor: Jose Luis Flores
  • Patent number: 8201004
    Abstract: An embedded megamodule and an embedded CPU enable power-saving through a combination of hardware and software. The CPU configures the power-down controller (PDC) logic within megamodule and can software trigger a low-power state of logic modules during processor IDLE periods. To wake from this power-down state, a system event is asserted to the CPU through the module interrupt controller. Thus the entry into a low-power state is software-driven during periods of inactivity and power restoration is on system activity that demands the attention of the CPU.
    Type: Grant
    Filed: September 14, 2007
    Date of Patent: June 12, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Timothy David Anderson, Lewis Nardini, Jose Luis Flores, Abhijeet Chachad, Raguram Damodaran, Joseph R. M. Zbiciak, Gary Swoboda
  • Publication number: 20120084575
    Abstract: A method is provided for scaling voltage in an integrated circuit. A calibration operation is performed on a functional module on the integrated circuit periodically at a rate T1. At least one parameter on the integrated circuit in monitored to determine when a performance threshold is reached. A change is initiated to an operating voltage for a portion of the integrated circuit in response to reaching the threshold. The rate of performing calibration operation is increased to a higher rate T2 for a window of time W in response to initiating the change in operating voltage, after which the rate of performing calibration is returned to the rate T1.
    Type: Application
    Filed: August 25, 2011
    Publication date: April 5, 2012
    Inventors: Jose Luis Flores, Lewis Nardini, Ritesh Sojitra, Denis Roland Beaudoin
  • Publication number: 20120075005
    Abstract: An integrated circuit is provided with a set of sensors for scaling voltage based on performance of the integrated circuit. The set of sensors are monitored, and sensor provides an output value indicative of a performance metric of the integrated circuit. The output values from the set of sensors are combined using a calibrated model to determine when a threshold value is reached. A change to an operating voltage for a portion of the integrated circuit is initiated in response to reaching the threshold.
    Type: Application
    Filed: August 25, 2011
    Publication date: March 29, 2012
    Inventors: Jose Luis Flores, Anthony M. Hill
  • Publication number: 20100307485
    Abstract: This invention refers to a process for purifying sugar syrup, usually called liquid sugar, prepared with raw granulated cane sugar, in order to obtain a product called purified liquid sugar, with a degree of purity, referred to the content of ashes and color, similar or greater that the purity of a syrup prepared from refined granulated cane sugar, which is equivalent to a content of ICUMSA conductimetric ashes below 0.04% and a color of less than 45 ICUMSA units. The increase in direct reducing sugars content in the product is less than 0.2% with respect to the content of reducing sugars present in raw granulated cane sugar used as raw material for this process, and the pH is kept in the range of 6.0 to 7.5.
    Type: Application
    Filed: October 13, 2008
    Publication date: December 9, 2010
    Inventors: Mario Cesar Bojorquez Valenzuela, Francisco Javier Perez Martinez, Jose Luis Flores Montano
  • Publication number: 20100070770
    Abstract: Systems, methods, apparatus and computer-executable instructions stored on computer-readable media for communicating a modified hash message authentication code (HMAC) signed message between two endpoints are provided. The HMAC signature of the message may include a plurality of components. In some cases, the HMAC signature is a Server Message Block (SMB) signature. The first and/or second endpoint may be a client, server, or host. Some embodiments of the present application utilize a proxy, such as a CIFS proxy. In one embodiment, HMAC signature information sent from the first endpoint to the second endpoint may be intercepted. A value for a component of the HMAC signature may be determined by, for example, using the intercepted HMAC signature information. The intercepted message may be modified, resigned using the intercepted HMAC signature information, and transmitted to a receiving endpoint.
    Type: Application
    Filed: September 15, 2008
    Publication date: March 18, 2010
    Inventor: Jose Luis Flores
  • Publication number: 20080068239
    Abstract: An embedded megamodule and an embedded CPU enable power-saving through a combination of hardware and software. The CPU configures the power-down controller (PDC) logic within megamodule and can software trigger a low-power state of logic modules during processor IDLE periods. To wake from this power-down state, a system event is asserted to the CPU through the module interrupt controller. Thus the entry into a low-power state is software-driven during periods of inactivity and power restoration is on system activity that demands the attention of the CPU.
    Type: Application
    Filed: September 14, 2007
    Publication date: March 20, 2008
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Timothy David Anderson, Lewis Nardini, Jose Luis Flores, Abhijeet Chachad, Raguram Damodaran, Joseph R.M. Zbiciak, Gary Swoboda
  • Publication number: 20070131297
    Abstract: A fluid leak detector is provided for a double carcass hose line segment and includes a sensor housing defined by sidewalls externally mounted to the hose line segment and having an internal housing chamber in communication with the collection space. An optical sensor is mounted through at least one sensor housing sidewall and positions an optical sensing element means within the sensor housing chamber for detecting a presence of fluid in the hose collection space. The optical sensor further includes analysis element means connecting to the optical sensing element means and positioned outside of the sensor housing one, wall, the analysis means generating data indicative of the fluid status within the hose collection space; and transmitter element means connecting to the analysis means for receiving data from the analysis element means and transmitting the data to at least one remote receiver.
    Type: Application
    Filed: December 12, 2005
    Publication date: June 14, 2007
    Inventors: Mauricio Spaolonzi, Waldir de Lucena, Luis Flores Sanches, Marcelo Werneck, Airton Moreno, Cesar de Carvalho
  • Patent number: RE46193
    Abstract: An embedded megamodule and an embedded CPU enable power-saving through a combination of hardware and software. The CPU configures the power-down controller (PDC) logic within megamodule and can software trigger a low-power state of logic modules during processor IDLE periods. To wake from this power-down state, a system event is asserted to the CPU through the module interrupt controller. Thus the entry into a low-power state is software-driven during periods of inactivity and power restoration is on system activity that demands the attention of the CPU.
    Type: Grant
    Filed: June 12, 2014
    Date of Patent: November 1, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Timothy David Anderson, Lewis Nardini, Jose Luis Flores, Abhijeet Chachad, Raguram Damodaran, Joseph R. M. Zbiciak, Gary Swoboda