Patents by Inventor LUN YU

LUN YU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240186188
    Abstract: A semiconductor device includes a first semiconductor layer below a second semiconductor layer; first and second gate dielectric layers surrounding the first and the second semiconductor layers, respectively; and a gate electrode surrounding both the first and the second gate dielectric layers. The first gate dielectric layer has a first top section above the first semiconductor layer and a first bottom section below the first semiconductor layer. The second gate dielectric layer has a second top section above the second semiconductor layer and a second bottom section below the second semiconductor layer. The first top section has a first thickness. The second top section has a second thickness. The second thickness is greater than the first thickness.
    Type: Application
    Filed: February 14, 2024
    Publication date: June 6, 2024
    Inventors: Yung-Hsiang CHAN, Wen-Hung HUANG, Shan-Mei LIAO, Jian-Hao CHEN, Kuo-Feng YU, Kuei-Lun LIN
  • Patent number: 11996334
    Abstract: A method includes providing a first channel layer and a second channel layer over a substrate; forming a first patterned hard mask covering the first channel layer and exposing the second channel layer; selectively depositing a cladding layer on the second channel layer and not on the first patterned hard mask; performing a first thermal drive-in process; removing the first patterned hard mask; after removing the first patterned hard mask, forming an interfacial dielectric layer on the cladding layer and the first channel layer; and forming a high-k dielectric layer on the interfacial dielectric layer.
    Type: Grant
    Filed: December 20, 2022
    Date of Patent: May 28, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chung-Wei Hsu, Kuo-Cheng Chiang, Mao-Lin Huang, Lung-Kun Chu, Jia-Ni Yu, Kuan-Lun Cheng, Chih-Hao Wang
  • Patent number: 11991196
    Abstract: Autoencoder-based anomaly detection methods have been used in identifying anomalous users from large-scale enterprise logs with the assumption that adversarial activities do not follow past habitual patterns. Most existing approaches typically build models by reconstructing single-day and individual-user behaviors. However, without capturing long-term signals and group-correlation signals, the models cannot identify low-signal yet long-lasting threats, and will incorrectly report many normal users as anomalies on busy days, which, in turn, leads to a high false positive rate. A method is provided based on compound behavior, which takes into consideration long-term patterns and group behaviors. The provided method leverages a novel behavior representation and an ensemble of deep autoencoders and produces an ordered investigation list.
    Type: Grant
    Filed: March 3, 2022
    Date of Patent: May 21, 2024
    Assignee: QATAR FOUNDATION FOR EDUCATION, SCIENCE AND COMMUNITY DEVELOPMENT
    Inventors: Issa M. Khalil, Ting Yu, Eui J. Choo, Lun-Pin Yuan, Sencun Zhu
  • Publication number: 20240154642
    Abstract: The present disclosure provides an electronic module including a circuit including a transmitting part and a receiving part physically separated from the transmitting part. The electronic module also includes an element isolated from the circuit and configured to block electrical interference between the transmitting part and the receiving part.
    Type: Application
    Filed: January 16, 2024
    Publication date: May 9, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Shih-Wen LU, Chun-Jen CHEN, Po-Hsiang TSENG, Hsin-Han LIN, Ming-Lun YU
  • Patent number: 11977324
    Abstract: In some aspects, a mask shape is represented by vertices that are connected by segments. A correction to the mask shape is received. The correction may include displacements of the segments and displacements of the vertices. The mask shape is modified by a processor, as follows. The segments are moved according to the segment displacements. As part of this process, vertices that are endpoints of the moved segments are replicated. The replicated vertices are then collapsed. The resulting vertices are then moved according to the vertex displacements. This process of modifying the mask shape may be used as part of a mask synthesis process, to synthesize or correct the mask shapes according to some desired result.
    Type: Grant
    Filed: January 25, 2022
    Date of Patent: May 7, 2024
    Assignee: Synopsys, Inc.
    Inventors: Yung-Yu Chen, Lun-Wen Yeh
  • Publication number: 20240145470
    Abstract: A method for processing an integrated circuit includes forming first and second gate all around transistors. The method forms a dipole oxide in the first gate all around transistor without forming the dipole oxide in the second gate all around transistor. This is accomplished by entirely removing an interfacial dielectric layer and a dipole-inducing layer from semiconductor nanosheets of the second gate all around transistor before redepositing the interfacial dielectric layer on the semiconductor nanosheets of the second gate all around transistor.
    Type: Application
    Filed: January 5, 2024
    Publication date: May 2, 2024
    Inventors: Lung-Kun CHU, Mao-Lin HUANG, Chung-Wei HSU, Jia-Ni YU, Kuo-Cheng CHIANG, Kuan-Lun CHENG, Chih-Hao WANG
  • Publication number: 20240126822
    Abstract: Methods, apparatuses, systems, computing devices, and/or the like are provided. An example method may include retrieving an initial ranking data object associated with a plurality of search result data objects, retrieving a plurality of relevance score data objects, generating a plurality of ranking comparison score data objects, generating a multi-measure optimized ranking data object associated with the plurality of search result data objects, and performing one or more prediction-based actions based at least in part on the multi-measure optimized ranking data object.
    Type: Application
    Filed: October 17, 2022
    Publication date: April 18, 2024
    Inventors: Laura D. Hamilton, Ayush Tomar, Vinit Garg, Lun Yu
  • Patent number: 11961811
    Abstract: A semiconductor structure includes a semiconductor element and a first bonding structure. The semiconductor element has a first surface and a second surface opposite to the first surface. The first bonding structure is disposed adjacent to the first surface of the semiconductor element, and includes a first electrical connector, a first insulation layer surrounding the first electrical connector and a first conductive layer surrounding the first insulation layer.
    Type: Grant
    Filed: June 14, 2022
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Hung-Jui Kuo, Hui-Jung Tsai, Tsao-Lun Chang
  • Patent number: 11961840
    Abstract: A semiconductor device structure is provided. The device includes one or more first semiconductor layers, each first semiconductor layer of the one or more first semiconductor layers is surrounded by a first intermixed layer, wherein the first intermixed layer comprises a first material and a second material.
    Type: Grant
    Filed: August 9, 2022
    Date of Patent: April 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Mao-Lin Huang, Lung-Kun Chu, Chung-Wei Hsu, Jia-Ni Yu, Kuo-Cheng Chiang, Kuan-Lun Cheng, Chih-Hao Wang
  • Patent number: 11958200
    Abstract: An automatic robotic arm system and a coordinating method for robotic arm and computer vision thereof are disclosed. A beam-splitting mirror splits an incident light into a visible light and a ranging light and respectively guides to an image capturing device and an optical ranging device arranged in the different reference axes. In a calibration mode, a transformation relation is computed based on a plurality of the calibration postures and corresponding calibration images. In an operation mode, a mechanical space coordinate is determined based on an operation image and the transformation relation, and the robotic arm is controlled to move based on the mechanical space coordinate.
    Type: Grant
    Filed: December 28, 2021
    Date of Patent: April 16, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Hung-Hsin Chen, Chia-Jun Yu, Qi-Ming Huang, Chin-Lun Chang, Keng-Ning Chang
  • Publication number: 20240120402
    Abstract: A semiconductor device structure, along with methods of forming such, are described. The semiconductor device structure includes a first dielectric feature extending along a first direction, the first dielectric feature comprising a first dielectric layer having a first sidewall and a second sidewall opposing the first sidewall, a first semiconductor layer disposed adjacent the first sidewall, the first semiconductor layer extending along a second direction perpendicular to the first direction, a second dielectric feature extending along the first direction, the second dielectric feature disposed adjacent the first semiconductor layer, and a first gate electrode layer surrounding at least three surfaces of the first semiconductor layer, and a portion of the first gate electrode layer is exposed to a first air gap.
    Type: Application
    Filed: November 19, 2023
    Publication date: April 11, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jia-Ni YU, Kuo-Cheng CHIANG, Mao-Lin HUANG, Lung-Kun CHU, Chung-Wei HSU, Chun-Fu LU, Chih-Hao WANG, Kuan-Lun CHENG
  • Publication number: 20240120239
    Abstract: A method for modulating a threshold voltage of a device. The method includes providing a fin extending from a substrate, where the fin includes a plurality of semiconductor channel layers defining a channel region for a P-type transistor. In some embodiments, the method further includes forming a first gate dielectric layer surrounding at least three sides of each of the plurality of semiconductor channel layers of the P-type transistor. Thereafter, the method further includes forming a P-type metal film surrounding the first gate dielectric layer. In an example, and after forming the P-type metal film, the method further includes annealing the semiconductor device. After the annealing, and in some embodiments, the method includes removing the P-type metal film.
    Type: Application
    Filed: March 10, 2023
    Publication date: April 11, 2024
    Inventors: Cheng-Wei CHANG, Chi-Yu CHOU, Lun-Kuang TAN, Shuen-Shin LIANG
  • Patent number: 11948987
    Abstract: A semiconductor device according to the present disclosure includes a source feature and a drain feature, a plurality of semiconductor nanostructures extending between the source feature and the drain feature, a gate structure wrapping around each of the plurality of semiconductor nanostructures, a bottom dielectric layer over the gate structure and the drain feature, a backside power rail disposed over the bottom dielectric layer, and a backside source contact disposed between the source feature and the backside power rail. The backside source contact extends through the bottom dielectric layer.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: April 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Lung-Kun Chu, Mao-Lin Huang, Chung-Wei Hsu, Jia-Ni Yu, Kuo-Cheng Chiang, Kuan-Lun Cheng, Chih-Hao Wang
  • Publication number: 20240104091
    Abstract: Various embodiments of the present invention provide methods, apparatus, systems, computing devices, computing entities, and/or the like for performing personalized autocomplete predictions. Certain embodiments of the present invention utilize systems, methods, and computer program products that perform personalized autocomplete predictions using a general search corpus and/or individual curated search corpus.
    Type: Application
    Filed: September 23, 2022
    Publication date: March 28, 2024
    Inventors: Laura D. Hamilton, Ayush Tomar, Vinit Garg, Lun Yu
  • Publication number: 20240096996
    Abstract: A semiconductor device includes a first dielectric layer, a stack of semiconductor layers disposed over the first dielectric layer, a gate structure wrapping around each of the semiconductor layers and extending lengthwise along a direction, and a dielectric fin structure and an isolation structure disposed on opposite sides of the stack of semiconductor layers and embedded in the gate structure. The dielectric fin structure has a first width along the direction smaller than a second width of the isolation structure along the direction. The isolation structure includes a second dielectric layer extending through the gate structure and the first dielectric layer, and a third dielectric layer extending through the first dielectric layer and disposed on a bottom surface of the gate structure and a sidewall of the first dielectric layer.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Huan-Chieh Su, Chun-Yuan Chen, Li-Zhen Yu, Lo-Heng Chang, Cheng-Chi Chuang, Kuan-Lun Cheng, Chih-Hao Wang
  • Patent number: 11927799
    Abstract: A data transmission system is disclosed. The data transmission system includes at least one signal processing device, at least one conversion device, at least one antenna device, and at least one flexible printed circuit board. The at least one signal processing device is configured to generate or receive at least one data. The at least one conversion device is configured to transform between the at least one data and an optical signal. The at least one antenna device is configured to obtain the at least one data according to the optical signal, and configured to receive or transmit the at least one data wirelessly. The at least one flexible printed circuit board includes at least one conductive layer and at least one optical waveguide layer. The at least one optical waveguide layer is configured to transmit the optical signal.
    Type: Grant
    Filed: December 31, 2020
    Date of Patent: March 12, 2024
    Inventors: Po-Kuan Shen, Chun-Chiang Yen, Chiu-Lin Yu, Kai-Lun Han, Jenq-Yang Chang, Mao-Jen Wu, Chao-Chieh Hsu
  • Patent number: 11876551
    Abstract: The present disclosure provides an electronic module including a circuit including a transmitting part and a receiving part physically separated from the transmitting part. The electronic module also includes an element isolated from the circuit and configured to block electrical interference between the transmitting part and the receiving part.
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: January 16, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Shih-Wen Lu, Chun-Jen Chen, Po-Hsiang Tseng, Hsin-Han Lin, Ming-Lun Yu
  • Publication number: 20230409614
    Abstract: Various embodiments of the present disclosure provide methods, apparatus, systems, computing devices, computing entities, and/or the like for retrieving relevant items for user queries by generating, using a search engine machine learning model, a prediction-based action for the query input wherein query input embeddings of the query input are generated. For each query input embedding, a k-Nearest-Neighbor (KNN) search is performed with respect to search engine repository item embeddings to generate initial search results, and for each initial set result, performing N hops within a semantic graph starting from nodes associated with the initial search result to generate related search results. The search engine machine learning model is trained by generating a search engine repository item embeddings according to embedding techniques for respective content categories and generating the semantic graph based at least in part on a measure of similarity for pairs of search engine repository item embeddings.
    Type: Application
    Filed: October 21, 2022
    Publication date: December 21, 2023
    Inventors: Laura D. Hamilton, Vinit Garg, Ayush Tomar, Martin R. Linenweber, Preet Kamal S. Bawa, David Armbrust, Rupesh Kartha, Lun Yu
  • Publication number: 20230277795
    Abstract: Embodiments of the present disclosure provide a headgear assembly that includes a headband and at least one tube securement member coupled to the headband. The tube securement member includes channel having a first end and a second end. The channel is curved between the first and second ends and defines a receiving region configured to secure a portion of a tube connected to a nasal cannula. The channel faces away from skin of the subject when the headgear assembly is in use.
    Type: Application
    Filed: March 2, 2023
    Publication date: September 7, 2023
    Inventors: Jinwoo Kim, Chad A. DeJong, Mahdi Mohammadi, Edmond Wing-Lun Yu, Jerrod Houston Tyler
  • Publication number: 20230111198
    Abstract: A bite block includes a main body and a mouthpiece extending outward from the main body and configured to be positioned in a mouth of the subject when the bite block is in use. The mouthpiece can include a main channel configured to receive an endoscopic tube and a sampling channel configured to receive orally exhaled gases from the subject. The bite block can include a gas delivery channel configured to direct gases into the subject's mouth, the gas delivery channel extending through a portion of the main body and through a portion of the main channel such that the gas delivery channel is in fluid communication with the main channel. The bite block can include a recess extending along a portion of the first surface of the main body proximate the gas delivery channel and configured to receive a portion of a gas delivery tube.
    Type: Application
    Filed: October 3, 2022
    Publication date: April 13, 2023
    Inventors: Edmond Wing-Lun Yu, Mahdi Mohammadi