Patents by Inventor Luu Thanh Nguyen

Luu Thanh Nguyen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040216918
    Abstract: A high performance and small-scale circuitry substrate is described. The circuitry substrate includes a dielectric layer, a return plane attached to a bottom surface of the dielectric layer, and a plurality of return paths (ground) and signal lines that are attached to a top surface of the dielectric layer. The return paths on the top surface are connected to the return plane on the bottom surface by wrapping around at least one edge of the dielectric material. Return paths on the top layer can also separate each pair or adjacent signal lines. The circuitry substrate can be advantageously used to form an optoelectronic module.
    Type: Application
    Filed: June 8, 2004
    Publication date: November 4, 2004
    Applicant: National Semiconductor Corporation, A Delaware Corp.
    Inventors: Neeraj Anil Pendse, Jia Liu, Jitendra Mohan, Bruce Carlton Roberts, Luu Thanh Nguyen, William Paul Mazotti
  • Patent number: 6765275
    Abstract: A high performance and small-scale circuitry substrate is described. The circuitry substrate includes a dielectric layer, a return plane attached to a bottom surface of the dielectric layer, and a plurality of return paths (ground) and signal lines that are attached to a top surface of the dielectric layer. The return paths on the top surface are connected to the return plane on the bottom surface by wrapping around at least one edge of the dielectric material. Return paths on the top layer can also separate each pair or adjacent signal lines. The circuitry substrate can be advantageously used to form an optoelectronic module.
    Type: Grant
    Filed: November 6, 2002
    Date of Patent: July 20, 2004
    Assignee: National Semiconductor Corporation
    Inventors: Neeraj Anil Pendse, Jia Liu, Jitendra Mohan, Bruce Carlton Roberts, Luu Thanh Nguyen, William Paul Mazotti
  • Patent number: 6749345
    Abstract: Electro-optical packages that embed the electronics of the packages directly to the optical cabling, provide short electrical connection paths for high performance, and that provide a robust interconnects. A first electro-optical package includes an integrated circuit and a connector sleeve configured to receive a plug-in optical assembly from the underside of the PC board. The plug-in optical assembly includes a backing piece and an opto-electric device mounted onto the backing piece. An electrical connection is provided between the opto-electric device and a contact location on the backing piece and a contact is provided between the contact location on the backing piece and the integrated circuit. With a second electro-optical package, an integrated circuit having an active surface facing in a first direction and an opto-electric device having contact points facing a second direction are provided.
    Type: Grant
    Filed: May 24, 2002
    Date of Patent: June 15, 2004
    Assignee: National Semiconductor Corporation
    Inventors: Stephen Andrew Gee, Luu Thanh Nguyen, Ken Pham, Jia Liu, William Paul Mazotti, Bruce Carlton Roberts, Peter Deane
  • Publication number: 20040109649
    Abstract: Techniques for manufacturing an optical transmission device in a manner so that the photonic device is protected from damage that can be caused by exposure to the environment and physical handling are described. The invention involves placing a lens or a lens array over a photonic device, either with or without the use of a receptacle device, such that the photonic device is contained within a sealed cavity. The invention has three main embodiments in which the photonic device can be hermetically sealed, quasi-hermetically sealed, or non-hermetically sealed. The optical transmission device can be configured to serve as an optical receiver, detector, or a transceiver device.
    Type: Application
    Filed: December 10, 2002
    Publication date: June 10, 2004
    Applicant: National Semiconductor Corporation
    Inventors: William Paul Mazotti, Jia Liu, Luu Thanh Nguyen, Haryanto Chandra, Peter Deane, Todd Thyes, Brian Huss, John Rukavina, Glenn Woodhouse
  • Publication number: 20040048417
    Abstract: The present invention provides a technique for manufacturing a low cost device that provides a true die to external fiber optic connection. Specifically, the present invention relates to several techniques for joining an optical device package to a semiconductor device package. The first technique involves using wirebond studs and an adhesive material, the second technique involves the use of an anisotropic conductive film, and the third technique involves the use of solder material. Each of these techniques provides high levels of thermal, electrical and optical performance. The methods apply to optical sub-assembly and chip sub-assembly interfaces in transceivers, transmitters, as well as receivers for opto-electronic packages.
    Type: Application
    Filed: August 29, 2003
    Publication date: March 11, 2004
    Applicant: National Semiconductor Corporation, A Delaware Corp.
    Inventors: Luu Thanh Nguyen, Ken Pham, Peter Deane, William Paul Mazotti, Bruce Carlton Roberts, Jia Liu
  • Patent number: 6655854
    Abstract: An optoelectronic component is described that includes a photonic device carried by a base substrate. A dam structure is formed on the base substrate by dispensing and hardening a precise amount of a flowable material. The dam structure is sized to define a desired standoff between an optical fiber and an active facet on the photonic device. In embodiments where the photonic device is wire bonded to the base substrate, it may be desirable to provide a reverse wire bond in order to permit the optical fiber to be placed closer to the photonic device. In some embodiments, the base substrate takes the form of a flexible material having electrically conductive traces thereon that are electrically connected to the photonic device. An optical component support block may be provided to support the flex material. In some implementations, a semiconductor die may be directly soldered to the traces on the flexible material.
    Type: Grant
    Filed: August 3, 2001
    Date of Patent: December 2, 2003
    Assignee: National Semiconductor Corporation
    Inventors: Luu Thanh Nguyen, Ken Pham, Peter Deane, William Paul Mazotti, Bruce Carlton Roberts
  • Patent number: 6642613
    Abstract: The present invention provides a technique for manufacturing a low cost device that provides a true die to external fiber optic connection. Specifically, the present invention relates to several techniques for joining an optical device package to a semiconductor device package. The first technique involves using wirebond studs and an adhesive material, the second technique involves the use of an anisotropic conductive film, and the third technique involves the use of solder material. Each of these techniques provides high levels of thermal, electrical and optical performance. The methods apply to optical sub-assembly and chip sub-assembly interfaces in transceivers, transmitters, as well as receivers for opto-electronic packages.
    Type: Grant
    Filed: September 4, 2001
    Date of Patent: November 4, 2003
    Assignee: National Semiconductor Corporation
    Inventors: Luu Thanh Nguyen, Ken Pham, Peter Deane, William Paul Mazotti, Bruce Carlton Roberts, Jia Liu
  • Publication number: 20030189214
    Abstract: The present invention provides a technique for manufacturing a low cost device that provides a true die to external fiber optic connection. Specifically, the present invention relates to several techniques for joining an optical device package to a semiconductor device package. The first technique involves using wirebond studs and an adhesive material, the second technique involves the use of an anisotropic conductive film, and the third technique involves the use of solder material. Each of these techniques provides high levels of thermal, electrical and optical performance. The methods apply to optical sub-assembly and chip sub-assembly interfaces in transceivers, transmitters, as well as receivers for opto-electronic packages.
    Type: Application
    Filed: April 11, 2003
    Publication date: October 9, 2003
    Applicant: National Semiconductor Corporation, A Delaware Corp.
    Inventors: Luu Thanh Nguyen, Ken Pham, Peter Deane, William Paul Mazotti, Bruce Carlton Roberts, Jia Liu
  • Patent number: 6628000
    Abstract: Techniques for maintaining the optical coupling efficiency between photonic devices of an optoelectronic module and its interconnecting optical fibers are described. The techniques ensure that the mating surfaces of an optical sub-assembly and a chip sub-assembly remain planar to each other throughout and after the soldering process of the optoelectronic manufacturing process. These techniques include the use of a ceramic fixture made of a stack of plates having openings that secure the orientation of the optical and chip sub-assemblies. The fixture can have one or more openings to secure a respective one or more combination of optical and chip sub-assemblies. A high temperature tape can also be used to maintain the parallelism between the optical and chip sub-assemblies. An optical sub-assembly having pedestals on its bottom surface can also be use to maintain parallelism of the optical and chip sub-assemblies. Methods of using each technique is also described.
    Type: Grant
    Filed: November 19, 2001
    Date of Patent: September 30, 2003
    Assignee: National Semiconductor Corporation
    Inventors: Ken Pham, Jia Liu, Luu Thanh Nguyen, William Paul Mazotti, Bruce Carlton Roberts
  • Patent number: 6624507
    Abstract: The present invention pertains to using a leadless leadframe package as the semiconductor device package component of an opto-electronic combinational device. Leadless leadframe packages (LLPs) have very small form factors that allow an opto-electronic device to also have a small overall form factor.
    Type: Grant
    Filed: August 3, 2001
    Date of Patent: September 23, 2003
    Assignee: National Semiconductor Corporation
    Inventors: Luu Thanh Nguyen, Ken Pham, Peter Deane, William P. Mazotti, Bruce C. Roberts
  • Patent number: 6595699
    Abstract: An optoelectronic component is described that includes a photonic device carried by a substrate. A support structure having a relatively higher portion and a relatively lower portion is formed on or attached to the substrate. In a preferred embodiment, the support structure is a dam structure formed by dispensing a flowable material onto the substrate and hardening the dispensed material. The optoelectronic component further includes one or more optical fibers, with each optical fiber being in optical communication with an active facet on the photonic device. The relatively higher and lower portions of the support structure are arranged to position the optical fiber(s) at a desired standoff distance from the photonic device and to slightly incline the distal tip of each optical fiber relative to the top surface of the photonic device. The described packaging approach can be used in both single fiber and multi-channel devices.
    Type: Grant
    Filed: August 3, 2001
    Date of Patent: July 22, 2003
    Assignee: National Semiconductor Corporation
    Inventors: Luu Thanh Nguyen, Ken Pham, Peter Deane, William Paul Mazotti, Bruce Carlton Roberts
  • Publication number: 20030057535
    Abstract: The techniques of the present invention are directed towards setting a photonic device into a groove of a substrate, which is then attached to the chip sub-assembly in a way that the resulting optoelectronic package has a low profile and the interconnects between the photonic device and the semiconductor chip are short. The technique involves partially etching a groove in a substrate to allow for positioning of a photonic device within the groove. The photonic device is connected to the chip sub-assembly through interconnects that extend through the thickness of the substrate. The photonic devices are placed on their sides so that the active facets are perpendicular to the main axis of the chip sub-assembly. In this configuration, the optical fibers can be positioned parallel to the CSA top surface, ensuring a low module profile in the process.
    Type: Application
    Filed: June 6, 2002
    Publication date: March 27, 2003
    Applicant: National Semiconductor Corporation
    Inventors: Luu Thanh Nguyen, Ken Pham, Peter Deane, William Paul Mazotti, Bruce Carlton Roberts, Hau Thanh Nguyen, John P. Briant, Roger Clarke, Michael R. Nelson, Janet E. Townsend
  • Publication number: 20030026556
    Abstract: Concepts for conveniently arranging devices for the transduction of signals to and from voltage and current domains to infrared radiation domains is described. Specifically, optoelectronic components and methods of making the same are described. In one aspect, the optoelectronic component includes a base substrate having a pair of angled (or substantially perpendicular) faces with electrical traces extending therebetween. A semiconductor chip assembly is mounted on the first face of the base substrate and a photonic device is mounted on the second face. Both the semiconductor chip assembly and the photonic device are electrically connected to traces on the base substrate. The semiconductor chip assembly is generally arranged to be electrically connected to external devices. The photonic devices are generally arranged to optically communicate with one or more optical fibers. The described structure may be used with a wide variety of photonic devices.
    Type: Application
    Filed: June 6, 2002
    Publication date: February 6, 2003
    Applicant: National Semiconductor Corporation
    Inventors: William Paul Mazotti, Peter Deane, Luu Thanh Nguyen, Ken Pham, Bruce Carlton Roberts, Jia Liu, Yongseon Koh, John P. Briant, Roger William Clarke, Michael R. Nelson, Christopher J. Smith, Janet E. Townsend
  • Publication number: 20030026081
    Abstract: Optoelectronic components, specifically, ceramic optical sub-assemblies are described. In one aspect, the optoelectronic component includes a ceramic base substrate having a pair of angled (or substantially perpendicular) faces. The electrical traces are formed directly on the ceramic surfaces and extend between the pair of faces. A semiconductor chip assembly is mounted on the first face of the ceramic base substrate and a photonic device is mounted on the second face. Both the semiconductor chip assembly and the photonic device are electrically connected to traces on the ceramic base substrate. The semiconductor chip assembly is generally arranged to be electrically connected to external devices. The photonic devices are generally arranged to optically communicate with one or more optical fibers. The described structure may be used with a wide variety of photonic devices.
    Type: Application
    Filed: June 6, 2002
    Publication date: February 6, 2003
    Applicant: National Semiconductor Corporation
    Inventors: Jia Liu, Luu Thanh Nguyen, Ken Pham, William Paul Mazotti, Bruce Carlton Roberts, Stephen Andrew Gee, John P. Briant
  • Patent number: 4898117
    Abstract: A tool employing a solder foot to deposit solder on a series of conductive surfaces as the tool moves. In one embodiment, non-wettable blade attached to the tool breaks the film. A pair of sensors coupled to a control circuit monitor the position of the solder foot and the position may be changed as a function of the operation to be performed, i.e. deposit, reflow, standby while tool is moved. In a second embodiment a discrete solder mass is extruded and deposited on a preheated pad. In a third embodiment, solder wire is delivered to an omnidirectional tool for deposition.
    Type: Grant
    Filed: April 15, 1988
    Date of Patent: February 6, 1990
    Assignee: International Business Machines Corporation
    Inventors: Peter G. Ledermann, Luu Thanh Nguyen