Abstract: Techniques for sidewall passivation and removal of redeposited materials and processing damage from phase change memory materials are provided. In one aspect, a phase change memory device includes: one or more phase change memory cells, where each of the phase change memory cells includes a phase change material between a bottom electrode and a top electrode; and a carbon and oxygen-containing passivation layer on sidewalls of the phase change material. An ovonic threshold switch can also be present between the bottom and top electrodes, in series with the phase change material, and the carbon and oxygen-containing passivation layer can also be present on sidewalls of the ovonic threshold switch. A method of fabricating the present phase change memory devices is also provided.

Abstract: A membrane is electrically charged to a polarity. A surface of carbon nanotubes (CNTs) in a solution is caused to acquire a charge of the polarity. The solution is filtered through the membrane. An electromagnetic repulsion between the membrane of the polarity and the CNTs of the polarity causes the CNTs to spontaneously align to form a crystalline structure.

Abstract: One or more contacts are detected in an electron microscope image corresponding to a region of interest on an integrated circuit. One or more standard cells are identified based on the detected one or more contacts in the electron microscope image. One or more components of the integrated circuit are determined based on the identified one or more standard cells.

Abstract: A membrane is electrically charged to a polarity. A surface of carbon nanotubes (CNTs) in a solution is caused to acquire a charge of the polarity. The solution is filtered through the membrane. An electromagnetic repulsion between the membrane of the polarity and the CNTs of the polarity causes the CNTs to spontaneously align to form a crystalline structure.

Abstract: One or more contacts are detected in an electron microscope image corresponding to a region of interest on an integrated circuit. One or more standard cells are identified based on the detected one or more contacts in the electron microscope image. One or more components of the integrated circuit are determined based on the identified one or more standard cells.

Abstract: A method of fabricating an interconnect structure is provided which includes providing a dielectric material having a dielectric constant of about 3.0 or less and at least one conductive material embedded therein, the at least one conductive material has an upper surface that is coplanar with an upper surface of the dielectric material; and forming a noble metal-containing cap directly on the upper surface of the at least one conductive material, wherein the noble metal cap is discontinuous or non-uniform.

Abstract: An electrically reprogrammable fuse comprising an interconnect disposed in a dielectric material, a sensing wire disposed at a first end of the interconnect, a first programming wire disposed at a second end of the interconnect, and a second programming wire disposed at a second end of the interconnect, wherein the fuse is operative to form a surface void at the interface between the interconnect and the sensing wire when a first directional electron current is applied from the first programming wire through the interconnect to the second programming wire, and wherein, the fuse is further operative to heal the surface void between the interconnect and the sensing wire when a second directional electron current is applied from the second programming wire through the interconnect to the first programming wire.

Abstract: An interconnect structure including a noble metal-containing cap that is present at least on some portion of an upper surface of at least one conductive material that is embedded within an interconnect dielectric material is provided. In one embodiment, the noble metal-containing cap is discontinuous, e.g., exists as nuclei or islands on the surface of the at least one conductive material. In another embodiment, the noble metal-containing cap has a non-uniform thickness across the surface of the at least one conductive material.

Abstract: An electrically reprogrammable fuse comprising an interconnect disposed in a dielectric material, a sensing wire disposed at a first end of the interconnect, a first programming wire disposed at a second end of the interconnect, and a second programming wire disposed at a second end of the interconnect, wherein the fuse is operative to form a surface void at the interface between the interconnect and the sensing wire when a first directional electron current is applied from the first programming wire through the interconnect to the second programming wire, and wherein, the fuse is further operative to heal the surface void between the interconnect and the sensing wire when a second directional electron current is applied from the second programming wire through the interconnect to the first programming wire.

Abstract: An electrically reprogrammable fuse comprising an interconnect disposed in a dielectric material, a sensing wire disposed at a first end of the interconnect, a first programming wire disposed at a second end of the interconnect, and a second programming wire disposed at a second end of the interconnect, wherein the fuse is operative to form a surface void at the interface between the interconnect and the sensing wire when a first directional electron current is applied from the first programming wire through the interconnect to the second programming wire, and wherein, the fuse is further operative to heal the surface void between the interconnect and the sensing wire when a second directional electron current is applied from the second programming wire through the interconnect to the first programming wire.

Abstract: A semiconductor structure including a highly reliable high aspect ratio contact structure in which key-hole seam formation is eliminated is provided. The key-hole seam formation is eliminated in the present invention by providing a densified noble metal-containing liner within a high aspect ratio contact opening that is present in a dielectric material. The densified noble metal-containing liner is located atop a diffusion barrier and both those elements separate the conductive material of the inventive contact structure from a conductive material of an underlying semiconductor structure. The densified noble metal-containing liner of the present invention is formed by deposition of a noble metal-containing material having a first resistivity and subjecting the deposited noble metal-containing material to a densification treatment process (either thermal or plasma) that decreases the resistivity of the deposited noble metal-containing material to a lower resistivity.

Abstract: An electrically reprogrammable fuse comprising an interconnect disposed in a dielectric material, a sensing wire disposed at a first end of the interconnect, a first programming wire disposed at a second end of the interconnect, and a second programming wire disposed at a second end of the interconnect, wherein the fuse is operative to form a surface void at the interface between the interconnect and the sensing wire when a first directional electron current is applied from the first programming wire through the interconnect to the second programming wire, and wherein, the fuse is further operative to heal the surface void between the interconnect and the sensing wire when a second directional electron current is applied from the second programming wire through the interconnect to the first programming wire.

Abstract: A method of fabricating an interconnect structure is provided which includes providing a dielectric material having a dielectric constant of about 3.0 or less and at least one conductive material embedded therein, the at least one conductive material has an upper surface that is coplanar with an upper surface of the dielectric material; and forming a noble metal-containing cap directly on the upper surface of the at least one conductive material, wherein the noble metal cap is discontinuous or non-uniform.

Abstract: A semiconductor structure is provided that includes an interconnect structure and a fuse structure located in different areas, yet within the same interconnect level. The interconnect structure has high electromigration resistance, while the fuse structure has a lower electromigration resistance as compared with the interconnect structure. The fuse structure includes a conductive material embedded within an interconnect dielectric in which the upper surface of the conductive material has a high concentration of oxygen present therein. A dielectric capping layer is located atop the dielectric material and the conductive material. The presence of the surface oxide layer at the interface between the conductive material and the dielectric capping layer degrades the adhesion between the conductive material and the dielectric capping layer.

Abstract: A semiconductor structure is provided that includes an interconnect structure and a fuse structure located in different areas, yet within the same interconnect level. The interconnect structure has high electromigration resistance, while the fuse structure has a lower electromigration resistance as compared with the interconnect structure. The fuse structure includes a conductive material embedded within an interconnect dielectric in which the upper surface of the conductive material has a high concentration of oxygen present therein. A dielectric capping layer is located atop the dielectric material and the conductive material. The presence of the surface oxide layer at the interface between the conductive material and the dielectric capping layer degrades the adhesion between the conductive material and the dielectric capping layer.

Abstract: A semiconductor structure is provided that includes an interconnect structure and a fuse structure located in different areas, yet within the same interconnect level. The interconnect structure has high electromigration resistance, while the fuse structure has a lower electromigration resistance as compared with the interconnect structure. The fuse structure includes a conductive material embedded within an interconnect dielectric in which the upper surface of the conductive material has a high concentration of oxygen present therein. A dielectric capping layer is located atop the dielectric material and the conductive material. The presence of the surface oxide layer at the interface between the conductive material and the dielectric capping layer degrades the adhesion between the conductive material and the dielectric capping layer.

Abstract: An electrically reprogrammable fuse comprising an interconnect disposed in a dielectric material, a sensing wire disposed at a first end of the interconnect, a first programming wire disposed at a second end of the interconnect, and a second programming wire disposed at a second end of the interconnect, wherein the fuse is operative to form a surface void at the interface between the interconnect and the sensing wire when a first directional electron current is applied from the first programming wire through the interconnect to the second programming wire, and wherein, the fuse is further operative to heal the surface void between the interconnect and the sensing wire when a second directional electron current is applied from the second programming wire through the interconnect to the first programming wire.

Abstract: An interconnect structure including a noble metal-containing cap that is present at least on some portion of an upper surface of at least one conductive material that is embedded within an interconnect dielectric material is provided. In one embodiment, the noble metal-containing cap is discontinuous, e.g., exists as nuclei or islands on the surface of the at least one conductive material. In another embodiment, the noble metal-containing cap has a non-uniform thickness across the surface of the at least one conductive material.

Abstract: A semiconductor structure including a highly reliable high aspect ratio contact structure in which key-hole seam formation is eliminated is provided. The key-hole seam formation is eliminated in the present invention by providing a densified noble metal-containing liner within a high aspect ratio contact opening that is present in a dielectric material. The densified noble metal-containing liner is located atop a diffusion barrier and both those elements separate the conductive material of the inventive contact structure from a conductive material of an underlying semiconductor structure. The densified noble metal-containing liner of the present invention is formed by deposition of a noble metal-containing material having a first resistivity and subjecting the deposited noble metal-containing material to a densification treatment process (either thermal or plasma) that decreases the resistivity of the deposited noble metal-containing material to a lower resistivity.

Abstract: A semiconductor structure is provided that includes an interconnect structure and a fuse structure located in different areas, yet within the same interconnect level. The interconnect structure has high electromigration resistance, while the fuse structure has a lower electromigration resistance as compared with the interconnect structure. The fuse structure includes a conductive material embedded within an interconnect dielectric in which the upper surface of the conductive material has a high concentration of oxygen present therein. A dielectric capping layer is located atop the dielectric material and the conductive material. The presence of the surface oxide layer at the interface between the conductive material and the dielectric capping layer degrades the adhesion between the conductive material and the dielectric capping layer.