Patents by Inventor M. Bland
M. Bland has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8607003Abstract: Methods, apparatuses, and computer program products for memory access to a dual in-line memory module (DIMM) form factor flash memory are provided. Embodiments include receiving, by a controller from a processor through cacheable memory in the processor, a read request; transmitting, by the controller, the read request to the DIMM form factor flash memory; polling, by the controller, a read queue in the DIMM form factor flash memory until data is ready for the read request; copying from the DIMM form factor flash memory, by the controller, the data corresponding to the read request to a read queue in the controller; transmitting, by the controller on an interface between the controller and the processor, an invalidate command for the cacheable memory; and in response to receiving the invalidate command, reading by the processor the data stored in the read queue in the controller.Type: GrantFiled: July 15, 2011Date of Patent: December 10, 2013Assignee: International Business Machines CorporationInventors: Patrick M. Bland, Dhruv M. Desai, Jimmy G. Foster, Sr., Makoto Ono
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Publication number: 20130166849Abstract: A computing system with physically remote shared computer memory, the computing system including: a remote memory management module, a plurality of computing devices, a plurality of remote memory modules that are external to the plurality of computing devices, and a remote memory controller, the remote memory management module configured to partition the physically remote shared computer memory amongst a plurality of computing devices; each computing device including a computer processor and a local memory controller, the local memory controller including: a processor interface, a local memory interface, and a local interconnect interface; each remote memory controller including: a remote memory interface and a remote interconnect interface, wherein the remote memory controller is operatively coupled to the data communications interconnect via the remote interconnect interface such that the remote memory controller is coupled for data communications with the local memory controller over the data communicationType: ApplicationFiled: June 15, 2012Publication date: June 27, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Bruce L. Beukema, Patrick M. Bland, Randolph S. Kolvick, James A. Marcella, Makoto Ono, Paul G. Reuland
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Publication number: 20130166672Abstract: A computing system with physically remote shared computer memory, the computing system including: a remote memory management module, a plurality of computing devices, a plurality of remote memory modules that are external to the plurality of computing devices, and a remote memory controller, the remote memory management module configured to partition the physically remote shared computer memory amongst a plurality of computing devices; each computing device including a computer processor and a local memory controller, the local memory controller including: a processor interface, a local memory interface, and a local interconnect interface; each remote memory controller including: a remote memory interface and a remote interconnect interface, wherein the remote memory controller is operatively coupled to the data communications interconnect via the remote interconnect interface such that the remote memory controller is coupled for data communications with the local memory controller over the data communicationType: ApplicationFiled: December 22, 2011Publication date: June 27, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Bruce L. Beukema, Patrick M. Bland, Randolph S. Kolvick, James A. Marcella, Makoto Ono, Paul G. Reuland
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Publication number: 20130019048Abstract: Methods, apparatuses, and computer program products for memory access to a dual in-line memory module (DIMM) form factor flash memory are provided. Embodiments include receiving, by a controller from a processor through cacheable memory in the processor, a read request; transmitting, by the controller, the read request to the DIMM form factor flash memory; polling, by the controller, a read queue in the DIMM form factor flash memory until data is ready for the read request; copying from the DIMM form factor flash memory, by the controller, the data corresponding to the read request to a read queue in the controller; transmitting, by the controller on an interface between the controller and the processor, an invalidate command for the cacheable memory; and in response to receiving the invalidate command, reading by the processor the data stored in the read queue in the controller.Type: ApplicationFiled: July 15, 2011Publication date: January 17, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Patrick M. Bland, Dhruv M. Desai, Jimmy G. Foster, SR., Makoto Ono
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Patent number: 8333211Abstract: A method and apparatus for tapping into a pressurized multiple strings of coaxially situated tubulars for wells and/or platforms which have overturned wherein the tapping occurs underwater via a diver or remotely operated vehicle. The assembly includes a tapping tool connectable to the tubular via a saddle connection and an adjustable tapping clamp with adjustable support/locking feet, compression plate with view ports, and angularly adjustable hot tapping system, along with a drill/saw system.Type: GrantFiled: September 29, 2011Date of Patent: December 18, 2012Assignee: Tetra Applied Technologies, LLCInventors: Harry McGraw, Leslie M. Bland, Daniel S. Bangert, Mark F. Gravouia, Rizal Masingkan
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Publication number: 20120173653Abstract: A computer program product and computer implemented method are provided for migrating a virtual machine between servers. The virtual machine is initially operated on a first server, wherein the first server accesses the virtual machine image over a network at a memory location within fabric attached memory. The virtual machine is migrated from the first server to a second server by flushing data to the virtual machine image from cache memory associated with the virtual machine on the first server and providing the state and memory location of the virtual machine to the second server. The virtual machine may then operate on the second server, wherein the second server accesses the virtual machine image over the network at the same memory location within the fabric attached memory without copying the virtual machine image.Type: ApplicationFiled: December 30, 2010Publication date: July 5, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Patrick M. Bland, John M. Borkenhagen, Thomas M. Bradicich, Dhruv M. Desai, Jimmy G. Foster, SR., Joseph J. Jakubowski, Randolph S. Kolvick, Makoto Ono
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Publication number: 20120067435Abstract: A method and apparatus for tapping into a pressurized multiple strings of coaxially situated tubulars for wells and/or platforms which have overturned wherein the tapping occurs underwater via a diver or remotely operated vehicle. The assembly includes a tapping tool connectable to the tubular via a saddle connection and an adjustable tapping clamp with adjustable support/locking feet, compression plate with view ports, and angularly adjustable hot tapping system, along with a drill/saw system.Type: ApplicationFiled: September 29, 2011Publication date: March 22, 2012Inventors: Harry MCGRAW, Leslie M. BLAND, Daniel S. BANGERT, Mark F. GRAVOUIA, Rizal MASINGKAN
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Patent number: 8102651Abstract: Method and apparatus providing airflow through a chassis including an upstream column of memory modules and a downstream column of memory modules. The airflow is divided into first and second separate airflow streams extending from an upstream end of the upstream column to a downstream end of the downstream column. The first airflow stream is guided into contact with a single memory module operably-installed in the upstream column and to avoid contact with any memory module in the downstream column. The second airflow stream is guided to avoid contact with any memory module in the upstream column and into contact with a single memory module operably-installed in the downstream column. The improved cooling enables the extended use of a single memory module per channel, even though the thermal load on such a memory module is greater.Type: GrantFiled: October 2, 2009Date of Patent: January 24, 2012Assignee: International Business Machines CorporationInventors: Patrick M. Bland, Vinod Kamath, Jimmy G. Foster, Sr., Ivan R. Zapata
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Patent number: 7984326Abstract: Memory downsizing in a computer memory subsystem, the subsystem including one or more channels of computer memory with each channel including several Dual In-line Memory Modules (‘DIMMs’) and each DIMM capable of on-die termination (‘ODT’). Memory downsizing according to embodiments of the present invention includes identifying, during a memory initialization test in a Power On Self Test (‘POST’) by a firmware module, a defective DIMM of a particular channel in the computer memory subsystem and disabling, by the firmware module, the defective DIMM, including enabling ODT for the defective DIMM without disabling any non-defective DIMMs.Type: GrantFiled: May 14, 2009Date of Patent: July 19, 2011Assignee: International Business Machines CorporationInventors: Patrick M. Bland, Jimmy G. Foster, Sr.
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Publication number: 20110080700Abstract: Method and apparatus providing airflow through a chassis including an upstream column of memory modules and a downstream column of memory modules. The airflow is divided into first and second separate airflow streams extending from an upstream end of the upstream column to a downstream end of the downstream column. The first airflow stream is guided into contact with a single memory module operably-installed in the upstream column and to avoid contact with any memory module in the downstream column. The second airflow stream is guided to avoid contact with any memory module in the upstream column and into contact with a single memory module operably-installed in the downstream column. The improved cooling enables the extended use of a single memory module per channel, even though the thermal load on such a memory module is greater.Type: ApplicationFiled: October 2, 2009Publication date: April 7, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Patrick M. Bland, Vinod Kamath, Jimmy G. Foster, SR., Ivan R. Zapata
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Publication number: 20100293410Abstract: Memory downsizing in a computer memory subsystem, the subsystem including one or more channels of computer memory with each channel including several Dual In-line Memory Modules (‘DIMMs’) and each DIMM capable of on-die termination (‘ODT’). Memory downsizing according to embodiments of the present invention includes identifying, during a memory initialization test in a Power On Self Test (‘POST’) by a firmware module, a defective DIMM of a particular channel in the computer memory subsystem and disabling, by the firmware module, the defective DIMM, including enabling ODT for the defective DIMM without disabling any non-defective DIMMs.Type: ApplicationFiled: May 14, 2009Publication date: November 18, 2010Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Patrick M. Bland, Jimmy G. Foster, SR.
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Publication number: 20100243072Abstract: A method and apparatus for tapping into a pressurized multiple strings of coaxially situated tubulars for wells and/or platforms which have overturned wherein the tapping occurs underwater via a diver or remotely operated vehicle. The assembly includes a tapping tool connectable to the tubular via a saddle connection and an adjustable tapping clamp with adjustable support/locking feet, compression plate with view ports, and angularly adjustable hot tapping system, along with a drill/saw system.Type: ApplicationFiled: March 31, 2010Publication date: September 30, 2010Inventors: Harry MCGRAW, Leslie M. BLAND
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Patent number: 7694055Abstract: Interrupts are directed to currently idle processors. Which of a number of processors of a computing system that are currently idle is determined. An interrupt is received and directed to one of the currently idle processors for processing. Determining which processors are currently idle can be accomplished by monitoring each processor to determine whether it has entered an idle state. When a processor has entered an idle state, it is thus determined that the processor is currently idle. Where just one processor is currently idle, an interrupt is directed to this processor. Where more than one processor is currently idle, one of these processors is selected to which to deliver an interrupt, such as in a round-robin manner. Where no processor is currently idle, then one of the processors is selected to which to deliver an interrupt.Type: GrantFiled: October 15, 2005Date of Patent: April 6, 2010Assignee: International Business Machines CorporationInventors: Ryuji Orita, Susumu Arai, Brian D. Allison, Patrick M. Bland
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Patent number: 7562247Abstract: Methods and systems are disclosed for providing independent clock failover for scalable blade servers that include assigning a server blade to one of a plurality of clock failover groups, providing a plurality of independent clock signals to the clock generator of the server blade, wherein one of the plurality of independent clock signals is an active clock signal, detecting a failover condition for the clock failover group assigned to the server blade, and switching the active clock signal, in response to the detected failover condition, from one independent clock signal to another independent clock signal.Type: GrantFiled: May 16, 2006Date of Patent: July 14, 2009Assignee: International Business Machines CorporationInventors: Marcus A. Baker, Justin P. Bandholz, Patrick M. Bland, Andrew S. Heinzmann
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Publication number: 20090006673Abstract: Methods and systems are disclosed for detecting a presence of a device that includes providing a clock driver having a pair of differential clock signal lines capable of connection to a device, providing a presence detection signal for transmission through the pair of differential clock signal lines, determining whether the presence detection signal is received through the pair of differential clock signal lines, and identifying the presence of the device if the presence detection signal is received through the pair of differential clock signal lines.Type: ApplicationFiled: September 8, 2008Publication date: January 1, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Patrick M. Bland, Randoph S. Kolvick
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Patent number: 7464195Abstract: A method and apparatus are disclosed for detecting a presence of a device. Specifically, a method and a system are disclosed that may comprise providing a clock driver having a pair of differential clock signal lines capable of connection to a device, providing a presence detection signal for transmission through the pair of differential clock signal lines, determining whether the presence detection signal is received through the pair of differential clock signal lines, identifying the absence of the device if no presence detection signal is received through the pair of differential clock signal lines, identifying the presence of the device if the presence detection signal is received through the pair of differential clock signal lines, and notifying a system management module of the presence of the device.Type: GrantFiled: May 22, 2006Date of Patent: December 9, 2008Assignee: International Business Machines CorporationInventors: Patrick M. Bland, Randoph S. Kolvick
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Publication number: 20080120451Abstract: The invention is directed to a method and apparatus for automatically enabling replacement hardware. A method for automatically enabling hardware in accordance with an embodiment of the present invention includes: setting a presence bit of the hardware to a first value in response to a removal of the hardware from a socket; replacing the hardware into the socket; storing the first value of the presence bit in a memory; and automatically re-enabling the socket based on the stored first value of the presence bit for the socket or for assemblies containing the socket.Type: ApplicationFiled: November 16, 2006Publication date: May 22, 2008Inventors: Randolph S. Kolvick, Patrick M. Bland
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Publication number: 20080005407Abstract: Methods and systems are disclosed for detecting a presence of a device that includes providing a clock driver having a pair of differential clock signal lines capable of connection to a device, providing a presence detection signal for transmission through the pair of differential clock signal lines, determining whether the presence detection signal is received through the pair of differential clock signal lines, and identifying the presence of the device if the presence detection signal is received through the pair of differential clock signal lines.Type: ApplicationFiled: May 22, 2006Publication date: January 3, 2008Inventors: Patrick M. Bland, Randoph S. Kolvick
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Publication number: 20070294561Abstract: Methods and systems are disclosed for providing independent clock failover for scalable blade servers that include assigning a server blade to one of a plurality of clock failover groups, providing a plurality of independent clock signals to the clock generator of the server blade, wherein one of the plurality of independent clock signals is an active clock signal, detecting a failover condition for the clock failover group assigned to the server blade, and switching the active clock signal, in response to the detected failover condition, from one independent clock signal to another independent clock signal.Type: ApplicationFiled: May 16, 2006Publication date: December 20, 2007Inventors: Marcus A. Baker, Justin P. Bandholz, Patrick M. Bland, Andrew S. Heinzmann
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Publication number: 20070083572Abstract: In one embodiment, a data processing system includes: (a) a first database 304 maintained by a first party; (b) a second database 324, 328 maintained by a second party different from the first party; (c) a work queue 316 operable to specify data to be added to the second database; (d) an extract, transform and load module 308 operable to write data from the first database to the work queue; and (e) a data import module operable 320 to import data from the work queue to the second database. In the system, the first party is not privileged to write the data directly to the second database.Type: ApplicationFiled: October 6, 2005Publication date: April 12, 2007Applicant: Avaya Technology Corp.Inventors: M. Bland, Stephan Friedl, Terry Jennings, Jeffrey Olson, Barbara West