Abstract: A system includes a processing device that determines whether a memory bank is active and adds an activate command for a row of the memory bank accessed by an oldest command for the memory bank to a command scheduler in response to determining the memory bank is not active. The processing device determines whether the row of the memory bank has a corresponding row command in response to determining the memory bank is active. The processing device determines whether a close page mode is enabled or an open row timer has expired on the row and adds a precharge command to the command scheduler in response to determining the close page mode is enabled or the open row timer has expired. The processing device executes a command in the command scheduler based on a priority of commands included in the command scheduler.

Abstract: The present disclosure includes apparatuses and methods related to memory module interfaces. A memory module, which may include volatile memory or nonvolatile memory, or both, may be configured to communicate with a host device via one interface and to communicate with another memory module using a different interface. Memory modules may thus be added or removed from a system without impacting a PCB-based bus to the host, and memory modules may communicate with one another without accessing a bus to the host. The host interface may be configured according to one protocol or standard, and other interfaces between memory modules may be configured according to other protocols or standards.

Abstract: The present disclosure includes apparatuses and methods related to a memory protocol. An example apparatus can execute a read command that includes a first chunk of data and a second chunk of data by assigning a first read identification (RID) number to the first chunk of data and a second RID number to the second chunk of data, sending the first chunk of data and the first RID number to a host, and sending the second chunk of data and the second RID number to the host. The apparatus can be a non-volatile dual in-line memory module (NVDIMM) device.

Abstract: Systems and methods for area-efficient mitigation of errors that are caused by row hammer attacks and the like in a memory media device are described. The counters for counting row accesses are maintained in a content addressable memory (CAM) the provides fast access times. The detection of errors is deterministically performed while maintaining a number of row access counters that is smaller than the total number of rows protected in the memory media device. The circuitry for the detection and mitigation may be in the memory media device or in a memory controller to which the memory media device attaches. The memory media device may be dynamic random access memory (DRAM).

Abstract: Systems, methods, and apparatus for memory device security and row hammer mitigation are described. A control mechanism may be implemented in a front-end and/or a back-end of a memory sub-system to refresh rows of the memory. A row activation command having a row address at control circuitry of a memory sub-system and incrementing a first count of a row counter corresponding to the row address stored in a content addressable memory (CAM) of the memory sub-system may be received. Control circuitry may determine whether the first count is greater than a row hammer threshold (RHT) minus a second count of a CAM decrease counter (CDC); the second count may be incremented each time the CAM is full. A refresh command to the row address may be issued when a determination is made that the first count is greater than the RHT minus the second count.

Abstract: A method includes accessing a first dataset including aerial imagery data and infrared data, accessing a second dataset including property boundary data, and identifying property boundaries associated with a geographic area. A plurality of models is applied to the datasets to identify and compute information of interest. Based on the first dataset and constrained by the property boundaries, a building detection model can be applied to identify a building, and a vegetation detection model can be applied to identify one or more areas of vegetation. An estimated distance can be determined between each of the areas of vegetation and the building as separation data, which can be compared to a defensible space guideline to determine a defensible space adherence score. A wildfire risk map can be generated, including the defensible space adherence score associated with the geographic area.

Abstract: An apparatus can include a memory device comprising a memory component and a memory controller that is coupled to the memory component. A memory searching component (MSC) is resident on the apparatus. The MSC can receive an external instruction indicative of performance of an operation to retrieve particular data from the memory component and issue, responsive to receipt of the instruction, a command to the memory controller to cause the memory controller to perform a read request invoking the memory component as part of performance of the operation in the absence of a further external instruction.

Abstract: The present disclosure includes apparatuses and methods related to a non-deterministic memory protocol. An example apparatus can perform operations on the memory device based on commands received from a host according to a protocol, wherein the protocol includes non-deterministic timing of the operations. The memory device can be a non-volatile dual in-line memory module (NVDIMM) device.

Abstract: A device used in conjunction with fixation hardware to provide a two-stage process to address the competing needs of immobilization and re-establishment of normal stress-strain trajectories in grafted bone. A method of determining a patient-specific stress/strain pattern that utilizes a model based on 3D CT data of the relevant structures and cross-sectional data of the three major chewing muscles. The forces on each of the chewing muscles are determined based on the model using predetermined bite forces such that a stiffness of cortical bone in the patient's mandible is determined. Based on the stiffness data, suitable implantation hardware can be designed for the patient by adjusting external topological and internal porous geometries that reduce the stiffness of biocompatible metals to thereby restore normal bite forces of the patient. A method of 3D printing nitinol to create a patient-specific device to facilitate the establishment of a normal stress-strain trajectory in grafted bone.

Abstract: An acoustic fluid monitoring system, as well as a method for monitoring fluid flow within a pipe using the acoustic fluid monitoring system, are provided herein. The system includes a first sensing probe and a second sensing probe that are acoustically coupled to the outer surface of a wall of a pipe through which a fluid is flowing. The first sensing probe operates at a first resonance frequency, and the second sensing probe operates at a second resonance frequency. The first sensing probe and the second sensing probe are configured to record a first acoustic signal and a second acoustic signal, respectively, corresponding to an acoustic wave propagating through the pipe wall. Characteristics of the first acoustic signal and the second acoustic signal, as well as the relationship between the first acoustic signal and the second acoustic signal, relate to one or more properties of the fluid flowing through the pipe.

Abstract: Apparatuses and methods related to port arbitration of a memory system are described. A memory system can receive a first number of transactions and a second transaction from a first traffic stream and a third number of transactions and a fourth transaction from a second traffic stream. The memory system can process the first number of transactions at least partially concurrently with the third number of transactions. Responsive to a total quantity of transactions of the first number of transactions and the second transaction being at least a threshold quantity of transactions, the second transaction can be processed by the memory system and, subsequent to processing the second transaction, the fourth transaction can be processed by the memory system.

Abstract: In one aspect, the present application relates to an aminothiol-conjugate of formula (I): wherein R1, R2, R3, m, n, and p are as described above. The present invention also relates to a method of treating a subject in need of aminothiol therapy using an aminothiol-conjugate of formula (I).

Abstract: The present disclosure includes apparatuses and methods related to memory module interfaces. A memory module, which may include volatile memory or nonvolatile memory, or both, may be configured to communicate with a host device via one interface and to communicate with another memory module using a different interface. Memory modules may thus be added or removed from a system without impacting a PCB-based bus to the host, and memory modules may communicate with one another without accessing a bus to the host. The host interface may be configured according to one protocol or standard, and other interfaces between memory modules may be configured according to other protocols or standards.

Abstract: Anti-RSV antibodies with neutralizing potency against RSV subtype A and RSV subtype B are provided, as well as methods for their identification, isolation, generation, and methods for their preparation and use are provided.

Abstract: A system includes a processing device that determines whether a memory bank is active and adds an activate command for a row of the memory bank accessed by an oldest command for the memory bank to a command scheduler in response to determining the memory bank is not active. The processing device determines whether the row of the memory bank has a corresponding row command in response to determining the memory bank is active. The processing device determines whether a close page mode is enabled or an open row timer has expired on the row and adds a precharge command to the command scheduler in response to determining the close page mode is enabled or the open row timer has expired. The processing device executes a command in the command scheduler based on a priority of commands included in the command scheduler.

Abstract: Provided is a system comprising a communication interface between a host and a device, wherein the header of a first memory request transmitted on the forward link of the communication interface encodes, in a bit vector, addresses to be read for a plurality of second memory requests. Combining one or more read requests with another request such that a single request header is transmitted for a plurality of respective requests provides for more efficient use of the forward link bandwidth. Corresponding methods are also described.

Abstract: A system comprising an interface between a host and a device, wherein the interface is configured to reorder messages to package flits to reduce or eliminate underutilized bandwidth in one or both directions of a bidirectional link. In one example, the interface is in accordance with the CXL specification, and the host and the device (e.g., a memory device) include CXL-compliant controllers to pack and unpack flits.

Abstract: The present disclosure relates to HIV vaccines and methods of use thereof. Disclosed herein are methods of preventing an infection from a human immunodeficiency virus (HIV) using a commensal microbe antigen. Further disclosed herein is a method of boosting an immune response against a human immunodeficiency virus (HIV), the method comprising administering to a subject an effective amount of a first composition comprising a commensal microbe antigen and an effective amount of a second composition comprising an HIV antigen.

Abstract: The present disclosure includes apparatuses and methods related to a memory protocol. An example apparatus can execute a read command that includes a first chunk of data and a second chunk of data by assigning a first read identification (RID) number to the first chunk of data and a second RID number to the second chunk of data, sending the first chunk of data and the first RID number to a host, and sending the second chunk of data and the second RID number to the host. The apparatus can be a non-volatile dual in-line memory module (NVDIMM) device.

Abstract: Systems, methods, and apparatus for memory device security and row hammer mitigation are described. A control mechanism may be implemented in a front-end and/or a back-end of a memory sub-system to refresh rows of the memory. A row activation command having a row address at control circuitry of a memory sub-system and incrementing a first count of a row counter corresponding to the row address stored in a content addressable memory (CAM) of the memory sub-system may be received. Control circuitry may determine whether the first count is greater than a row hammer threshold (RHT) minus a second count of a CAM decrease counter (CDC); the second count may be incremented each time the CAM is full. A refresh command to the row address may be issued when a determination is made that the first count is greater than the RHT minus the second count.