Abstract: The disclosed technology generally relates to semiconductor structures and their fabrication, and more particularly to diffusion barrier structures containing Ti, Si, N and methods of forming same. A method of forming an electrically conductive diffusion barrier comprises providing a substrate in a reaction chamber and forming a titanium silicide (TiSi) region on the substrate by alternatingly exposing the substrate to a titanium-containing precursor and a first silicon-containing precursor. The method additionally comprises forming a titanium silicon nitride (TiSiN) region on the TiSi region by alternatingly exposing the substrate to a titanium-containing precursor, a nitrogen-containing precursor and a second silicon-containing precursor. The method can optionally include, prior to forming the TiSi region, forming a titanium nitride (TiN) region by alternatingly exposing the substrate to a titanium-containing precursor and a nitrogen-containing precursor.

Abstract: A method of using a processing oven may include disposing at least one substrate in a chamber of the oven and activating a lamp assembly disposed above them to increase their temperature to a first temperature. A chemical vapor may be admitted into the chamber above the at least one substrate and an inert gas may be admitted into the chamber below the at least one substrate. The temperature of the at least one substrate may then be increased to a second temperature higher than the first temperature and then cooled down.

Abstract: A method of using a processing oven may include disposing at least one substrate in a chamber of the oven and activating a lamp assembly disposed above them to increase their temperature to a first temperature. A chemical vapor may be admitted into the chamber above the at least one substrate and an inert gas may be admitted into the chamber below the at least one substrate. The temperature of the at least one substrate may then be increased to a second temperature higher than the first temperature and then cooled down.

Abstract: A semiconductor processing apparatus includes a process chamber that defines an enclosure. The enclosure includes a substrate support configured to support a substrate and rotate the substrate about a central axis of the process chamber. The substrate support is also configured to move vertically along the central axis and position the substrate at multiple locations in the enclosure. The apparatus also includes one or more UV lamps configured to irradiate a top surface of the substrate supported on the substrate support.

Abstract: A method for ALD coating of a substrate with a layer containing Ti, Si, N, wherein a reaction gas and then a flushing gas are introduced into a process chamber holding the substrate in a plurality of successive steps, each in one or more cycles, wherein TiN is deposited in a first step with a reaction gas containing Ti and a reaction gas containing N, TiSi is deposited in a second step with a reaction gas containing Ti and a reaction gas containing Si, and in a third step following the second step, TiSiN is deposited with a reaction gas containing Ti, with a reaction gas containing N and with a reaction gas containing Si.

Abstract: A batch processing oven includes a processing chamber, a magnet, and a rack. The processing chamber includes a gas inlet on a first side and a gas outlet on a second side opposite the first side, the gas inlet is configured to direct a hot gas into the processing chamber and the gas outlet is configured to exhaust the convective energy in parallel with the radiative energy from the walls. The magnet is arranged such that its north pole will be formed on the first side of the processing chamber and its south pole will be formed on the second side of the processing chamber. The rack is configured to be positioned between the first and second ends of the processing chamber and is configured to support a plurality of vertically spaced-apart substrates.

Abstract: A method of using a processing oven may include disposing at least one substrate in a chamber of the oven and activating a lamp assembly disposed above them to increase their temperature to a first temperature. A chemical vapor may be admitted into the chamber above the at least one substrate and an inert gas may be admitted into the chamber below the at least one substrate. The temperature of the at least one substrate may then be increased to a second temperature higher than the first temperature and then cooled down.

Abstract: A method of using a solder reflow oven can include disposing at least one substrate including solder in a chamber of the oven. The method can include decreasing a pressure of the chamber to a first pressure between about 0.1-50 Torr. After decreasing the pressure of the chamber, the temperature of the at least one substrate can be increased to a first temperature. Formic acid vapor can be admitted into the chamber above the at least one substrate while nitrogen is discharged into the chamber below the at least one substrate. The method can also include removing at least a portion of the formic acid vapor from the enclosure. After the removing step, the temperature of the at least one substrate can be further increased to a second temperature higher than the first temperature. The at least one substrate can be maintained at the second temperature for a first time. And then, the at least one substrate can be cooled.

Abstract: A method of using an oven includes supporting a substrate on a rotatable spindle in a processing chamber of the oven and rotating the substrate. The method may also include raising the spindle with the substrate to a heating zone and activating a lamp assembly to heat a top surface of the substrate. The substrate may then be lowered to a dosing zone and a chemical vapor directed into the processing chamber above the substrate. The substrate may then be further heated using the lamp assembly and cooled.

Abstract: The present disclosure is directed to a compact vertical oven for reflow of solder bumps for backend processes in semiconductor wafer assembly and packaging. This disclosure describes a vertical oven which uses a plurality of wafers (e.g., an example value is 50-100 wafers) in a batch with controlled injection of the reducing agent (e.g. formic acid), resulting in a process largely free of contamination. This disclosure describes controlled formic acid flow through a vertical system using laminar flow technology in a sub-atmospheric pressure environment, which is not currently available in the industry. The efficacy of the process depends on effective formic acid vapor delivery, integrated temperature control during heating and cooling, and careful design of the vapor flow path with exhaust. Zone-dependent reaction dynamics managed by vapor delivery process, two-steps temperature ramp control, and controlled cooling process and formic acid content ensures the effective reaction without any flux.

Abstract: A method for ALD coating of a substrate with a layer containing Ti, Si, N, wherein a reaction gas and then a flushing gas are introduced into a process chamber holding the substrate in a plurality of successive steps, each in one or more cycles, wherein TiN is deposited in a first step with a reaction gas containing Ti and a reaction gas containing N, TiSi is deposited in a second step with a reaction gas containing Ti and a reaction gas containing Si, and in a third step following the second step, TiSiN is deposited with a reaction gas containing Ti, with a reaction gas containing N and with a reaction gas containing Si.

Abstract: A solder reflow oven may include a reflow chamber and a plurality of vertically spaced apart wafer-support plates positioned in the reflow chamber. A plurality of semiconductor wafers each including a solder are configured to be disposed in the reflow chamber such that each semiconductor wafer is disposed proximate to, and vertically spaced apart from, a wafer-support plate. Each wafer-support plate may include at least one of liquid-flow channels or resistive heating elements. A control system control the flow of a hot liquid through the channels or activate the heating elements to heat a wafer to a temperature above the solder reflow temperature.

Abstract: A solder reflow oven may include a reflow chamber and a plurality of vertically spaced apart wafer-support plates positioned in the reflow chamber. A plurality of semiconductor wafers each including a solder are configured to be disposed in the reflow chamber such that each semiconductor wafer is disposed proximate to, and vertically spaced apart from, a wafer-support plate. Each wafer-support plate may include at least one of liquid-flow channels or resistive heating elements. A control system control the flow of a hot liquid through the channels or activate the heating elements to heat a wafer to a temperature above the solder reflow temperature.

Abstract: The present disclosure is directed to a compact vertical oven for reflow of solder bumps for backend processes in semiconductor wafer assembly and packaging. This disclosure describes a vertical oven which uses a plurality of wafers (e.g., an example value is 50-100 wafers) in a batch with controlled injection of the reducing agent (e.g. formic acid), resulting in a process largely free of contamination. This disclosure describes controlled formic acid flow through a vertical system using laminar flow technology in a sub-atmospheric pressure environment, which is not currently available in the industry. The efficacy of the process depends on effective formic acid vapor delivery, integrated temperature control during heating and cooling, and careful design of the vapor flow path with exhaust. Zone-dependent reaction dynamics managed by vapor delivery process, two-steps temperature ramp control, and controlled cooling process and formic acid content ensures the effective reaction without any flux.

Abstract: During a pre-treat process, hydrogen plasma is used to remove contaminants (e.g., oxygen, carbon) from a surface of a wafer. The hydrogen plasma may be injected into the plasma chamber via an elongated injector nozzle. Using such elongated injector nozzle, a flow of hydrogen plasma with a significant radial velocity flows over the wafer surface, and transports volatile compounds and other contaminant away from the wafer surface to an exhaust manifold. A protective liner made from crystalline silicon or polysilicon may be disposed on an inner surface of the plasma chamber to prevent contaminants from being released from the surface of the plasma chamber. To further decrease the sources of contaminants, an exhaust restrictor made from silicon may be employed to prevent hydrogen plasma from flowing into the exhaust manifold and prevent volatile compounds and other contaminants from flowing from the exhaust manifold back into the plasma chamber.

Abstract: During a pre-treat process, hydrogen plasma is used to remove contaminants (e.g., oxygen, carbon) from a surface of a wafer. The hydrogen plasma may be injected into the plasma chamber via an elongated injector nozzle. Using such elongated injector nozzle, a flow of hydrogen plasma with a significant radial velocity flows over the wafer surface, and transports volatile compounds and other contaminant away from the wafer surface to an exhaust manifold. A protective liner made from crystalline silicon or polysilicon may be disposed on an inner surface of the plasma chamber to prevent contaminants from being released from the surface of the plasma chamber. To further decrease the sources of contaminants, an exhaust restrictor made from silicon may be employed to prevent hydrogen plasma from flowing into the exhaust manifold and prevent volatile compounds and other contaminants from flowing from the exhaust manifold back into the plasma chamber.

Abstract: The disclosed technology generally relates to semiconductor structures and their fabrication, and more particularly to diffusion barrier structures containing Ti, Si, N and methods of forming same. A method of forming an electrically conductive diffusion barrier comprises providing a substrate in a reaction chamber and forming a titanium silicide (TiSi) region on the substrate by alternatingly exposing the substrate to a titanium-containing precursor and a first silicon-containing precursor. The method additionally comprises forming a titanium silicon nitride (TiSiN) region on the TiSi region by alternatingly exposing the substrate to a titanium-containing precursor, a nitrogen-containing precursor and a second silicon-containing precursor. The method can optionally include, prior to forming the TiSi region, forming a titanium nitride (TiN) region by alternatingly exposing the substrate to a titanium-containing precursor and a nitrogen-containing precursor.

Abstract: A method for ALD coating of a substrate with a layer containing Ti, Si, N, wherein a reaction gas and then a flushing gas are introduced into a process chamber holding the substrate in a plurality of successive steps, each in one or more cycles, wherein TiN is deposited in a first step with a reaction gas containing Ti and a reaction gas containing N, TiSi is deposited in a second step with a reaction gas containing Ti and a reaction gas containing Si, and in a third step following the second step, TiSiN is deposited with a reaction gas containing Ti, with a reaction gas containing N and with a reaction gas containing Si.

Abstract: A gas distribution system for a reactor having at least two distinct gas source orifice arrays displaced from one another along an axis defined by a gas flow direction from the gas source orifice arrays towards a work-piece deposition surface such that at least a lower one of the gas source orifice arrays is located between a higher one of the gas source orifice arrays and the work-piece deposition surface. Orifices in the higher one of the gas source orifice arrays may spaced an average of 0.2-0.8 times a distance between the higher one of the gas source orifice arrays and the work-piece deposition surface, while orifices in the lower one of the gas source orifice arrays may be spaced an average of 0.1-0.4 times a distance between the higher one of the gas source orifice array and the work-piece deposition surface.

Abstract: A method of introducing gasses through a gas distribution system into a reactor involves flowing the gasses through at least two distinct gas source orifice arrays displaced from one another along an axis defined by a gas flow direction from the gas source orifice arrays towards a work-piece. During different time intervals, a purge gas and different reactive precursors are flowed into the reactor from different ones of the gas source orifice arrays. One of the precursors may be associated with a soft saturating atomic layer deposition half reaction and another of the precursors associated with a strongly saturating atomic layer deposition half reaction. An upper one of the gas source orifice arrays may be a relatively planar gas orifice array.