Patents by Inventor M. Ziaul Karim
M. Ziaul Karim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20090324829Abstract: A gas distribution system for a reactor having at least two distinct gas source orifice arrays displaced from one another along an axis defined by a gas flow direction from the gas source orifice arrays towards a work-piece deposition surface such that at least a lower one of the gas source orifice arrays is located between a higher one of the gas source orifice arrays and the work-piece deposition surface. Orifices in the higher one of the gas source orifice arrays may spaced an average of 0.2-0.8 times a distance between the higher one of the gas source orifice arrays and the work-piece deposition surface, while orifices in the lower one of the gas source orifice arrays may be spaced an average of 0.1-0.4 times a distance between the higher one of the gas source orifice arrays and the work-piece deposition surface.Type: ApplicationFiled: September 3, 2009Publication date: December 31, 2009Inventors: Jeremie J. Dalton, M. Ziaul Karim, Ana R. Londergan
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Patent number: 7595088Abstract: A method of depositing a silicon oxide layer over a substrate having a trench formed between adjacent raised surfaces. In one embodiment the silicon oxide layer is formed in a multistep process that includes depositing a first portion of layer over the substrate and within the trench by forming a high density plasma process that has simultaneous deposition and sputtering components from a first process gas comprising a silicon source, an oxygen source and helium and/or molecular hydrogen with highD/S ratio, for example, 10-20 and, thereafter, depositing a second portion of the silicon oxide layer over the substrate and within the trench by forming a high density plasma process that has simultaneous deposition and sputtering components from a second process gas comprising a silicon source, an oxygen source and molecular hydrogen with a lowerD/S ratio of, for example, 3-10.Type: GrantFiled: August 10, 2004Date of Patent: September 29, 2009Assignee: Applied Materials, Inc.Inventors: Bikram Kapoor, M. Ziaul Karim, Anchuan Wang
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Patent number: 7294588Abstract: A process is provided for depositing an silicon oxide film on a substrate disposed in a process chamber. A process gas that includes a halogen source, a fluent gas, a silicon source, and an oxidizing gas reactant is flowed into the process chamber. A plasma having an ion density of at least 1011 ions/cm3 is formed from the process gas. The silicon oxide film is deposited over the substrate with a halogen concentration less than 1.0%. The silicon oxide film is deposited with the plasma using a process that has simultaneous deposition and sputtering components. The flow rate of the halogen source to the process chamber to the flow rate of the silicon source to the process chamber is substantially between 0.5 and 3.0.Type: GrantFiled: March 24, 2006Date of Patent: November 13, 2007Assignee: Applied Materials, Inc.Inventors: M. Ziaul Karim, DongQing Li, Jeong Soo Byun, Thanh N. Pham
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Patent number: 7205240Abstract: A gapfill process is provided using cycling of HDP-CVD deposition, etching, and deposition step. The fluent gas during the first deposition step includes an inert gas such as He, but includes H2 during the remainder deposition step. The higher average molecular weight of the fluent gas during the first deposition step provides some cusping over structures that define the gap to protect them during the etching step. The lower average molecular weight of the fluent gas during the remainder deposition step has reduced sputtering characteristics and is effective at filling the remainder of the gap.Type: GrantFiled: June 4, 2003Date of Patent: April 17, 2007Assignee: Applied Materials, Inc.Inventors: M. Ziaul Karim, Bikram Kapoor, Anchuan Wang, Dong Qing Li, Katsunari Ozeki, Manoj Vellaikal, Zhuang Li
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Applications and methods of making nitrogen-free anti-reflective layers for semiconductor processing
Patent number: 7052988Abstract: A nitrogen-free anti-reflective layer for use in semiconductor photolithography is fabricated in a chemical vapor deposition process, optionally plasma-enhanced, using a gaseous mixture of carbon, silicon, and oxygen sources. By varying the process parameters, acceptable values of the refractive index n and extinction coefficient k can be obtained. The nitrogen-free anti-reflective layer produced by this technique eliminates the mushrooming and footing problems found with conventional anti-reflective layers.Type: GrantFiled: February 5, 2004Date of Patent: May 30, 2006Assignee: Novellus Systems, Inc.Inventors: Bart van Schravendijk, Ming Li, Jason Tian, Tom Mountsier, M. Ziaul Karim -
Patent number: 7049211Abstract: A process is provided for depositing an undoped silicon oxide film on a substrate disposed in a process chamber. A process gas that includes SiF4, a fluent gas, a silicon source, and an oxidizing gas reactant is flowed into the process chamber. A plasma having an ion density of at least 1011 ions/cm3 is formed from the process gas. The undoped silicon oxide film is deposited over the substrate with the plasma using a process that has simultaneous deposition and sputtering components.Type: GrantFiled: March 25, 2005Date of Patent: May 23, 2006Assignee: Applied MaterialsInventors: M. Ziaul Karim, DongQing Li, Jeong Soo Byun, Thanh N. Pham
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Patent number: 7033945Abstract: A method of filling a gap formed between adjacent raised surfaces on a substrate. In one embodiment the method comprises depositing a boron-doped silica glass (BSG) layer over the substrate to partially fill the gap using a thermal CVD process; exposing the BSG layer to a steam ambient at a temperature above the BSG layer's Eutectic temperature; removing an upper portion of the BSG layer by exposing the layer to a fluorine-containing etchant; and depositing an undoped silica glass (USG) layer over the BSG layer to fill the remainder of the gap.Type: GrantFiled: June 1, 2004Date of Patent: April 25, 2006Assignee: Applied MaterialsInventors: Jeong Soo Byun, Zheng Yuan, Shankar Venkataraman, M. Ziaul Karim, Thanh N. Pham, Ellie Y. Yieh
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Patent number: 6958112Abstract: Methods and systems are provided for depositing silicon oxide in a gap on a substrate. The silicon oxide is formed by flowing a process gas into a process chamber and forming a plasma having an overall ion density of at least 1011 ions/cm3. The process gas includes H2, a silicon source, and an oxidizing gas reactant, and deposition into the gap is achieved using a process that has simultaneous deposition and sputtering components. The probability of forming a void is reduced by ensuring that the plasma has a greater density of ions having a single oxygen atom than a density of ions having more than one oxygen atom.Type: GrantFiled: May 27, 2003Date of Patent: October 25, 2005Assignee: Applied Materials, Inc.Inventors: M. Ziaul Karim, Farhad K. Moghadam, Siamak Salimian
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Patent number: 6903031Abstract: A process is provided for depositing an undoped silicon oxide film on a substrate disposed in a process chamber. A process gas that includes SiF4, H2, a silicon source, and an oxidizing gas reactant is flowed into the process chamber. A plasma having an ion density of at least 1011 ions/cm3 is formed from the process gas. The undoped silicon oxide film is deposited over the substrate with the plasma using a process that has simultaneous deposition and sputtering components. A temperature of the substrate during such depositing is greater than 450° C.Type: GrantFiled: September 3, 2003Date of Patent: June 7, 2005Assignee: Applied Materials, Inc.Inventors: M. Ziaul Karim, DongQing Li, Jeong Soo Byun, Thanh N. Pham
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Patent number: 6844612Abstract: A fluorine-doped silica glass (FSG) dielectric layer includes a number of sublayers. Each sublayer is doped with fluorine in such a way that the doping concentration of fluorine in the sublayer decreases as one moves from an interior region of the sublayer towards one or both of the interfaces between the sublayer and adjacent sublayers. This structure reduces the generation of HF when the layer is exposed to moisture and thereby improves the stability and adhesion properties of the layer. The principles of this invention can also be applied to dielectric layers doped with such other dopants as boron, phosphorus or carbon.Type: GrantFiled: April 29, 2003Date of Patent: January 18, 2005Assignee: Novellus Systems, Inc.Inventors: Jason Tian, Wenxian Zhu, M. Ziaul Karim, Cong Do
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Publication number: 20050008790Abstract: A method of depositing a silicon oxide layer over a substrate having a trench formed between adjacent raised surfaces. In one embodiment the silicon oxide layer is formed in a multistep process that includes depositing a first portion of layer over the substrate and within the trench by forming a high density plasma process that has simultaneous deposition and sputtering components from a first process gas comprising a silicon source, an oxygen source and helium and/or molecular hydrogen with highD/S ratio, for example, 10-20 and, thereafter, depositing a second portion of the silicon oxide layer over the substrate and within the trench by forming a high density plasma process that has simultaneous deposition and sputtering components from a second process gas comprising a silicon source, an oxygen source and molecular hydrogen with a lowerD/S ratio of, for example, 3-10.Type: ApplicationFiled: August 10, 2004Publication date: January 13, 2005Applicant: Applied Materials, Inc.Inventors: Bikram Kapoor, M. Ziaul Karim, Anchuan Wang
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Publication number: 20040245091Abstract: A gapfill process is provided using cycling of HDP-CVD deposition, etching, and deposition step. The fluent gas during the first deposition step includes an inert gas such as He, but includes H2 during the remainder deposition step. The higher average molecular weight of the fluent gas during the first deposition step provides some cusping over structures that define the gap to protect them during the etching step. The lower average molecular weight of the fluent gas during the remainder deposition step has reduced sputtering characteristics and is effective at filling the remainder of the gap.Type: ApplicationFiled: June 4, 2003Publication date: December 9, 2004Applicant: Applied Materials, Inc.Inventors: M Ziaul Karim, Bikram Kapoor, Anchuan Wang, DongQing Li, Katsunary Ozeki, Manoj Vellaikal, Zhuang Li
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Publication number: 20040241342Abstract: Methods and systems are provided for depositing silicon oxide in a gap on a substrate. The silicon oxide is formed by flowing a process gas into a process chamber and forming a plasma having an overall ion density of at least 1011 ions/cm3. The process gas includes H2, a silicon source, and an oxidizing gas reactant, and deposition into the gap is achieved using a process that has simultaneous deposition and sputtering components. The probability of forming a void is reduced by ensuring that the plasma has a greater density of ions having a single oxygen atom than a density of ions having more than one oxygen atom.Type: ApplicationFiled: May 27, 2003Publication date: December 2, 2004Applicant: Applied Materials, Inc.Inventors: M. Ziaul Karim, Farhad K. Moghadam, Siamak Salimian
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Patent number: 6808748Abstract: A method of depositing a silicon oxide layer over a substrate having a trench formed between adjacent raised surfaces. In one embodiment the silicon oxide layer is formed in a multistep process that includes depositing a first portion of layer over the substrate and within the trench by forming a high density plasma process that has simultaneous deposition and sputtering components from a first process gas comprising a silicon source, an oxygen source and helium and/or molecular hydrogen with high D/S ratio, for example, 10-20 and, thereafter, depositing a second portion of the silicon oxide layer over the substrate and within the trench by forming a high density plasma process that has simultaneous deposition and sputtering components from a second process gas comprising a silicon source, an oxygen source and molecular hydrogen with a lower D/S ratio of, for example, 3-10.Type: GrantFiled: January 23, 2003Date of Patent: October 26, 2004Assignee: Applied Materials, Inc.Inventors: Bikram Kapoor, M. Ziaul Karim, Anchuan Wang
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Publication number: 20030036280Abstract: An amorphous material containing silicon, carbon, hydrogen and nitrogen, provides a barrier/etch stop layer for use with low dielectric constant insulating layers and copper interconnects. The amorphous material is prepared by plasma assisted chemical vapor deposition (CVD) of alklysilanes together with nitrogen and ammonia. Material that at the same time has a dielectric constant less than 4.5, an electrical breakdown field about 5 MV/cm, and a leakage current less than or on the order of 1 nA/cm2 at a field strength of 1 MV/cm has been obtained. The amorphous material meets the requirements for use as a barrier/etch stop layer in a standard damascene fabrication process.Type: ApplicationFiled: July 9, 2002Publication date: February 20, 2003Applicant: Novellus System, Inc.Inventors: Sanjeev Jain, Somnath Nag, Gerrit Kooi, M. Ziaul Karim, Kenneth P. MacWilliams
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Patent number: 6417092Abstract: An amorphous material containing silicon, carbon, hydrogen and nitrogen, provides a barrier/etch stop layer for use with low dielectric constant insulating layers and copper interconnects. The amorphous material is prepared by plasma assisted chemical vapor deposition (CVD) of alklysilanes together with nitrogen and ammonia. Material that at the same time has a dielectric constant less than 4.5, an electrical breakdown field about 5 MV/cm, and a leakage current less than or on the order of 1 nA/cm2 at a field strength of 1 Mv/cm has been obtained. The amorphous material meets the requirements for use as a barrier/etch stop layer in a standard damascene fabrication process.Type: GrantFiled: April 5, 2000Date of Patent: July 9, 2002Assignee: Novellus Systems, Inc.Inventors: Sanjeev Jain, Somnath Nag, Gerrit Kooi, M. Ziaul Karim, Kenneth P. MacWilliams
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Patent number: 6303518Abstract: An improved CVD process, preferably a PECVD process, for forming a low-dielectric-constant insulating material on a semiconductor substrate, or on and/or under a metal barrier, or etch stop layer of SiNx, Ta(N), TiN, WNx and others. Specifically, the improved PECVD process provides for deposition of an N2O+SiF4+SiH4 based FSG film having improved characteristics, which may be accomplished in any conventional PECVD chamber, but preferably in a dual frequency PECVD chamber.Type: GrantFiled: September 30, 1999Date of Patent: October 16, 2001Assignee: Novellus Systems, Inc.Inventors: Jason L. Tian, M. Ziaul Karim, Bart J. van Schravendijk